X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=mono%2Fmini%2Fmini-ia64.c;h=94f426d517260e0d3665da42fe8652c89696c774;hb=1f1ec58dcf1a64372543875725dec5aee6d1f3c5;hp=3ab6a7ffc72171cc46d63d3b90f136bd6fad0954;hpb=d4016989729bd58274c03d7b8ed9495bfbfef82f;p=mono.git diff --git a/mono/mini/mini-ia64.c b/mono/mini/mini-ia64.c index 3ab6a7ffc72..94f426d5172 100644 --- a/mono/mini/mini-ia64.c +++ b/mono/mini/mini-ia64.c @@ -21,6 +21,7 @@ #include #include #include +#include #include "trace.h" #include "mini-ia64.h" @@ -610,12 +611,6 @@ mono_arch_cpu_optimizations (guint32 *exclude_mask) return 0; } -gboolean -mono_arch_is_soft_float (void) -{ - return FALSE; -} - /* * This function test for all SIMD functions supported. * @@ -1492,10 +1487,10 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) case OP_LOADR8_MEMBASE: case OP_ATOMIC_EXCHANGE_I4: case OP_ATOMIC_EXCHANGE_I8: - case OP_ATOMIC_ADD_NEW_I4: - case OP_ATOMIC_ADD_NEW_I8: - case OP_ATOMIC_ADD_IMM_NEW_I4: - case OP_ATOMIC_ADD_IMM_NEW_I8: + case OP_ATOMIC_ADD_I4: + case OP_ATOMIC_ADD_I8: + case OP_ATOMIC_ADD_IMM_I4: + case OP_ATOMIC_ADD_IMM_I8: /* There are no membase instructions on ia64 */ if (ins->inst_offset == 0) { break; @@ -2939,12 +2934,12 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb) case OP_MEMORY_BARRIER: ia64_mf (code); break; - case OP_ATOMIC_ADD_IMM_NEW_I4: + case OP_ATOMIC_ADD_IMM_I4: g_assert (ins->inst_offset == 0); ia64_fetchadd4_acq_hint (code, ins->dreg, ins->inst_basereg, ins->inst_imm, 0); ia64_adds_imm (code, ins->dreg, ins->inst_imm, ins->dreg); break; - case OP_ATOMIC_ADD_IMM_NEW_I8: + case OP_ATOMIC_ADD_IMM_I8: g_assert (ins->inst_offset == 0); ia64_fetchadd8_acq_hint (code, ins->dreg, ins->inst_basereg, ins->inst_imm, 0); ia64_adds_imm (code, ins->dreg, ins->inst_imm, ins->dreg); @@ -2956,7 +2951,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb) case OP_ATOMIC_EXCHANGE_I8: ia64_xchg8_hint (code, ins->dreg, ins->inst_basereg, ins->sreg2, 0); break; - case OP_ATOMIC_ADD_NEW_I4: { + case OP_ATOMIC_ADD_I4: { guint8 *label, *buf; /* From libatomic_ops */ @@ -2976,7 +2971,7 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb) ia64_add (code, ins->dreg, GP_SCRATCH_REG, ins->sreg2); break; } - case OP_ATOMIC_ADD_NEW_I8: { + case OP_ATOMIC_ADD_I8: { guint8 *label, *buf; /* From libatomic_ops */ @@ -3782,7 +3777,7 @@ ia64_patch (unsigned char* code, gpointer target) } void -mono_arch_patch_code (MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, MonoCodeManager *dyn_code_mp, gboolean run_cctors) +mono_arch_patch_code (MonoCompile *cfg, MonoMethod *method, MonoDomain *domain, guint8 *code, MonoJumpInfo *ji, MonoCodeManager *dyn_code_mp, gboolean run_cctors) { MonoJumpInfo *patch_info; @@ -4531,8 +4526,6 @@ mono_arch_free_jit_tls_data (MonoJitTlsData *tls) { } -#ifdef MONO_ARCH_HAVE_IMT - /* * LOCKING: called with the domain lock held */ @@ -4643,7 +4636,6 @@ mono_arch_emit_imt_argument (MonoCompile *cfg, MonoCallInst *call, MonoInst *imt { /* Done by the implementation of the CALL_MEMBASE opcodes */ } -#endif gpointer mono_arch_get_this_arg_from_call (mgreg_t *regs, guint8 *code) @@ -4657,6 +4649,12 @@ mono_arch_get_delegate_invoke_impl (MonoMethodSignature *sig, gboolean has_targe return NULL; } +gpointer +mono_arch_get_delegate_virtual_invoke_impl (MonoMethodSignature *sig, MonoMethod *method, int offset, gboolean load_imt_reg) +{ + return NULL; +} + MonoInst* mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMethodSignature *fsig, MonoInst **args) { @@ -4674,9 +4672,9 @@ mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMetho guint32 opcode; if (fsig->params [0]->type == MONO_TYPE_I4) - opcode = OP_ATOMIC_ADD_IMM_NEW_I4; + opcode = OP_ATOMIC_ADD_IMM_I4; else if (fsig->params [0]->type == MONO_TYPE_I8) - opcode = OP_ATOMIC_ADD_IMM_NEW_I8; + opcode = OP_ATOMIC_ADD_IMM_I8; else g_assert_not_reached (); MONO_INST_NEW (cfg, ins, opcode); @@ -4689,9 +4687,9 @@ mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMetho guint32 opcode; if (fsig->params [0]->type == MONO_TYPE_I4) - opcode = OP_ATOMIC_ADD_IMM_NEW_I4; + opcode = OP_ATOMIC_ADD_IMM_I4; else if (fsig->params [0]->type == MONO_TYPE_I8) - opcode = OP_ATOMIC_ADD_IMM_NEW_I8; + opcode = OP_ATOMIC_ADD_IMM_I8; else g_assert_not_reached (); MONO_INST_NEW (cfg, ins, opcode); @@ -4713,9 +4711,9 @@ mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMetho if (is_imm) { if (fsig->params [0]->type == MONO_TYPE_I4) - opcode = OP_ATOMIC_ADD_IMM_NEW_I4; + opcode = OP_ATOMIC_ADD_IMM_I4; else if (fsig->params [0]->type == MONO_TYPE_I8) - opcode = OP_ATOMIC_ADD_IMM_NEW_I8; + opcode = OP_ATOMIC_ADD_IMM_I8; else g_assert_not_reached (); @@ -4724,12 +4722,12 @@ mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMetho ins->inst_basereg = args [0]->dreg; ins->inst_offset = 0; ins->inst_imm = imm; - ins->type = (opcode == OP_ATOMIC_ADD_IMM_NEW_I4) ? STACK_I4 : STACK_I8; + ins->type = (opcode == OP_ATOMIC_ADD_IMM_I4) ? STACK_I4 : STACK_I8; } else { if (fsig->params [0]->type == MONO_TYPE_I4) - opcode = OP_ATOMIC_ADD_NEW_I4; + opcode = OP_ATOMIC_ADD_I4; else if (fsig->params [0]->type == MONO_TYPE_I8) - opcode = OP_ATOMIC_ADD_NEW_I8; + opcode = OP_ATOMIC_ADD_I8; else g_assert_not_reached (); @@ -4738,7 +4736,7 @@ mono_arch_emit_inst_for_method (MonoCompile *cfg, MonoMethod *cmethod, MonoMetho ins->inst_basereg = args [0]->dreg; ins->inst_offset = 0; ins->sreg2 = args [1]->dreg; - ins->type = (opcode == OP_ATOMIC_ADD_NEW_I4) ? STACK_I4 : STACK_I8; + ins->type = (opcode == OP_ATOMIC_ADD_I4) ? STACK_I4 : STACK_I8; } MONO_ADD_INS (cfg->cbb, ins); } @@ -4753,15 +4751,23 @@ mono_arch_print_tree (MonoInst *tree, int arity) return 0; } -MonoInst* -mono_arch_get_domain_intrinsic (MonoCompile* cfg) -{ - return mono_get_domain_intrinsic (cfg); -} - mgreg_t mono_arch_context_get_int_reg (MonoContext *ctx, int reg) { /* FIXME: implement */ g_assert_not_reached (); } + +gboolean +mono_arch_opcode_supported (int opcode) +{ + switch (opcode) { + case OP_ATOMIC_ADD_I4: + case OP_ATOMIC_ADD_I8: + case OP_ATOMIC_EXCHANGE_I4: + case OP_ATOMIC_EXCHANGE_I8: + return TRUE; + default: + return FALSE; + } +}