X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=mono%2Fmini%2Fmini-alpha.c;h=2c372c44cb6e6190a817150dfeabbe88cfe4f6f6;hb=fc972fa3fc13e3f3957a082a4cfa631498b3e3ca;hp=754c28ff8ffa563545d62ddcb01b616537cb9619;hpb=9d31ef7d3afece3e9bb4d13f3c97e76609ddaa20;p=mono.git diff --git a/mono/mini/mini-alpha.c b/mono/mini/mini-alpha.c index 754c28ff8ff..2c372c44cb6 100644 --- a/mono/mini/mini-alpha.c +++ b/mono/mini/mini-alpha.c @@ -30,14 +30,6 @@ insert_after_ins (bb, last_ins, (dest)); \ } while (0) -#define NEW_ICONST(cfg,dest,val) do { \ - (dest) = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \ - (dest)->opcode = OP_ICONST; \ - (dest)->inst_c0 = (val); \ - (dest)->type = STACK_I4; \ - } while (0) - - #undef DEBUG #define DEBUG(a) if (cfg->verbose_level > 1) a @@ -67,7 +59,6 @@ #include "trace.h" #include "mini-alpha.h" -#include "inssel.h" #include "cpu-alpha.h" #include "jit-icalls.h" @@ -946,9 +937,6 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) ins = bb->code; - if (bb->max_vreg > cfg->rs->next_vreg) - cfg->rs->next_vreg = bb->max_vreg; - /* * FIXME: Need to add more instructions, but the current machine * description can't model some parts of the composite instructions like @@ -965,7 +953,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) case OP_MUL_IMM: NEW_INS (cfg, temp, OP_I8CONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); switch (ins->opcode) { @@ -1008,7 +996,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) { NEW_INS (cfg, temp, OP_I8CONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->opcode = OP_COMPARE; ins->sreg2 = temp->dreg; @@ -1027,7 +1015,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) { NEW_INS (cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->opcode = OP_ICOMPARE; ins->sreg2 = temp->dreg; @@ -1047,7 +1035,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) { NEW_INS (cfg, temp, OP_I8CONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->opcode = OP_STOREI8_MEMBASE_REG; ins->sreg1 = temp->dreg; } @@ -1059,7 +1047,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) MonoInst *temp; NEW_INS (cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->opcode = OP_STOREI4_MEMBASE_REG; ins->sreg1 = temp->dreg; } @@ -1071,7 +1059,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) MonoInst *temp; NEW_INS (cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->opcode = OP_STOREI1_MEMBASE_REG; ins->sreg1 = temp->dreg; } @@ -1083,7 +1071,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) MonoInst *temp; NEW_INS (cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->opcode = OP_STOREI2_MEMBASE_REG; ins->sreg1 = temp->dreg; } @@ -1102,7 +1090,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) MonoInst *temp; NEW_INS (cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); switch(ins->opcode) { @@ -1145,7 +1133,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) MonoInst *temp; NEW_INS (cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int (cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); switch(ins->opcode) { @@ -1174,7 +1162,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) MonoInst *temp; NEW_INS(cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int(cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->sreg2 = temp->dreg; ins->opcode = OP_LSHR; } @@ -1185,7 +1173,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) MonoInst *temp; NEW_INS(cfg, temp, OP_ICONST); temp->inst_c0 = ins->inst_imm; - temp->dreg = mono_regstate_next_int(cfg->rs); + temp->dreg = mono_alloc_ireg (cfg); ins->sreg2 = temp->dreg; ins->opcode = OP_LSHL; } @@ -1201,7 +1189,7 @@ mono_arch_lowering_pass (MonoCompile *cfg, MonoBasicBlock *bb) bb->last_ins = last_ins; - bb->max_vreg = cfg->rs->next_vreg; + bb->max_vreg = cfg->next_vreg; } /*========================= End of Function ========================*/ @@ -2118,26 +2106,6 @@ mono_arch_emit_exceptions (MonoCompile *cfg) #define EMIT_ALPHA_BRANCH(Tins, PRED_REG, ALPHA_BR) \ offset = ((char *)code - \ (char *)cfg->native_code); \ - if (Tins->flags & MONO_INST_BRLABEL) \ - { \ - if (Tins->inst_i0->inst_c0) \ - { \ - CFG_DEBUG(3) g_print("inst_c0: %0lX, data: %p]\n", \ - Tins->inst_i0->inst_c0, \ - cfg->native_code + Tins->inst_i0->inst_c0); \ - alpha_##ALPHA_BR (code, PRED_REG, 0); \ - } \ - else \ - { \ - CFG_DEBUG(3) g_print("add patch info: MONO_PATCH_INFO_LABEL offset: %0X, inst_i0: %p]\n", \ - offset, Tins->inst_i0); \ - mono_add_patch_info (cfg, offset, \ - MONO_PATCH_INFO_LABEL, Tins->inst_i0); \ - alpha_##ALPHA_BR (code, PRED_REG, 0); \ - } \ - } \ - else \ - { \ if (Tins->inst_true_bb->native_offset) \ { \ long br_offset = (char *)cfg->native_code + \ @@ -2156,8 +2124,7 @@ mono_arch_emit_exceptions (MonoCompile *cfg) MONO_PATCH_INFO_BB, \ Tins->inst_true_bb); \ alpha_##ALPHA_BR (code, PRED_REG, 0); \ - } \ - } + } #define EMIT_COND_EXC_BRANCH(ALPHA_BR, PRED_REG, EXC_NAME) \ @@ -2232,6 +2199,8 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb) switch (ins->opcode) { + case OP_RELAXED_NOP: + break; case OP_LSHR: // Shift 64 bit value right CFG_DEBUG(4) g_print("ALPHA_CHECK: [long_shr] dreg=%d, sreg1=%d, sreg2=%d\n", @@ -3626,51 +3595,29 @@ mono_arch_output_basic_block (MonoCompile *cfg, MonoBasicBlock *bb) CFG_DEBUG(4) g_print("ALPHA_CHECK: [br] target: %p, next: %p, curr: %p, last: %p [", ins->inst_target_bb, bb->next_bb, ins, bb->last_ins); - if (ins->flags & MONO_INST_BRLABEL) + if (ins->inst_target_bb->native_offset) { - if (ins->inst_i0->inst_c0) - { - CFG_DEBUG(4) g_print("inst_c0: %0lX, data: %p]\n", - ins->inst_i0->inst_c0, - cfg->native_code + ins->inst_i0->inst_c0); - alpha_br(code, alpha_zero, 0); - } - else - { - CFG_DEBUG(4) g_print("add patch info: MONO_PATCH_INFO_LABEL offset: %0X, inst_i0: %p]\n", - offset, ins->inst_i0); - mono_add_patch_info (cfg, offset, - MONO_PATCH_INFO_LABEL, ins->inst_i0); - - alpha_br(code, alpha_zero, 0); - } + // Somehow native offset is offset from + // start of the code. So convert it to + // offset branch + long br_offset = (char *)cfg->native_code + + ins->inst_target_bb->native_offset - 4 - (char *)code; + + CFG_DEBUG(4) g_print("jump to: native_offset: %0X, address %p]\n", + ins->inst_target_bb->native_offset, + cfg->native_code + + ins->inst_target_bb->native_offset); + alpha_br(code, alpha_zero, br_offset/4); } else { - if (ins->inst_target_bb->native_offset) - { - // Somehow native offset is offset from - // start of the code. So convert it to - // offset branch - long br_offset = (char *)cfg->native_code + - ins->inst_target_bb->native_offset - 4 - (char *)code; - - CFG_DEBUG(4) g_print("jump to: native_offset: %0X, address %p]\n", - ins->inst_target_bb->native_offset, - cfg->native_code + - ins->inst_target_bb->native_offset); - alpha_br(code, alpha_zero, br_offset/4); - } - else - { - CFG_DEBUG(4) g_print("add patch info: MONO_PATCH_INFO_BB offset: %0X, target_bb: %p]\n", - offset, ins->inst_target_bb); - - mono_add_patch_info (cfg, offset, - MONO_PATCH_INFO_BB, - ins->inst_target_bb); - alpha_br(code, alpha_zero, 0); - } + CFG_DEBUG(4) g_print("add patch info: MONO_PATCH_INFO_BB offset: %0X, target_bb: %p]\n", + offset, ins->inst_target_bb); + + mono_add_patch_info (cfg, offset, + MONO_PATCH_INFO_BB, + ins->inst_target_bb); + alpha_br(code, alpha_zero, 0); } break; @@ -4290,7 +4237,7 @@ mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, { MONO_INST_NEW (cfg, vtarg, OP_MOVE); vtarg->sreg1 = vt_reg; - vtarg->dreg = mono_regstate_next_int (cfg->rs); + vtarg->dreg = mono_alloc_ireg (cfg); mono_bblock_add_inst (cfg->cbb, vtarg); mono_call_inst_add_outarg_reg (cfg, call, vtarg->dreg, @@ -4305,7 +4252,7 @@ mono_arch_emit_this_vret_args (MonoCompile *cfg, MonoCallInst *inst, MONO_INST_NEW (cfg, this, OP_MOVE); this->type = this_type; this->sreg1 = this_reg; - this->dreg = mono_regstate_next_int (cfg->rs); + this->dreg = mono_alloc_ireg (cfg); mono_bblock_add_inst (cfg->cbb, this); mono_call_inst_add_outarg_reg (cfg, call, this->dreg, @@ -5183,31 +5130,6 @@ mono_arch_get_domain_intrinsic (MonoCompile* cfg) /*========================= End of Function ========================*/ -/*------------------------------------------------------------------*/ -/* */ -/* Name - mono_arch_get_thread_intrinsic */ -/* */ -/* Function - */ -/* */ -/* Returns - */ -/* */ -/*------------------------------------------------------------------*/ - -MonoInst * -mono_arch_get_thread_intrinsic (MonoCompile* cfg) -{ - MonoInst *ins; - - if (thread_tls_offset == -1) - return NULL; - - MONO_INST_NEW (cfg, ins, OP_TLS_GET); - ins->inst_offset = thread_tls_offset; - return (ins); -} - -/*========================= End of Function ========================*/ - /*------------------------------------------------------------------*/ /* */ /* Name - mono_arch_get_inst_for_method */ @@ -5368,8 +5290,7 @@ enum { /*------------------------------------------------------------------*/ void* -mono_arch_instrument_epilog (MonoCompile *cfg, void *func, void *p, - gboolean enable_arguments) +mono_arch_instrument_epilog_full (MonoCompile *cfg, void *func, void *p, gboolean enable_arguments, gboolean preserve_argument_registers) { unsigned int *code = p; int save_mode = SAVE_NONE; @@ -5860,7 +5781,7 @@ mono_arch_print_tree (MonoInst *tree, int arity) */ gpointer* -mono_arch_get_vcall_slot_addr (guint8* code, gpointer *regs) +mono_arch_get_vcall_slot_addr (guint8* code, mgreg_t *regs) { unsigned int *pc = (unsigned int *)code; guint32 reg, disp; @@ -5912,7 +5833,7 @@ mono_arch_get_vcall_slot_addr (guint8* code, gpointer *regs) } gpointer -mono_arch_get_this_arg_from_call (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, gssize *regs, guint8 *code) +mono_arch_get_this_arg_from_call (MonoGenericSharingContext *gsctx, MonoMethodSignature *sig, mgreg_t *regs, guint8 *code) { unsigned int *pc = (unsigned int *)code;