X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=mono%2Fmini%2Finssel-x86.brg;h=35d2bb782c346d67a42e1593cfd4022a008df64e;hb=279b47e476642431c7f96e105ed32f133d6ed5a3;hp=059e313211295dc80fb41ef093893114f6bbc3ce;hpb=c4a3b30460c7ea1a1fb3c97cfc8478555714af2f;p=mono.git diff --git a/mono/mini/inssel-x86.brg b/mono/mini/inssel-x86.brg index 059e3132112..35d2bb782c3 100644 --- a/mono/mini/inssel-x86.brg +++ b/mono/mini/inssel-x86.brg @@ -1,7 +1,6 @@ #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_REG(cfg,basereg,offset,operand) do { \ MonoInst *inst; \ - inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \ - inst->opcode = OP_X86_COMPARE_MEMBASE_REG; \ + MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_REG); \ inst->inst_basereg = basereg; \ inst->inst_offset = offset; \ inst->sreg2 = operand; \ @@ -10,8 +9,7 @@ #define MONO_EMIT_NEW_X86_COMPARE_MEMBASE_IMM(cfg,basereg,offset,operand) do { \ MonoInst *inst; \ - inst = mono_mempool_alloc0 ((cfg)->mempool, sizeof (MonoInst)); \ - inst->opcode = OP_X86_COMPARE_MEMBASE_IMM; \ + MONO_INST_NEW ((cfg), inst, OP_X86_COMPARE_MEMBASE_IMM); \ inst->inst_basereg = basereg; \ inst->inst_offset = offset; \ inst->inst_imm = operand; \ @@ -49,23 +47,13 @@ # (C) 2002 Ximian, Inc. # -stmt: OP_START_HANDLER { - MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region); - MONO_EMIT_NEW_STORE_MEMBASE (s, OP_STORE_MEMBASE_REG, spvar->inst_basereg, spvar->inst_offset, X86_ESP); -} - -stmt: CEE_ENDFINALLY { - MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region); - MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset); - tree->opcode = CEE_RET; +stmt: OP_START_HANDLER, +stmt: OP_ENDFINALLY { mono_bblock_add_inst (s->cbb, tree); } stmt: OP_ENDFILTER (reg) { - MonoInst *spvar = mono_find_spvar_for_region (s, s->cbb->region); - MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EAX, state->left->reg1); - MONO_EMIT_NEW_LOAD_MEMBASE (s, X86_ESP, spvar->inst_basereg, spvar->inst_offset); - tree->opcode = CEE_RET; + tree->sreg1 = state->left->reg1; mono_bblock_add_inst (s->cbb, tree); } @@ -75,6 +63,12 @@ stmt: CEE_STIND_I8 (OP_REGVAR, lreg) { MONO_EMIT_NEW_UNALU (s, OP_MOVE, X86_EDX, state->right->reg2); } +reg: CEE_LDIND_I1 (OP_REGVAR) { + MONO_EMIT_UNALU (s, tree, OP_SEXT_I1, state->reg1, state->left->tree->dreg);} + +reg: CEE_LDIND_I2 (OP_REGVAR) { + MONO_EMIT_UNALU (s, tree, OP_SEXT_I2, state->reg1, state->left->tree->dreg);} + lreg: OP_LNEG (lreg) "3" { int tmpr = mono_regstate_next_int (s->rs); MONO_EMIT_NEW_UNALU (s, CEE_NEG, state->reg1, state->left->reg1); @@ -219,7 +213,7 @@ reg: OP_LOCALLOC (OP_ICONST) { mono_bblock_add_inst (s->cbb, tree); } else { guint32 size = state->left->tree->inst_c0; - size = (size + (MONO_ARCH_FRAME_ALIGNMENT - 1)) & ~ (MONO_ARCH_FRAME_ALIGNMENT - 1); + size = (size + (MONO_ARCH_LOCALLOC_ALIGNMENT - 1)) & ~ (MONO_ARCH_LOCALLOC_ALIGNMENT - 1); MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, size); MONO_EMIT_UNALU (s, tree, OP_MOVE, state->reg1, X86_ESP); } @@ -355,11 +349,14 @@ stmt: OP_OUTARG_R4 (freg) { } stmt: OP_OUTARG_R8 (freg) { - MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, 8); + int esp_displ = (tree->backend.arg_info >> 16) & 0xffff; + int esp_offset = tree->backend.arg_info & 0xffff; + if (esp_displ) + MONO_EMIT_NEW_BIALU_IMM (s, OP_SUB_IMM, X86_ESP, X86_ESP, esp_displ); tree->opcode = OP_STORER8_MEMBASE_REG; tree->sreg1 = state->left->reg1; tree->inst_destbasereg = X86_ESP; - tree->inst_offset = 0; + tree->inst_offset = esp_offset; mono_bblock_add_inst (s->cbb, tree); } @@ -657,14 +654,6 @@ stmt: CEE_POP (freg) "0" { # override the rules in inssel-float.brg that work for machines with FP registers -freg: OP_FCONV_TO_R8 (freg) "0" { - /* nothing to do */ -} - -freg: OP_FCONV_TO_R4 (freg) "0" { - /* fixme: nothing to do ??*/ -} - reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) { MonoInst *base = state->right->left->tree; @@ -672,7 +661,7 @@ reg: CEE_ADD(reg, CEE_LDIND_I4 (base)) { tree->sreg1 = state->left->reg1; tree->sreg2 = base->inst_basereg; tree->inst_offset = base->inst_offset; - tree->opcode = OP_X86_ADD_MEMBASE; + tree->opcode = OP_X86_ADD_REG_MEMBASE; mono_bblock_add_inst (s->cbb, tree); } @@ -683,7 +672,7 @@ reg: CEE_SUB(reg, CEE_LDIND_I4 (base)) { tree->sreg1 = state->left->reg1; tree->sreg2 = base->inst_basereg; tree->inst_offset = base->inst_offset; - tree->opcode = OP_X86_SUB_MEMBASE; + tree->opcode = OP_X86_SUB_REG_MEMBASE; mono_bblock_add_inst (s->cbb, tree); } @@ -694,10 +683,17 @@ reg: CEE_MUL(reg, CEE_LDIND_I4 (base)) { tree->sreg1 = state->left->reg1; tree->sreg2 = base->inst_basereg; tree->inst_offset = base->inst_offset; - tree->opcode = OP_X86_MUL_MEMBASE; + tree->opcode = OP_X86_MUL_REG_MEMBASE; mono_bblock_add_inst (s->cbb, tree); } +reg: OP_IMIN (reg, reg), +reg: OP_IMIN_UN (reg, reg), +reg: OP_IMAX (reg, reg), +reg: OP_IMAX_UN (reg, reg) { + MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1); +} + lreg: OP_LSHL (lreg, reg) "0" { MONO_EMIT_BIALU (s, tree, tree->opcode, state->reg1, state->left->reg1, state->right->reg1); } @@ -723,31 +719,21 @@ lreg: OP_LSHR_UN (lreg, OP_ICONST) "0" { } reg: OP_ATOMIC_ADD_NEW_I4 (base, reg), -reg: OP_ATOMIC_ADD_I4 (base, reg) { +reg: OP_ATOMIC_ADD_I4 (base, reg), +reg: OP_ATOMIC_EXCHANGE_I4 (base, reg), +reg: OP_ATOMIC_CAS_IMM_I4 (base, reg) { tree->opcode = tree->opcode; - tree->inst_basereg = state->left->tree->inst_basereg; - tree->inst_offset = state->left->tree->inst_offset; tree->dreg = state->reg1; tree->sreg2 = state->right->reg1; - - mono_bblock_add_inst (s->cbb, tree); -} - -reg: OP_ATOMIC_EXCHANGE_I4 (base, reg) { - tree->opcode = OP_ATOMIC_EXCHANGE_I4; - tree->dreg = state->reg1; - tree->sreg2 = state->right->reg1; - tree->inst_basereg = state->left->tree->inst_basereg; - tree->inst_offset = state->left->tree->inst_offset; + tree->inst_basereg = state->left->tree->inst_basereg; + tree->inst_offset = state->left->tree->inst_offset; mono_bblock_add_inst (s->cbb, tree); } # Optimized call instructions -# mono_arch_patch_delegate_trampoline depends on these reg: OP_CALL_REG (CEE_LDIND_I (base)), -freg: OP_FCALL_REG (CEE_LDIND_I (base)), -reg: OP_LCALL_REG (CEE_LDIND_I (base)) { +freg: OP_FCALL_REG (CEE_LDIND_I (base)) { tree->opcode = call_reg_to_call_membase (tree->opcode); tree->inst_basereg = state->left->left->tree->inst_basereg; tree->inst_offset = state->left->left->tree->inst_offset;