X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=mono%2Fmini%2Fcpu-g4.md;h=60fdad24e7217767010617f7089aa019fb14c00a;hb=475160aa78bf3c02b64de059d823e58a4faf2b35;hp=1368e327ce93bc0b29fb59ff182d680a312e6c79;hpb=a74a3b47fd8aaf1e2e2bc05c11b41748d391cc89;p=mono.git

diff --git a/mono/mini/cpu-g4.md b/mono/mini/cpu-g4.md
index 1368e327ce9..60fdad24e72 100644
--- a/mono/mini/cpu-g4.md
+++ b/mono/mini/cpu-g4.md
@@ -45,6 +45,7 @@
 #
 # See the code in mini-x86.c for more details on how the specifiers are used.
 #
+memory_barrier: len:4
 nop: len:4
 break: len:4
 ldarg.0:
@@ -84,7 +85,7 @@ ldc.r8:
 dup:
 pop:
 jmp: len:92
-call: dest:a clob:c len:4
+call: dest:a clob:c len:16
 calli:
 ret:
 br.s:
@@ -135,10 +136,10 @@ stind.r8: src1:b src2:f
 add: dest:i src1:i src2:i len:4
 sub: dest:i src1:i src2:i len:4
 mul: dest:i src1:i src2:i len:4
-div: dest:i src1:i src2:i len:4
-div.un: dest:i src1:i src2:i len:4
-rem: dest:i src1:i src2:i len:12
-rem.un: dest:i src1:i src2:i len:12
+div: dest:i src1:i src2:i len:40
+div.un: dest:i src1:i src2:i len:16
+rem: dest:i src1:i src2:i len:48
+rem.un: dest:i src1:i src2:i len:24
 and: dest:i src1:i src2:i len:4
 or: dest:i src1:i src2:i len:4
 xor: dest:i src1:i src2:i len:4
@@ -162,9 +163,10 @@ ldstr:
 newobj:
 castclass:
 isinst:
-conv.r.un: dest:f src1:i len:28
+conv.r.un: dest:f src1:i len:32
 unbox:
-throw: src1:i len:8
+throw: src1:i len:20
+op_rethrow: src1:i len:20
 ldfld:
 ldflda:
 stfld:
@@ -214,7 +216,7 @@ conv.ovf.u4:
 conv.ovf.i8:
 conv.ovf.u8:
 refanyval:
-ckfinite: dest:f src1:f len:22
+ckfinite: dest:f src1:f len:24
 mkrefany:
 ldtoken:
 conv.u2: dest:i src1:i len:4
@@ -222,14 +224,18 @@ conv.u1: dest:i src1:i len:4
 conv.i: dest:i src1:i len:4
 conv.ovf.i:
 conv.ovf.u:
-add.ovf:
-add.ovf.un:
-mul.ovf: dest:i src1:i src2:i len:8
+add.ovf: dest:i src1:i src2:i len:16
+add.ovf.un: dest:i src1:i src2:i len:16
+mul.ovf: dest:i src1:i src2:i len:16
 # this opcode is handled specially in the code generator
-mul.ovf.un: dest:i src1:i src2:i len:12
-sub.ovf:
-sub.ovf.un:
-start_handler: len:8
+mul.ovf.un: dest:i src1:i src2:i len:16
+sub.ovf: dest:i src1:i src2:i len:16
+sub.ovf.un: dest:i src1:i src2:i len:16
+add_ovf_carry: dest:i src1:i src2:i len:16
+sub_ovf_carry: dest:i src1:i src2:i len:16
+add_ovf_un_carry: dest:i src1:i src2:i len:16
+sub_ovf_un_carry: dest:i src1:i src2:i len:16
+start_handler: len:16
 endfinally: len:12
 leave:
 leave.s:
@@ -257,7 +263,7 @@ starg:
 ldloc:
 ldloca:
 stloc:
-localloc: dest:i src1:i len:30
+localloc: dest:i src1:i len:60
 endfilter: len:12
 unaligned.:
 volatile.:
@@ -270,10 +276,6 @@ sizeof:
 refanytype:
 illegal:
 endmac:
-mono_func1:
-mono_proc2:
-mono_proc3:
-mono_free:
 mono_objaddr:
 mono_ldptr:
 mono_vtaddr:
@@ -290,6 +292,7 @@ fcompare: src1:f src2:f len:12
 lcompare:
 local:
 arg:
+oparglist: src1:i len:12
 outarg: src1:i len:1
 outarg_imm: len:5
 retarg:
@@ -299,16 +302,16 @@ setreg: dest:i src1:i len:4 clob:r
 setregimm: dest:i len:8 clob:r
 setfreg: dest:f src1:f len:4 clob:r
 checkthis: src1:b len:4
-voidcall: len:8 clob:c
+voidcall: len:16 clob:c
 voidcall_reg: src1:i len:8 clob:c
 voidcall_membase: src1:b len:12 clob:c
-fcall: dest:f len:8 clob:c
+fcall: dest:f len:16 clob:c
 fcall_reg: dest:f src1:i len:8 clob:c
 fcall_membase: dest:f src1:b len:12 clob:c
-lcall: dest:l len:8 clob:c
+lcall: dest:l len:16 clob:c
 lcall_reg: dest:l src1:i len:8 clob:c
 lcall_membase: dest:l src1:b len:12 clob:c
-vcall: len:8 clob:c
+vcall: len:16 clob:c
 vcall_reg: src1:i len:8 clob:c
 vcall_membase: src1:b len:12 clob:c
 call_reg: dest:a src1:i len:8 clob:c
@@ -322,18 +325,18 @@ regvar:
 reg:
 regoffset:
 label:
-store_membase_imm: dest:b len:12
-store_membase_reg: dest:b src1:i len:8
-storei1_membase_imm: dest:b len:12
-storei1_membase_reg: dest:b src1:i len:8
-storei2_membase_imm: dest:b len:12
-storei2_membase_reg: dest:b src1:i len:8
-storei4_membase_imm: dest:b len:12
-storei4_membase_reg: dest:b src1:i len:8
+store_membase_imm: dest:b len:20
+store_membase_reg: dest:b src1:i len:12
+storei1_membase_imm: dest:b len:20
+storei1_membase_reg: dest:b src1:i len:12
+storei2_membase_imm: dest:b len:20
+storei2_membase_reg: dest:b src1:i len:12
+storei4_membase_imm: dest:b len:20
+storei4_membase_reg: dest:b src1:i len:12
 storei8_membase_imm: dest:b 
 storei8_membase_reg: dest:b src1:i 
-storer4_membase_reg: dest:b src1:f len:8
-storer8_membase_reg: dest:b src1:f len:8
+storer4_membase_reg: dest:b src1:f len:16
+storer8_membase_reg: dest:b src1:f len:12
 load_membase: dest:i src1:b len:12
 loadi1_membase: dest:i src1:b len:12
 loadu1_membase: dest:i src1:b len:12
@@ -342,7 +345,7 @@ loadu2_membase: dest:i src1:b len:12
 loadi4_membase: dest:i src1:b len:12
 loadu4_membase: dest:i src1:b len:12
 loadi8_membase: dest:i src1:b
-loadr4_membase: dest:f src1:b len:8
+loadr4_membase: dest:f src1:b len:12
 loadr8_membase: dest:f src1:b len:12
 loadu4_mem: dest:i len:8
 move: dest:i src1:i len:4
@@ -353,9 +356,9 @@ mul_imm: dest:i src1:i len:12
 # there is no actual support for division or reminder by immediate
 # we simulate them, though (but we need to change the burg rules 
 # to allocate a symbolic reg for src2)
-div_imm: dest:i src1:i src2:i len:12
+div_imm: dest:i src1:i src2:i len:20
 div_un_imm: dest:i src1:i src2:i len:12
-rem_imm: dest:i src1:i src2:i len:16
+rem_imm: dest:i src1:i src2:i len:28
 rem_un_imm: dest:i src1:i src2:i len:16
 and_imm: dest:i src1:i len:12
 or_imm: dest:i src1:i len:12
@@ -373,9 +376,9 @@ cond_exc_ge: len:8
 cond_exc_ge_un: len:8
 cond_exc_le: len:8
 cond_exc_le_un: len:8
-cond_exc_ov: len:8
+cond_exc_ov: len:12
 cond_exc_no: len:8
-cond_exc_c: len:8
+cond_exc_c: len:12
 cond_exc_nc: len:8
 long_add:
 long_sub:
@@ -403,7 +406,7 @@ long_conv_to_u8:
 long_conv_to_u2:
 long_conv_to_u1:
 long_conv_to_i:
-long_conv_to_ovf_i: dest:i src1:i src2:i len:30
+long_conv_to_ovf_i: dest:i src1:i src2:i len:32
 long_conv_to_ovf_u:
 long_add_ovf:
 long_add_ovf_un:
@@ -509,41 +512,25 @@ float_conv_to_ovf_i8:
 float_conv_to_ovf_u8:
 float_ceq: dest:i src1:f src2:f len:16
 float_cgt: dest:i src1:f src2:f len:16
-float_cgt_un: dest:i src1:f src2:f len:16
+float_cgt_un: dest:i src1:f src2:f len:20
 float_clt: dest:i src1:f src2:f len:16
-float_clt_un: dest:i src1:f src2:f len:16
+float_clt_un: dest:i src1:f src2:f len:20
 float_conv_to_u: dest:i src1:f len:36
 call_handler: len:12
-op_endfilter: src1:i len:12
+op_endfilter: src1:i len:16
 aot_const: dest:i len:8
-x86_test_null: src1:i len:4
-x86_compare_membase_reg: src1:b src2:i len:8
-x86_compare_membase_imm: src1:b len:8
-x86_compare_reg_membase: src1:i src2:b len:8
-x86_inc_reg: dest:i src1:i clob:1 len:1
-x86_inc_membase: src1:b len:6
-x86_dec_reg: dest:i src1:i clob:1 len:1
-x86_dec_membase: src1:b len:6
-x86_add_membase_imm: src1:b len:8
-x86_sub_membase_imm: src1:b len:8
-x86_push: src1:i len:1
-x86_push_imm: len:5
-x86_push_membase: src1:b len:6
-x86_push_obj: src1:b len:30
-x86_lea: dest:i src1:i src2:i len:7
-x86_xchg: src1:i src2:i clob:x len:1
-x86_fpop: src1:f len:2
-x86_fp_load_i8: dest:f src1:b len:7
-x86_fp_load_i4: dest:f src1:b len:7
 sqrt: dest:f src1:f len:4
 adc: dest:i src1:i src2:i len:4
 addcc: dest:i src1:i src2:i len:4
 subcc: dest:i src1:i src2:i len:4
 adc_imm: dest:i src1:i len:12
+addcc_imm: dest:i src1:i len:12
+subcc_imm: dest:i src1:i len:12
 sbb: dest:i src1:i src2:i len:4
 sbb_imm: dest:i src1:i len:12
 br_reg: src1:i len:8
 ppc_subfic: dest:i src1:i len:4
 ppc_subfze: dest:i src1:i len:4
-op_bigmul: len:2 dest:l src1:a src2:i
-op_bigmul_un: len:2 dest:l src1:a src2:i
+op_bigmul: len:8 dest:l src1:i src2:i
+op_bigmul_un: len:8 dest:l src1:i src2:i
+tls_get: len:8 dest:i