X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=dt%2Fdt.qsf;h=813526896b46f3fa9a18f8716c846e514204f78b;hb=f48e21061aebe0f0761047e8b79bff312f028abf;hp=82bfa845a02352187668deceb1298318152bbdb1;hpb=64ef7ca2830116409f4c23802a202ab4b1ce5ec8;p=calu.git

diff --git a/dt/dt.qsf b/dt/dt.qsf
index 82bfa84..8135268 100644
--- a/dt/dt.qsf
+++ b/dt/dt.qsf
@@ -44,7 +44,6 @@ set_global_assignment -name PROJECT_CREATION_TIME_DATE "15:08:54  DECEMBER 16, 2
 set_global_assignment -name LAST_QUARTUS_VERSION "10.0 SP1"
 set_global_assignment -name DEVICE_FILTER_PIN_COUNT 240
 set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
-set_global_assignment -name USE_CONFIGURATION_DEVICE ON
 set_global_assignment -name GENERATE_RBF_FILE ON
 set_global_assignment -name ON_CHIP_BITSTREAM_DECOMPRESSION OFF
 set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED"
@@ -55,13 +54,35 @@ set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_RO
 set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
 set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
 set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
-set_global_assignment -name MISC_FILE /homes/burban/dt/dt.dpf
-set_location_assignment PIN_166 -to bus_tx
-set_location_assignment PIN_152 -to sys_clk
+set_location_assignment PIN_178 -to bus_tx
+set_location_assignment PIN_153 -to bus_rx
+set_location_assignment PIN_166 -to led2
+set_location_assignment PIN_42 -to sys_res
 set_global_assignment -name RESERVE_ALL_UNUSED_PINS_NO_OUTPUT_GND "AS INPUT TRI-STATED"
 
-set_global_assignment -name MISC_FILE /homes/c0726283/calu/dt/dt.dpf
-set_location_assignment PIN_42 -to sys_res
+
+set_global_assignment -name SMART_RECOMPILE ON
+set_global_assignment -name ENABLE_DRC_SETTINGS ON
+set_global_assignment -name ENABLE_CLOCK_LATENCY ON
+set_global_assignment -name ENABLE_RECOVERY_REMOVAL_ANALYSIS ON
+set_global_assignment -name CYCLONE_OPTIMIZATION_TECHNIQUE SPEED
+set_global_assignment -name PHYSICAL_SYNTHESIS_COMBO_LOGIC ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_DUPLICATION ON
+set_global_assignment -name PHYSICAL_SYNTHESIS_REGISTER_RETIMING ON
+set_global_assignment -name ROUTER_LCELL_INSERTION_AND_LOGIC_DUPLICATION ON
+set_global_assignment -name ROUTER_TIMING_OPTIMIZATION_LEVEL MAXIMUM
+set_global_assignment -name AUTO_PACKED_REGISTERS_CYCLONE NORMAL
+set_global_assignment -name FITTER_EFFORT "STANDARD FIT"
+set_global_assignment -name ADV_NETLIST_OPT_SYNTH_WYSIWYG_REMAP ON
+set_global_assignment -name MUX_RESTRUCTURE OFF
+set_global_assignment -name OPTIMIZE_HOLD_TIMING "ALL PATHS"
+set_global_assignment -name FMAX_REQUIREMENT "50 MHz"
+
+
+
+
+set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram_be_b.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram_be.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/rom.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/rom_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/extension_7seg_pkg.vhd
@@ -79,13 +100,20 @@ set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/r_w_ram.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/r2_w_ram_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/r2_w_ram.vhd
-set_global_assignment -name VHDL_FILE ../cpu/src/pipeline_tb.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/mem_pkg.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/fetch_stage_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/fetch_stage.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/extension_uart_pkg.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/extension_uart_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/extension_uart.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_imp_pkg.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_imp_b.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_imp.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_interrupt_b.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_interrupt.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_timer_pkg.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_timer_b.vhd
+set_global_assignment -name VHDL_FILE ../cpu/src/extension_timer.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/extension_pkg.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/extension_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/extension.vhd
@@ -107,4 +135,11 @@ set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/shift_op_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/or_op_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/and_op_b.vhd
 set_global_assignment -name VHDL_FILE ../cpu/src/exec_op/add_op_b.vhd
+set_location_assignment PIN_41 -to soft_res
+set_global_assignment -name MISC_FILE /homes/c0725782/calu/dt/dt.dpf
+
+
+set_global_assignment -name VHDL_FILE pll/pll.vhd
+set_location_assignment PIN_152 -to sys_clk_in
+
 set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top
\ No newline at end of file