X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Fwriteback_stage_b.vhd;h=fd26a297b8e5727e9f5c2d975c600cb9b35115fd;hb=2327979859866316a3146dba133b722e72bedfb1;hp=7b57d4565c89592569fb72f709353497718d054d;hpb=5130edf957093ec77de6fe731115ef738f7a2ef5;p=calu.git

diff --git a/cpu/src/writeback_stage_b.vhd b/cpu/src/writeback_stage_b.vhd
index 7b57d45..fd26a29 100755
--- a/cpu/src/writeback_stage_b.vhd
+++ b/cpu/src/writeback_stage_b.vhd
@@ -34,6 +34,22 @@ begin
 	ext_timer_out <= (others => '0'); --TODO: delete when timer is connected
 	ext_gpmp_out <= (others => '0'); --TODO: delete when gpm is connected
 
+	spartan3e: if FPGATYPE = "s3e" generate
+		data_ram : ram_xilinx
+		generic map (
+			DATA_ADDR_WIDTH
+		)
+		port map (
+			clk,
+			data_addr(DATA_ADDR_WIDTH+1 downto 2),
+			wb_reg_nxt.byte_en,
+			dmem_we,
+			wb_reg_nxt.data, --ram_data,
+			data_ram_read
+		);
+	end generate;
+	-- else generate gibt es erst mit vhdl 2008 ...
+	altera: if FPGATYPE /= "s3e" generate
 	data_ram : r_w_ram_be
 		generic map (
 			DATA_ADDR_WIDTH
@@ -48,6 +64,7 @@ begin
 			wb_reg_nxt.data, --ram_data,
 			data_ram_read
 		);
+	end generate;
 
 uart : extension_uart 
 	generic	map(
@@ -77,6 +94,7 @@ imp : extension_imp
 			new_im_data_out
 		);
 	
+	altera_7seg: if FPGATYPE /= "s3e" generate
 sseg : extension_7seg
 	generic map(
 		RESET_VALUE
@@ -90,6 +108,7 @@ sseg : extension_7seg
 		sseg2,
 		sseg3
 		);
+	end generate;
 
 interrupt : extension_interrupt
 	generic map(