X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Fr_w_ram_b.vhd;fp=cpu%2Fsrc%2Fr_w_ram_b.vhd;h=a120a29dd6263a1f5226ad2e1ff4f5236a7de1a0;hb=cde0d011bc1b001e7d6bd5b9d3d3678e4cd7e2e7;hp=e735c203e428d8429ad454e54fff09d9798bb59b;hpb=5d59b3cc12c9e042cdc1c5b3b538f589e94d34c8;p=calu.git

diff --git a/cpu/src/r_w_ram_b.vhd b/cpu/src/r_w_ram_b.vhd
index e735c20..a120a29 100644
--- a/cpu/src/r_w_ram_b.vhd
+++ b/cpu/src/r_w_ram_b.vhd
@@ -10,7 +10,7 @@ architecture behaviour of r_w_ram is
 	subtype RAM_ENTRY_TYPE is std_logic_vector(DATA_WIDTH -1 downto 0);
 	type RAM_TYPE is array (0 to (2**ADDR_WIDTH)-1) of RAM_ENTRY_TYPE;
 	
-	signal ram : RAM_TYPE;
+	signal ram : RAM_TYPE := (others => x"00000000");
 	
 begin
 	process(clk)