X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Fr2_w_ram_b.vhd;h=2ea1409fdbdeda2b1d7de10682e3b1a4272b24f6;hb=1968f329b10681b760faec9369aa893cd2af8d44;hp=84a3a94b150f6747a4319645f7c37f86e01810c3;hpb=5356e3e07b4c3f16d4f2494100e2c4e937cb0e5b;p=calu.git diff --git a/cpu/src/r2_w_ram_b.vhd b/cpu/src/r2_w_ram_b.vhd index 84a3a94..2ea1409 100644 --- a/cpu/src/r2_w_ram_b.vhd +++ b/cpu/src/r2_w_ram_b.vhd @@ -1,3 +1,24 @@ +-- `Deep Thought', a softcore CPU implemented on a FPGA +-- +-- Copyright (C) 2010 Markus Hofstaetter +-- Copyright (C) 2010 Martin Perner +-- Copyright (C) 2010 Stefan Rebernig +-- Copyright (C) 2010 Manfred Schwarz +-- Copyright (C) 2010 Bernhard Urban +-- +-- This program is free software: you can redistribute it and/or modify +-- it under the terms of the GNU General Public License as published by +-- the Free Software Foundation, either version 3 of the License, or +-- (at your option) any later version. +-- +-- This program is distributed in the hope that it will be useful, +-- but WITHOUT ANY WARRANTY; without even the implied warranty of +-- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +-- GNU General Public License for more details. +-- +-- You should have received a copy of the GNU General Public License +-- along with this program. If not, see . + library ieee; use IEEE.std_logic_1164.all; @@ -10,7 +31,12 @@ architecture behaviour of r2_w_ram is subtype RAM_ENTRY_TYPE is std_logic_vector(DATA_WIDTH -1 downto 0); type RAM_TYPE is array (0 to (2**ADDR_WIDTH)-1) of RAM_ENTRY_TYPE; - signal ram : RAM_TYPE := (others=> x"00000001"); + signal ram : RAM_TYPE := ( + 0 => x"00000000", + 1 => x"00000000", + 2 => x"00000000", + 3 => x"00000000", + others=> (others => '0')); begin process(clk)