X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Ffetch_stage_b.vhd;h=f86ad833a154e049e2d32fa3d79c5b5ef8c69f87;hb=0264f96d1b4a6929802afbaec97b24a298f902c9;hp=1836f3a34b6c202fe2c6b40b7d9ba14e34be3f08;hpb=9e8a37bd8a173779f661ded4ac91cbd9932b744b;p=calu.git

diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd
index 1836f3a..f86ad83 100644
--- a/cpu/src/fetch_stage_b.vhd
+++ b/cpu/src/fetch_stage_b.vhd
@@ -52,20 +52,22 @@ begin
 
 	if (reset = RESET_VALUE) then
 		instr_r_addr <= (others => '0');
-		rom_ram <= ROM_USE;	
+		rom_ram <= ROM_USE;
+		led2 <= '0';
 	elsif rising_edge(clk) then
 		instr_r_addr <= instr_r_addr_nxt;		
 		rom_ram <= rom_ram_nxt;
+		led2 <= rom_ram; --rom_ram_nxt;
 	end if;
 	
 end process; 
 
 
-asyn: process(reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req)
-
+asyn: process(reset, s_reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req)
+variable instr_pc  : instruction_addr_t;
 begin
 	rom_ram_nxt <= rom_ram;
-
+	
 	case rom_ram is
 		when ROM_USE =>
 			instruction <= instr_rd_data_rom;
@@ -74,13 +76,15 @@ begin
 		when others => 
 			instruction <= x"F0000000";
 	end case;
-	instr_r_addr_nxt <= std_logic_vector(unsigned(instr_r_addr) + 1);
+	instr_pc := std_logic_vector(unsigned(instr_r_addr) + 1);
+	instr_r_addr_nxt <= instr_pc;
 
-	if (instr_r_addr(ROM_INSTR_ADDR_WIDTH) = '1' and rom_ram = ROM_USE) then
+	if (instr_pc = x"0000007f" and rom_ram = ROM_USE) then
 		rom_ram_nxt <= RAM_USE;
-		instr_r_addr_nxt <= (others => '0');
+		-- TODO: wenn genau auf adresse 0 im RAM ein br steht kracht es... :/
+		instr_r_addr_nxt <= x"00000000";
 	end if;
-	
+
 	if (reset = RESET_VALUE) then
 		instr_r_addr_nxt <= (others => '0');
 	end if;
@@ -106,6 +110,11 @@ begin
 		when others => null;
 	end case;
 
+	if (s_reset = RESET_VALUE) then
+		rom_ram_nxt <= RAM_USE;
+		instr_r_addr_nxt <= (others => '0');
+	end if;	
+
 end process;
 
 out_logic : process (instr_r_addr, alu_jump_bit, int_req, jump_result)