X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Ffetch_stage_b.vhd;h=c975af29702992b673c6c8fce467f19ba2ceeb20;hb=250b78e68b59bb5639dba5f0f3e2b23cbe71f823;hp=3f4650da12cc6b8c8ef2ce71c795f718453a7032;hpb=7c21f901c3a852725bec1e9691627c3280ad6ae0;p=calu.git

diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd
index 3f4650d..c975af2 100644
--- a/cpu/src/fetch_stage_b.vhd
+++ b/cpu/src/fetch_stage_b.vhd
@@ -26,10 +26,10 @@ begin
 		
 		port map (
 			clk,
-			instr_w_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
+			im_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
 			instr_r_addr_nxt(PHYS_INSTR_ADDR_WIDTH-1 downto 0),
-			instr_we,
-			instr_wr_data,
+			new_im_data_in,
+			im_data,
 			instr_rd_data
 		);
 		
@@ -53,20 +53,26 @@ begin
 	if (reset = RESET_VALUE) then
 		instr_r_addr <= (others => '0');
 		rom_ram <= ROM_USE;
+		led2 <= '0';
 	elsif rising_edge(clk) then
 		instr_r_addr <= instr_r_addr_nxt;		
 		rom_ram <= rom_ram_nxt;
+		led2 <= rom_ram; --rom_ram_nxt;
 	end if;
 	
 end process; 
 
 
-asyn: process(reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req)
-
+asyn: process(reset, s_reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req)
+variable instr_pc  : instruction_addr_t;
 begin
-
 	rom_ram_nxt <= rom_ram;
-
+	
+--	if (s_reset = RESET_VALUE) then
+--		rom_ram_nxt <= RAM_USE;
+--		instr_r_addr_nxt <= (others => '0');
+--	end if;
+	
 	case rom_ram is
 		when ROM_USE =>
 			instruction <= instr_rd_data_rom;
@@ -75,18 +81,20 @@ begin
 		when others => 
 			instruction <= x"F0000000";
 	end case;
-	instr_r_addr_nxt <= std_logic_vector(unsigned(instr_r_addr) + 1);
+	instr_pc := std_logic_vector(unsigned(instr_r_addr) + 1);
+	instr_r_addr_nxt <= instr_pc;
 
-	if (instr_r_addr(ROM_INSTR_ADDR_WIDTH) = '1' and rom_ram = ROM_USE) then
+	if (instr_pc = x"0000007f" and rom_ram = ROM_USE) then
 		rom_ram_nxt <= RAM_USE;
-		instr_r_addr_nxt <= (others => '0');
+		-- TODO: wenn genau auf adresse 0 im RAM ein br steht kracht es... :/
+		instr_r_addr_nxt <= x"00000000";
 	end if;
-	
+
 	if (reset = RESET_VALUE) then
 		instr_r_addr_nxt <= (others => '0');
 	end if;
 
-	if (alu_jump_bit = LOGIC_ACT) then
+	if (alu_jump_bit = LOGIC_ACT and int_req = IDLE) then
 		instr_r_addr_nxt <= jump_result;
 		instruction(31 downto 28) <= "1111";	
 	elsif (branch_prediction_bit = LOGIC_ACT) then
@@ -102,14 +110,24 @@ begin
 			instruction(6 downto 4) <= "001";
 			instruction(3 downto 2) <= "01";
 			instruction(1 downto 0) <= "10";
- 
+
+--			instr_r_addr_nxt <= instr_r_addr; 
 		when others => null;
 	end case;
 
 end process;
 
-prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0)));
-prog_cnt(31 downto 11) <= (others => '0');
+out_logic : process (instr_r_addr, alu_jump_bit, int_req, jump_result)
+
+begin
+	prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0)));
+	prog_cnt(31 downto 11) <= (others => '0');
+
+	if (int_req /= IDLE and alu_jump_bit = LOGIC_ACT ) then
+		prog_cnt(10 downto 0) <= jump_result(10 downto 0);
+	end if;
+
+end process;
 
 end behav;