X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Ffetch_stage_b.vhd;h=7e2032dde0c270bd01a0057de2d81dc28cbb1ac0;hb=0ba0c7effbaf554ad42db51334581859a0570bfa;hp=3e30cdad0b572a75022180de1fde346a12e3d1f2;hpb=c825fc85f09d82a5b6336df4a0846c2487b44dfb;p=calu.git diff --git a/cpu/src/fetch_stage_b.vhd b/cpu/src/fetch_stage_b.vhd index 3e30cda..7e2032d 100644 --- a/cpu/src/fetch_stage_b.vhd +++ b/cpu/src/fetch_stage_b.vhd @@ -26,10 +26,10 @@ begin port map ( clk, - instr_w_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0), + im_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0), instr_r_addr_nxt(PHYS_INSTR_ADDR_WIDTH-1 downto 0), - instr_we, - instr_wr_data, + new_im_data_in, + im_data, instr_rd_data ); @@ -52,20 +52,22 @@ begin if (reset = RESET_VALUE) then instr_r_addr <= (others => '0'); - rom_ram <= ROM_USE; + rom_ram <= ROM_USE; + led2 <= '0'; elsif rising_edge(clk) then instr_r_addr <= instr_r_addr_nxt; rom_ram <= rom_ram_nxt; + led2 <= rom_ram; --rom_ram_nxt; end if; end process; -asyn: process(reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req) - +asyn: process(reset, s_reset, instr_r_addr, jump_result, prediction_result, branch_prediction_bit, alu_jump_bit, instr_rd_data, rom_ram, instr_rd_data_rom, int_req) +variable instr_pc : instruction_addr_t; begin rom_ram_nxt <= rom_ram; - + case rom_ram is when ROM_USE => instruction <= instr_rd_data_rom; @@ -74,13 +76,14 @@ begin when others => instruction <= x"F0000000"; end case; - instr_r_addr_nxt <= std_logic_vector(unsigned(instr_r_addr) + 1); + instr_pc := std_logic_vector(unsigned(instr_r_addr) + 1); + instr_r_addr_nxt <= instr_pc; - if (instr_r_addr(ROM_INSTR_ADDR_WIDTH) = '1' and rom_ram = ROM_USE) then + if (instr_pc = x"0000007f" and rom_ram = ROM_USE) then rom_ram_nxt <= RAM_USE; instr_r_addr_nxt <= (others => '0'); end if; - + if (reset = RESET_VALUE) then instr_r_addr_nxt <= (others => '0'); end if; @@ -106,16 +109,21 @@ begin when others => null; end case; + if (s_reset = RESET_VALUE) then + rom_ram_nxt <= RAM_USE; + instr_r_addr_nxt <= (others => '0'); + end if; + end process; out_logic : process (instr_r_addr, alu_jump_bit, int_req, jump_result) begin - prog_cnt(10 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0))); - prog_cnt(31 downto 11) <= (others => '0'); + prog_cnt(PHYS_INSTR_ADDR_WIDTH-1 downto 0) <= std_logic_vector(unsigned(instr_r_addr(PHYS_INSTR_ADDR_WIDTH-1 downto 0))); + prog_cnt(INSTR_ADDR_WIDTH-1 downto PHYS_INSTR_ADDR_WIDTH) <= (others => '0'); if (int_req /= IDLE and alu_jump_bit = LOGIC_ACT ) then - prog_cnt(10 downto 0) <= jump_result(10 downto 0); + prog_cnt(PHYS_INSTR_ADDR_WIDTH-1 downto 0) <= jump_result(PHYS_INSTR_ADDR_WIDTH-1 downto 0); end if; end process;