X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Ffetch_stage.vhd;fp=cpu%2Fsrc%2Ffetch_stage.vhd;h=c81e2ac14affda3e8addf55cbd590b220cf3a1d4;hb=830d494c7fbbd0591e185378d8cf8085673e6b8c;hp=0000000000000000000000000000000000000000;hpb=3243375cd7bdeccefc6fc3d2372260aac65c4d13;p=calu.git

diff --git a/cpu/src/fetch_stage.vhd b/cpu/src/fetch_stage.vhd
new file mode 100644
index 0000000..c81e2ac
--- /dev/null
+++ b/cpu/src/fetch_stage.vhd
@@ -0,0 +1,31 @@
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+
+use work.common_pkg;
+
+entity fetch_stage is
+
+	generic	(
+			-- active reset value
+			RESET_VALUE : std_logic;
+			-- active logic value
+			LOGIC_ACT : std_logic;
+			
+			);
+	port(
+		--System inputs
+			clk : in std_logic;
+			reset : in std_logic;
+		
+		--Data inputs
+			jump_result : in instruction_addr_t;
+			prediction_result : in instruction_addr_t;
+			branch_prediction_bit : in std_logic;
+			alu_jump_bit : in std_logic;
+
+		--Data outputs
+			instruction : out instruction_word_t
+		);
+		
+end fetch_stage;