X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsrc%2Fexec_op%2Fxor_op_b.vhd;h=1a006fca75002bd8b25be9a1357ecd22172ea0d0;hb=1968f329b10681b760faec9369aa893cd2af8d44;hp=62c7db8e071a7ccbe65d391104db5ab156641e40;hpb=b9d8ef6cdcd9cacadb75193ad9a44d1d821320ce;p=calu.git

diff --git a/cpu/src/exec_op/xor_op_b.vhd b/cpu/src/exec_op/xor_op_b.vhd
old mode 100755
new mode 100644
index 62c7db8..1a006fc
--- a/cpu/src/exec_op/xor_op_b.vhd
+++ b/cpu/src/exec_op/xor_op_b.vhd
@@ -1,22 +1,43 @@
-library IEEE;
-use IEEE.std_logic_1164.all;
-use IEEE.numeric_std.all;
-
-use work.common_pkg.all;
-use work.alu_pkg.all;
-
-architecture xor_op of exec_op is
-begin
-
-calc: process(left_operand, right_operand, alu_state)
-	variable alu_result_v : alu_result_rec;
-	
-begin
-		alu_result_v := alu_state;
-		
-		alu_result_v.result := left_operand xor right_operand;
-		
-		alu_result <= alu_result_v;
-end process; 
-
-end architecture xor_op;
+--   `Deep Thought', a softcore CPU implemented on a FPGA
+--
+--  Copyright (C) 2010 Markus Hofstaetter <markus.manrow@gmx.at>
+--  Copyright (C) 2010 Martin Perner <e0725782@student.tuwien.ac.at>
+--  Copyright (C) 2010 Stefan Rebernig <stefan.rebernig@gmail.com>
+--  Copyright (C) 2010 Manfred Schwarz <e0725898@student.tuwien.ac.at>
+--  Copyright (C) 2010 Bernhard Urban <lewurm@gmail.com>
+--
+--  This program is free software: you can redistribute it and/or modify
+--  it under the terms of the GNU General Public License as published by
+--  the Free Software Foundation, either version 3 of the License, or
+--  (at your option) any later version.
+--
+--  This program is distributed in the hope that it will be useful,
+--  but WITHOUT ANY WARRANTY; without even the implied warranty of
+--  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+--  GNU General Public License for more details.
+--
+--  You should have received a copy of the GNU General Public License
+--  along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+library IEEE;
+use IEEE.std_logic_1164.all;
+use IEEE.numeric_std.all;
+
+use work.common_pkg.all;
+use work.alu_pkg.all;
+
+architecture xor_op of exec_op is
+begin
+
+calc: process(left_operand, right_operand, alu_state)
+	variable alu_result_v : alu_result_rec;
+	
+begin
+		alu_result_v := alu_state;
+		
+		alu_result_v.result := left_operand xor right_operand;
+		
+		alu_result <= alu_result_v;
+end process; 
+
+end architecture xor_op;