X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=cpu%2Fsim%2Ftestcore1.do;h=885a80f38a8ab1f38299e29f8cf5fc92824427fa;hb=0221dfbdde27d9a2113565b7cd0d9109e65513ee;hp=e9eaf934eee67eb11196185610b76808fede18ac;hpb=2d98d2f7b3eaa3afc1cc264725b2596184f1e6e3;p=calu.git

diff --git a/cpu/sim/testcore1.do b/cpu/sim/testcore1.do
index e9eaf93..885a80f 100644
--- a/cpu/sim/testcore1.do
+++ b/cpu/sim/testcore1.do
@@ -2,11 +2,14 @@ vlib work
 vmap work work
 
 vcom -work work ../src/mem_pkg.vhd
+vcom -work work ../src/rom.vhd
+vcom -work work ../src/rom_b.vhd
 vcom -work work ../src/r_w_ram.vhd
 vcom -work work ../src/r_w_ram_b.vhd
 vcom -work work ../src/r2_w_ram.vhd
 vcom -work work ../src/r2_w_ram_b.vhd
 vcom -work work ../src/common_pkg.vhd
+vcom -work work ../src/extension_pkg.vhd
 vcom -work work ../src/core_pkg.vhd
 vcom -work work ../src/decoder.vhd
 vcom -work work ../src/decoder_b.vhd
@@ -16,7 +19,6 @@ vcom -work work ../src/decode_stage.vhd
 vcom -work work ../src/decode_stage_b.vhd
 
 vcom -work work ../src/alu_pkg.vhd
-vcom -work work ../src/extension_pkg.vhd
 
 
 vcom -work work ../src/exec_op.vhd
@@ -37,9 +39,19 @@ vcom -work work ../src/extension.vhd
 vcom -work work ../src/extension_b.vhd
 
 
+vcom -work work ../src/extension_imp_pkg.vhd
+vcom -work work ../src/extension_imp.vhd
+vcom -work work ../src/extension_imp_b.vhd
+
+vcom -work work ../src/extension_7seg_pkg.vhd
+vcom -work work ../src/extension_7seg.vhd
+vcom -work work ../src/extension_7seg_b.vhd
+
 vcom -work work ../src/extension_uart_pkg.vhd
 vcom -work work ../src/rs232_tx.vhd
 vcom -work work ../src/rs232_tx_arc.vhd
+vcom -work work ../src/rs232_rx.vhd
+vcom -work work ../src/rs232_rx_arc.vhd
 vcom -work work ../src/extension_uart.vhd
 vcom -work work ../src/extension_uart_b.vhd
 
@@ -62,6 +74,7 @@ add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_r_add
 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/instr_rd_data
 add wave  -group fetchstageregister -radix hexadecimal /pipeline_tb/fetch_st/instruction
 add wave  -group fetchstage -format logic /pipeline_tb/fetch_st/branch_prediction_bit
+add wave  -group fetchstage -format logic /pipeline_tb/fetch_st/rom_ram
 add wave  -group fetchstage -radix hexadecimal /pipeline_tb/fetch_st/prediction_result
 
 add wave  -group decodestage -radix hexadecimal /pipeline_tb/decode_st/instruction
@@ -118,23 +131,13 @@ add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writebac
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/reg_addr
 add wave  -group writebackstageregister -radix hexadecimal /pipeline_tb/writeback_st/regfile_val
 
-
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/ext_uart
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/ext_reg
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w1_st_co_nxt
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w2_uart_config
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w3_uart_send
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/w4_uart_receive
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/data_out
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/new_tx_data
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/bus_tx
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/tx_data
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/tx_rdy
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/tx_rdy_int
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/sys_clk
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/cnt
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/rs232_tx_inst/stop_bit
-add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/uart/bd_rate
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/reg_we
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/write_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.dmem_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.dmem_write_en
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/ext_anysel
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/alu_jmp
+add wave  -group test -radix hexadecimal /pipeline_tb/writeback_st/wb_reg.address
 
 
 run 5000 ns