X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=2_isa%2Fsrc%2Fbootrom.s;h=87b7f83f1a508bbd913707b723f90962ada6ad48;hb=a80e63bb420d4ae8dee66703bca59035d672c9fb;hp=6732e260d62d200263044b6d5acfac429d24da64;hpb=bf5f1f4e2542213a095a288bad296f57004309cb;p=calu.git diff --git a/2_isa/src/bootrom.s b/2_isa/src/bootrom.s index 6732e26..87b7f83 100644 --- a/2_isa/src/bootrom.s +++ b/2_isa/src/bootrom.s @@ -1,65 +1,47 @@ .data .text - ; TODO: will the assembler be able to evaluate these expressions? - .define UART_BASE, 0x1000 - .define UART_STATUS, (UART_BASE+0x4) - .define UART_RECV, (UART_BASE+0x8) - .define UART_TRANS, (UART_BASE+0xC) - .define UART_BAUD, (UART_BAUD+0x10) - - .define UART_TRANS_EMPTY, 0 - .define UART_RECV_NEW, 1 - - .define TIMEOUT_START, 0x13371337 - .define DEFAULT_PROG_START, 0x200 - .define STACKSTART, 0x500 ; FIXME -;----- -main: - ; setup stackframe - ldil r15, STACKSTART@lo - ldih r15, STACKSTART@hi - movst r15 + .define UART_BASE, 0x2000 + .define UART_STATUS, 0x0 + .define UART_RECV, 0xc + .define UART_TRANS, 0x8 + + .define UART_TRANS_EMPTY, 0x1 + .define UART_RECV_NEW, 0x2 - ldil r3, TIMEOUT_START@lo - ldih r3, TIMEOUT_START@hi + .define PBASE, 0x2030 + .define PADDR, 0x4 + .define PDATA, 0x8 -timeout_loop: - ldil r3, UART_STATUS@lo - ldih r3, UART_STATUS@hi - ldw r3, 0(r3) - andi r3, r3, 1 << UART_RECV_NEW - branchzs+ next; branch if zero +;----- +start: + br+ main + br+ main + ret +main: + ldi r10, UART_BASE@lo + ldih r10, UART_BASE@hi + ldi r11, PBASE@lo + ldih r11, PBASE@hi +poll: call recv_byte ; we received the enter bootrom sign - cmp r0, 0x48 ; 'H' - brancheq- bt_H - -next: - subi r3, r3, 1 - branchnz+ timeout_loop - - ; call to default entry point - ldil r0, DEFAULT_PROG_START@lo - ldih r0, DEFAULT_PROG_START@hi - branchreg r0 + xor r1, r1, r1 + cmpi r0, 0x48 ; 'H' + breq+ bt_H + br poll ; else ;----- send_byte: - ldil r3, UART_STATUS@lo - ldih r3, UART_STATUS@hi - ldw r3, 0(r3) - andi r3, r3, 1 << UART_TRANS_EMPTY - branchzs+ send_byte ; branch if zero - ldil r3, UART_TRANS@lo - ldih r3, UART_TRANS@hi - stb r1, 0(r3) + ldw r3, UART_STATUS(r10) + andx r3, UART_TRANS_EMPTY + brnz+ send_byte ; branch if not zero + stw r1, UART_TRANS(r10) ret ;----- send_word: - ; TODO: loop? (less codesize...) lrs r0, r1, 0 call send_byte lrs r0, r1, 8 @@ -72,103 +54,111 @@ send_word: ;----- recv_byte: - ldil r3, UART_STATUS@lo - ldih r3, UART_STATUS@hi - ldw r3, 0(r3) - andi r3, r3, 1 << UART_RECV_NEW - branchzs+ send_byte ; branch if zero - ldil r3, UART_RECV@lo - ldih r3, UART_RECV@hi - lwb r0, 0(r3) + ldw r3, UART_STATUS(r10) + andx r3, UART_RECV_NEW + brzs+ recv_byte; branch if zero + xor r0, r0, r0 + ldw r0, UART_RECV(r10) ret ;----- recv_word: - ldisl r0, 0x0 + xor r1, r1, r1 call recv_byte - or r0, r0, r1 + or r1, r0, r1 call recv_byte - sll r1, r1, 8 - or r0, r0, r1 + lls r1, r1, 8 + or r1, r0, r1 call recv_byte - sll r1, r1, 16 - or r0, r0, r1 + lls r1, r1, 8 + or r1, r0, r1 call recv_byte - sll r1, r1, 24 - or r0, r0, r1 + lls r1, r1, 8 + or r1, r0, r1 + addi r0, r1, 0 ret - ;----- bootrom: call recv_byte + xor r1, r1, r1 cmpi r0, 0x57 ; 'W' - brancheq- bt_W + breq- bt_W cmpi r0, 0x52 ; 'R' - brancheq- bt_R + breq- bt_R cmpi r0, 0x51 ; 'Q' - brancheq- bt_Q + breq- bt_Q cmpi r0, 0x54 ; 'T' - brancheq- bt_T + breq- bt_T cmpi r0, 0x4a ; 'J' - brancheq- bt_J + breq- bt_J ; cmpi r0, 0x48 ; 'H' - ; brancheq bt_H + ; breq bt_H ; FALL THROUGH ;) bt_H: - ldisl r1, 0x4f ; 'O' + ldi r1, 0x4f ; 'O' call send_byte - branch bootrom + br bootrom bt_W: - call recv_word ; receive addr - mov r6, r0 - call recv_word ; receive instr - stx r0, 0(r6) - ldisl r1, 0x44 ; 'D' - call send_byte - branch bootrom + ; call recv_word ; receive addr + ; stw r0, PADDR(r11) + ; call recv_word ; receive instr + ; stw r0, PDATA(r11) + ; ldi r1, 0x44 ; 'D' + ; call send_byte + br bootrom bt_R: - call recv_word ; receive addr - mov r2, r0 - ldisl r1, 0x46 ; 'F' - call send_byte - ldx r1, 0(r2) - call send_word - branch bootrom + ;call recv_word ; receive addr + ;mov r2, r0 + ;ldi r1, 0x46 ; 'F' + ;call send_byte + ;ldx r1, 0(r2) + ;call send_word + ;br bootrom + br tehend bt_Q: call recv_word ; receive addr mov r6, r0 call recv_word ; receive data stw r0, 0(r6) - ldisl r1, 0x41 ; 'A' + ldi r1, 0x41 ; 'A' call send_byte - branch bootrom + br bootrom bt_T: call recv_word ; receive addr mov r2, r0 - ldisl r1, 0x47 ; 'G' + ldi r1, 0x47 ; 'G' call send_byte ldw r1, 0(r2) call send_word - branch bootrom + br bootrom bt_J: call recv_word - branchreg r0 + brr r0 -; 102 instr. please update after modification +tehend: + xor r1, r1, r1 + ldi r1, 0x41 ; 'A' + call send_byte + xor r1, r1, r1 + ldi r1, 0x42 ; 'B' + call send_byte + xor r1, r1, r1 + ldi r1, 0x43 ; 'C' + call send_byte