X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;f=2_isa%2Fsrc%2Fbootrom.s;h=2a46cfdabb8a38f695b8c955cbfce4607153b502;hb=ea9bd406578d30791ec039fe868856056ef895e5;hp=a18b1a68c6713e1432a9d14e9621b54a87c046d9;hpb=1dcebfd73d57bdf50ab7ab818c0ada0d08612759;p=calu.git

diff --git a/2_isa/src/bootrom.s b/2_isa/src/bootrom.s
index a18b1a6..2a46cfd 100644
--- a/2_isa/src/bootrom.s
+++ b/2_isa/src/bootrom.s
@@ -1,59 +1,47 @@
 	.data
 
 	.text
-	.define UART_BASE, 0x1000
-	.define UART_STATUS, UART_BASE+0x4
-	.define UART_RECV, UART_BASE+0x8
-	.define UART_TRANS, UART_BASE+0xC
-	.define UART_BAUD, UART_BASE+0x10
-
-	.define UART_TRANS_EMPTY, 0
-	.define UART_RECV_NEW, 1
-
-	.define TIMEOUT_START, 0x13371337
-	.define DEFAULT_PROG_START, 0x200
-	.define STACKSTART, 0x500 ; FIXME
-;-----
-main:
-	; setup stackframe
-	ldil r15, STACKSTART@lo
-	ldih r15, STACKSTART@hi
-	movst r15
+	.define UART_BASE, 0x2000
+	.define UART_STATUS, 0x0
+	.define UART_RECV, 0xc
+	.define UART_TRANS, 0x8
 
-	ldil r3, TIMEOUT_START@lo
-	ldih r3, TIMEOUT_START@hi
+	.define UART_TRANS_EMPTY, 0x1
+	.define UART_RECV_NEW, 0x2
 
-timeout_loop:
-	ldil r3, UART_STATUS@lo
-	ldih r3, UART_STATUS@hi
-	ldw r3, 0(r3)
-	andx r3, 1 << UART_RECV_NEW
-	brzs+ next; branch if zero
+	.define PBASE, 0x2030
+	.define PADDR, 0x4
+	.define PDATA, 0x8
+
+;-----
+start:
+	br+ main
+	br+ main
+	ret
+
+main:
+	ldi r10, UART_BASE@lo
+	ldih r10, UART_BASE@hi
+	ldi r11, PBASE@lo
+	ldih r11, PBASE@hi
+poll:
+	ldw r3, UART_STATUS(r10)
+	andx r3, UART_RECV_NEW
+	brzs+ poll; branch if zero
 
 	call recv_byte
 	; we received the enter bootrom sign
+	xor r1, r1, r1
 	cmpi r0, 0x48 ; 'H'
 	breq- bt_H
-
-next:
-	subi r3, r3, 1
-	brnz+ timeout_loop
-
-	; call to default entry point
-	ldil r0, DEFAULT_PROG_START@lo
-	ldih r0, DEFAULT_PROG_START@hi
-	brr r0
+	br poll ; else
 
 ;-----
 send_byte:
-	ldil r3, UART_STATUS@lo	
-	ldih r3, UART_STATUS@hi
-	ldw r3, 0(r3)
-	andx r3, 1 << UART_TRANS_EMPTY
-	brzs+ send_byte ; branch if zero
-	ldil r3, UART_TRANS@lo	
-	ldih r3, UART_TRANS@hi
-	stb r1, 0(r3)
+	ldw r3, UART_STATUS(r10)
+	andx r3, UART_TRANS_EMPTY
+	brnz+ send_byte ; branch if not zero
+	stb r1, UART_TRANS(r10)
 	ret
 
 ;-----
@@ -70,40 +58,40 @@ send_word:
 
 ;-----
 recv_byte:
-	ldil r3, UART_STATUS@lo	
-	ldih r3, UART_STATUS@hi
-	ldw r3, 0(r3)
-	andx r3, 1 << UART_RECV_NEW
-	brzs+ send_byte ; branch if zero
-	ldil r3, UART_RECV@lo	
-	ldih r3, UART_RECV@hi
-	ldb r0, 0(r3)
+	ldw r3, UART_STATUS(r10)
+	andx r3, UART_RECV_NEW
+	brzs+ recv_byte; branch if zero
+	xor r0, r0, r0
+	ldb r0, UART_RECV(r10)
 	ret
 
 ;-----
 recv_word:
-	ldisl r0, 0x0
+	xor r1, r1, r1
 	call recv_byte
-	or r0, r0, r1
+	or r1, r0, r1
 
 	call recv_byte
 	lls r1, r1, 8
-	or r0, r0, r1
+	or r1, r0, r1
 
 	call recv_byte
-	lls r1, r1, 16
-	or r0, r0, r1
+	lls r1, r1, 8
+	or r1, r0, r1
 
 	call recv_byte
-	lls r1, r1, 24
-	or r0, r0, r1
+	lls r1, r1, 8
+	or r1, r0, r1
 
+	addi r0, r1, 0
 	ret
 
 ;-----
 bootrom:
 	call recv_byte
+	br tehend
 
+	xor r1, r1, r1
 	cmpi r0, 0x57 ; 'W'
 	breq- bt_W
 
@@ -124,23 +112,24 @@ bootrom:
 	; FALL THROUGH ;)
 
 bt_H:
-	ldisl r1, 0x4f ; 'O'
+	ldi r1, 0x4f ; 'O'
+	call send_byte
 	call send_byte
 	br bootrom
 
 bt_W:
 	call recv_word ; receive addr
-	mov r6, r0
+	stw r0, PADDR(r11)
 	call recv_word ; receive instr
-	stx r0, 0(r6)
-	ldisl r1, 0x44 ; 'D'
+	stw r0, PDATA(r11)
+	ldi r1, 0x44 ; 'D'
 	call send_byte
 	br bootrom
 
 bt_R:
 	call recv_word ; receive addr
 	mov r2, r0
-	ldisl r1, 0x46 ; 'F'
+	ldi r1, 0x46 ; 'F'
 	call send_byte
 	ldx r1, 0(r2)
 	call send_word
@@ -151,14 +140,14 @@ bt_Q:
 	mov r6, r0
 	call recv_word ; receive data
 	stw r0, 0(r6)
-	ldisl r1, 0x41 ; 'A'
+	ldi r1, 0x41 ; 'A'
 	call send_byte
 	br bootrom
 
 bt_T:
 	call recv_word ; receive addr
 	mov r2, r0
-	ldisl r1, 0x47 ; 'G'
+	ldi r1, 0x47 ; 'G'
 	call send_byte
 	ldw r1, 0(r2)
 	call send_word
@@ -168,4 +157,4 @@ bt_J:
 	call recv_word
 	brr r0
 
-; 102 instr. please update after modification
+tehend: