X-Git-Url: http://wien.tomnetworks.com/gitweb/?a=blobdiff_plain;ds=inline;f=src%2Fconfig.h;h=d182b13884d3f15081c2de215d1b3f091fa1f4b3;hb=8e301472e324b6d6496d8b4ffc66863e99d7a505;hp=88b54d8280cf2cb92156e6636283b246aab9da25;hpb=1812e20b4b4edd574e21637c6e57ca17797f155c;p=seabios.git diff --git a/src/config.h b/src/config.h index 88b54d8..d182b13 100644 --- a/src/config.h +++ b/src/config.h @@ -1,46 +1,104 @@ #ifndef __CONFIG_H #define __CONFIG_H +#include "autoconf.h" + // Configuration definitions. -/* Dont support QEMU BIOS by default. - * Change CONFIG_QEMU to 1 to support QEMU. */ -#define CONFIG_QEMU 0 +//#define CONFIG_APPNAME "QEMU" +//#define CONFIG_CPUNAME8 "QEMUCPU " +//#define CONFIG_APPNAME6 "QEMU " +//#define CONFIG_APPNAME4 "QEMU" +#define CONFIG_APPNAME "Bochs" +#define CONFIG_CPUNAME8 "BOCHSCPU" +#define CONFIG_APPNAME6 "BOCHS " +#define CONFIG_APPNAME4 "BXPC" -#if (QEMU_SUPPORT == 1) -#define CONFIG_APPNAME "QEMU" -#else -#define CONFIG_APPNAME "Bochs" -#endif +// Maximum number of map entries in the e820 map +#define CONFIG_MAX_E820 32 +// Space to reserve in f-segment for dynamic allocations +#define CONFIG_MAX_BIOSTABLE 2048 +// Space to reserve in high-memory for tables +#define CONFIG_MAX_HIGHTABLE (64*1024) +// Largest supported externaly facing drive id +#define CONFIG_MAX_EXTDRIVE 16 -#define CONFIG_DEBUG_SERIAL 0 +#define CONFIG_MODEL_ID 0xFC +#define CONFIG_SUBMODEL_ID 0x00 +#define CONFIG_BIOS_REVISION 0x01 -#define CONFIG_FLOPPY_SUPPORT 1 -#define CONFIG_PS2_MOUSE 1 -#define CONFIG_ATA 1 -#define CONFIG_KBD_CALL_INT15_4F 1 -#define CONFIG_CDROM_BOOT 1 -#define CONFIG_CDROM_EMU 1 -#define CONFIG_PCIBIOS 1 +// Various memory addresses used by the code. +#define BUILD_STACK_ADDR 0x7000 +#define BUILD_S3RESUME_STACK_ADDR 0x1000 +#define BUILD_AP_BOOT_ADDR 0x10000 +#define BUILD_EBDA_MINIMUM 0x90000 +#define BUILD_LOWRAM_END 0xa0000 +#define BUILD_ROM_START 0xc0000 +#define BUILD_BIOS_ADDR 0xf0000 +#define BUILD_BIOS_SIZE 0x10000 +// 32KB for shadow ram copying (works around emulator deficiencies) +#define BUILD_BIOS_TMP_ADDR 0x30000 +#define BUILD_MAX_HIGHMEM 0xe0000000 -/* define it if the (emulated) hardware supports SMM mode */ -#define CONFIG_USE_SMM 1 +#define BUILD_PCIMEM_START 0xe0000000 +#define BUILD_PCIMEM_SIZE (BUILD_PCIMEM_END - BUILD_PCIMEM_START) +#define BUILD_PCIMEM_END 0xfec00000 /* IOAPIC is mapped at */ -/* if true, put the MP float table and ACPI RSDT in EBDA and the MP - table in RAM. Unfortunately, Linux has bugs with that, so we prefer - to modify the BIOS in shadow RAM */ -#define CONFIG_USE_EBDA_TABLES 0 +#define BUILD_APIC_ADDR 0xfee00000 +#define BUILD_IOAPIC_ADDR 0xfec00000 -#define CONFIG_MAX_ATA_INTERFACES 4 -#define CONFIG_MAX_ATA_DEVICES (CONFIG_MAX_ATA_INTERFACES*2) +#define BUILD_SMM_INIT_ADDR 0x38000 +#define BUILD_SMM_ADDR 0xa8000 +#define BUILD_SMM_SIZE 0x8000 -#define CONFIG_STACK_SEGMENT 0x00 -#define CONFIG_STACK_OFFSET 0xfffe +#define BUILD_MAX_SMBIOS_FSEG 600 -#define CONFIG_ACPI_DATA_SIZE 0x00010000L +// Important real-mode segments +#define SEG_IVT 0x0000 +#define SEG_BDA 0x0040 +#define SEG_BIOS 0xf000 -#define CONFIG_MODEL_ID 0xFC -#define CONFIG_SUBMODEL_ID 0x00 -#define CONFIG_BIOS_REVISION 0x01 +// Segment definitions in protected mode (see rombios32_gdt in misc.c) +#define SEG32_MODE32_CS (1 << 3) +#define SEG32_MODE32_DS (2 << 3) +#define SEG32_MODE16_CS (3 << 3) +#define SEG32_MODE16_DS (4 << 3) +#define SEG32_MODE16BIG_CS (5 << 3) +#define SEG32_MODE16BIG_DS (6 << 3) + +// Debugging levels. If non-zero and CONFIG_DEBUG_LEVEL is greater +// than the specified value, then the corresponding irq handler will +// report every enter event. +#define DEBUG_ISR_02 1 +#define DEBUG_HDL_05 1 +#define DEBUG_ISR_08 20 +#define DEBUG_ISR_09 9 +#define DEBUG_ISR_0e 9 +#define DEBUG_HDL_10 20 +#define DEBUG_HDL_11 2 +#define DEBUG_HDL_12 2 +#define DEBUG_HDL_13 10 +#define DEBUG_HDL_14 2 +#define DEBUG_HDL_15 9 +#define DEBUG_HDL_16 9 +#define DEBUG_HDL_17 2 +#define DEBUG_HDL_18 1 +#define DEBUG_HDL_19 1 +#define DEBUG_HDL_1a 9 +#define DEBUG_HDL_40 1 +#define DEBUG_ISR_70 9 +#define DEBUG_ISR_74 9 +#define DEBUG_ISR_75 1 +#define DEBUG_ISR_76 10 +#define DEBUG_ISR_hwpic1 5 +#define DEBUG_ISR_hwpic2 5 +#define DEBUG_HDL_pnp 1 +#define DEBUG_HDL_pmm 1 +#define DEBUG_HDL_pcibios32 9 +#define DEBUG_HDL_apm 9 + +#define DEBUG_unimplemented 2 +#define DEBUG_invalid 3 +#define DEBUG_thread 2 #endif // config.h