#include "bregs.h" // struct bregs
#include "biosvar.h" // GET_BDA
#include "util.h" // memset
-#include "vgabios.h" // find_vga_entry
+#include "vgabios.h" // calc_page_size
#include "optionroms.h" // struct pci_data
#include "config.h" // CONFIG_*
-#include "stdvga.h" // stdvga_set_mode
-#include "geodevga.h" // geodevga_init
-#include "bochsvga.h" // bochsvga_init
-#include "clext.h" // clext_init
+#include "stdvga.h" // stdvga_set_cursor_shape
+#include "clext.h" // clext_1012
#include "vgahw.h" // vgahw_set_mode
+#include "vbe.h" // VBE_RETURN_STATUS_FAILED
+#include "pci.h" // pci_config_readw
+#include "pci_regs.h" // PCI_VENDOR_ID
// XXX
#define DEBUG_VGA_POST 1
#define DEBUG_VGA_10 3
+// Standard Video Save Pointer Table
+struct VideoSavePointer_s {
+ struct segoff_s videoparam;
+ struct segoff_s paramdynamicsave;
+ struct segoff_s textcharset;
+ struct segoff_s graphcharset;
+ struct segoff_s secsavepointer;
+ u8 reserved[8];
+} PACKED;
+
+static struct VideoSavePointer_s video_save_pointer_table VAR16;
+
+struct VideoParam_s video_param_table[29] VAR16;
+
/****************************************************************
* PCI Data
* Helper functions
****************************************************************/
+// Return the bits per pixel in system memory for a given mode.
+int
+vga_bpp(struct vgamode_s *vmode_g)
+{
+ switch (GET_GLOBAL(vmode_g->memmodel)) {
+ case MM_TEXT:
+ return 16;
+ case MM_PLANAR:
+ return 1;
+ }
+ u8 depth = GET_GLOBAL(vmode_g->depth);
+ if (depth > 8)
+ return ALIGN(depth, 8);
+ return depth;
+}
+
+u16
+calc_page_size(u8 memmodel, u16 width, u16 height)
+{
+ switch (memmodel) {
+ case MM_TEXT:
+ return ALIGN(width * height * 2, 2*1024);
+ case MM_CGA:
+ return 16*1024;
+ default:
+ return ALIGN(width * height / 8, 8*1024);
+ }
+}
+
static void
set_cursor_shape(u8 start, u8 end)
{
if (cp.page != current)
return;
- // Get the dimensions
- u16 nbcols = GET_BDA(video_cols);
- u16 nbrows = GET_BDA(video_rows) + 1;
-
- // Calculate the address knowing nbcols nbrows and page num
- u16 address = (SCREEN_IO_START(nbcols, nbrows, cp.page)
- + cp.x + cp.y * nbcols);
-
+ // Calculate the memory address
+ int address = (GET_BDA(video_pagesize) * cp.page
+ + (cp.x + cp.y * GET_BDA(video_cols)) * 2);
stdvga_set_cursor_pos(address);
}
return;
// Get the mode
- struct vgamode_s *vmode_g = find_vga_entry(GET_BDA(video_mode));
+ struct vgamode_s *vmode_g = get_current_mode();
if (!vmode_g)
return;
// Get pos curs pos for the right page
struct cursorpos cp = get_cursor_pos(page);
- u16 address;
- if (GET_GLOBAL(vmode_g->memmodel) == MM_TEXT) {
- // Get the dimensions
- u16 nbcols = GET_BDA(video_cols);
- u16 nbrows = GET_BDA(video_rows) + 1;
-
- // Calculate the address knowing nbcols nbrows and page num
- address = SCREEN_MEM_START(nbcols, nbrows, page);
- SET_BDA(video_pagestart, address);
-
- // Start address
- address = SCREEN_IO_START(nbcols, nbrows, page);
- } else {
- address = page * GET_GLOBAL(vmode_g->slength);
- }
-
- stdvga_set_active_page(address);
+ // Calculate memory address of start of page
+ int address = GET_BDA(video_pagesize) * page;
+ vgahw_set_displaystart(vmode_g, address);
// And change the BIOS page
+ SET_BDA(video_pagestart, address);
SET_BDA(video_page, page);
dprintf(1, "Set active page %02x address %04x\n", page, address);
u8 rows = vde / lines;
SET_BDA(video_rows, rows - 1);
u16 cols = GET_BDA(video_cols);
- SET_BDA(video_pagesize, rows * cols * 2);
+ SET_BDA(video_pagesize, calc_page_size(MM_TEXT, cols, rows));
}
static void
restore_bda_state(u16 seg, struct saveBDAstate *info)
{
- SET_BDA(video_mode, GET_FARVAR(seg, info->video_mode));
+ u16 mode = GET_FARVAR(seg, info->video_mode);
+ SET_BDA(video_mode, mode);
+ SET_BDA(vbe_mode, mode);
SET_BDA(video_cols, GET_FARVAR(seg, info->video_cols));
SET_BDA(video_pagesize, GET_FARVAR(seg, info->video_pagesize));
SET_BDA(crtc_address, GET_FARVAR(seg, info->crtc_address));
SET_IVT(0x43, GET_FARVAR(seg, info->font1));
}
+
+/****************************************************************
+ * Mode setting
+ ****************************************************************/
+
+struct vgamode_s *
+get_current_mode(void)
+{
+ return vgahw_find_mode(GET_BDA(vbe_mode) & ~MF_VBEFLAGS);
+}
+
// Setup BDA after a mode switch.
-void
-modeswitch_set_bda(int mode, int flags, struct vgamode_s *vmode_g)
+int
+vga_set_mode(int mode, int flags)
{
+ dprintf(1, "set VGA mode %x\n", mode);
+ struct vgamode_s *vmode_g = vgahw_find_mode(mode);
+ if (!vmode_g)
+ return VBE_RETURN_STATUS_FAILED;
+
+ int ret = vgahw_set_mode(vmode_g, flags);
+ if (ret)
+ return ret;
+
// Set the BIOS mem
int width = GET_GLOBAL(vmode_g->width);
int height = GET_GLOBAL(vmode_g->height);
+ u8 memmodel = GET_GLOBAL(vmode_g->memmodel);
int cheight = GET_GLOBAL(vmode_g->cheight);
- SET_BDA(video_mode, mode);
- if (GET_GLOBAL(vmode_g->memmodel) == MM_TEXT) {
+ if (mode < 0x100)
+ SET_BDA(video_mode, mode);
+ else
+ SET_BDA(video_mode, 0xff);
+ SET_BDA(vbe_mode, mode | (flags & MF_VBEFLAGS));
+ if (memmodel == MM_TEXT) {
SET_BDA(video_cols, width);
SET_BDA(video_rows, height-1);
SET_BDA(cursor_type, 0x0607);
SET_BDA(video_rows, (height / cheight) - 1);
SET_BDA(cursor_type, 0x0000);
}
- SET_BDA(video_pagesize, GET_GLOBAL(vmode_g->slength));
+ SET_BDA(video_pagesize, calc_page_size(memmodel, width, height));
SET_BDA(crtc_address, stdvga_get_crtc());
SET_BDA(char_height, cheight);
SET_BDA(video_ctl, 0x60 | (flags & MF_NOCLEARMEM ? 0x80 : 0x00));
SET_IVT(0x43, SEGOFF(get_global_seg(), (u32)vgafont16));
break;
}
+
+ return 0;
}
if (regs->al & 0x80)
flags |= MF_NOCLEARMEM;
- vgahw_set_mode(mode, flags);
+ vga_set_mode(mode, flags);
}
static void
{
if (regs->bl > 0x14)
return;
- stdvga_set_single_palette_reg(regs->bl, regs->bh);
+ stdvga_attr_write(regs->bl, regs->bh);
}
static void
{
if (regs->bl > 0x14)
return;
- regs->bh = stdvga_get_single_palette_reg(regs->bl);
+ regs->bh = stdvga_attr_read(regs->bl);
}
static void
handle_101010(struct bregs *regs)
{
u8 rgb[3] = {regs->dh, regs->ch, regs->cl};
- stdvga_set_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_dac_write(GET_SEG(SS), rgb, regs->bx, 1);
}
static void
handle_101012(struct bregs *regs)
{
- stdvga_set_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_dac_write(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101015(struct bregs *regs)
{
u8 rgb[3];
- stdvga_get_dac_regs(GET_SEG(SS), rgb, regs->bx, 1);
+ stdvga_dac_read(GET_SEG(SS), rgb, regs->bx, 1);
regs->dh = rgb[0];
regs->ch = rgb[1];
regs->cl = rgb[2];
static void
handle_101017(struct bregs *regs)
{
- stdvga_get_dac_regs(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
+ stdvga_dac_read(regs->es, (u8*)(regs->dx + 0), regs->bx, regs->cx);
}
static void
handle_101018(struct bregs *regs)
{
- stdvga_set_pel_mask(regs->bl);
+ stdvga_pelmask_write(regs->bl);
}
static void
handle_101019(struct bregs *regs)
{
- regs->bl = stdvga_get_pel_mask();
+ regs->bl = stdvga_pelmask_read();
}
static void
static void
handle_1012(struct bregs *regs)
{
+ if (CONFIG_VGA_CIRRUS && regs->bl >= 0x80) {
+ clext_1012(regs);
+ return;
+ }
+
switch (regs->bl) {
case 0x10: handle_101210(regs); break;
case 0x30: handle_101230(regs); break;
case 0x36: handle_101236(regs); break;
default: handle_1012XX(regs); break;
}
-
- // XXX - cirrus has 1280, 1281, 1282, 1285, 129a, 12a0, 12a1, 12a2, 12ae
}
}
+static u8 static_functionality[0x10] VAR16 = {
+ /* 0 */ 0xff, // All modes supported #1
+ /* 1 */ 0xe0, // All modes supported #2
+ /* 2 */ 0x0f, // All modes supported #3
+ /* 3 */ 0x00, 0x00, 0x00, 0x00, // reserved
+ /* 7 */ 0x07, // 200, 350, 400 scan lines
+ /* 8 */ 0x02, // mamimum number of visible charsets in text mode
+ /* 9 */ 0x08, // total number of charset blocks in text mode
+ /* a */ 0xe7, // Change to add new functions
+ /* b */ 0x0c, // Change to add new functions
+ /* c */ 0x00, // reserved
+ /* d */ 0x00, // reserved
+ /* e */ 0x00, // Change to add new functions
+ /* f */ 0x00 // reserved
+};
+
struct funcInfo {
struct segoff_s static_functionality;
u8 bda_0x49[30];
SET_BDA(video_msr, 0x09);
}
-u16 VgaBDF VAR16;
+int VgaBDF VAR16 = -1;
+int HaveRunInit VAR16;
void VISIBLE16
vga_post(struct bregs *regs)
{
debug_enter(regs, DEBUG_VGA_POST);
- SET_VGA(VgaBDF, regs->ax);
+ if (CONFIG_VGA_PCI && !GET_GLOBAL(HaveRunInit)) {
+ u16 bdf = regs->ax;
+ if ((pci_config_readw(bdf, PCI_VENDOR_ID)
+ == GET_GLOBAL(rom_pci_data.vendor))
+ && (pci_config_readw(bdf, PCI_DEVICE_ID)
+ == GET_GLOBAL(rom_pci_data.device)))
+ SET_VGA(VgaBDF, bdf);
+ }
int ret = vgahw_init();
if (ret) {
return;
}
+ if (GET_GLOBAL(HaveRunInit))
+ return;
+
init_bios_area();
- build_video_param();
+ SET_VGA(video_save_pointer_table.videoparam
+ , SEGOFF(get_global_seg(), (u32)video_param_table));
+ stdvga_build_video_param();
extern void entry_10(void);
SET_IVT(0x10, SEGOFF(get_global_seg(), (u32)entry_10));
// XXX - clear screen and display info
+ SET_VGA(HaveRunInit, 1);
+
// Fixup checksum
extern u8 _rom_header_size, _rom_header_checksum;
SET_VGA(_rom_header_checksum, 0);