#define OEM_BAR2 0x58
#define OEM_BAR3 0x5C
-#define GEODE_PCI_ADDR 0x80000900
-#define GEODE_PCI_CMD (GEODE_PCI_ADDR + 0x04)
-#define GEODE_PCI_FB (GEODE_PCI_ADDR + 0x10)
-#define GEODE_PCI_DC (GEODE_PCI_ADDR + 0x18)
-#define GEODE_PCI_VP (GEODE_PCI_ADDR + 0x1c)
+#define GEODE_PCI_ADDR 0x80000900
+#define GEODE_PCI_CMD (GEODE_PCI_ADDR + 0x04)
+#define GEODE_PCI_FB (GEODE_PCI_ADDR + 0x10)
+#define GEODE_PCI_DC (GEODE_PCI_ADDR + 0x18)
+#define GEODE_PCI_VP (GEODE_PCI_ADDR + 0x1c)
#define DC_LOCK_LOCK 0x00000000
#define DC_LOCK_UNLOCK 0x00004758
/* LX MSRs */
#define MSR_GLIU0 (1 << 28)
-#define MSR_GLIU0_BASE4 (MSR_GLIU0 + 0x23)
+#define MSR_GLIU0_BASE4 (MSR_GLIU0 + 0x23) /* LX */
+#define GLIU0_P2D_BM_4 (MSR_GLIU0 + 0x24) /* GX2 */
#define GLIU0_IOD_BM_0 (MSR_GLIU0 + 0xE0)
#define GLIU0_IOD_BM_1 (MSR_GLIU0 + 0xE1)
#define DC_SPARE 0x80000011
-#define VP_MSR_CONFIG 0x48002001
+#define VP_MSR_CONFIG_GX2 0xc0002001 /* GX2 */
+#define VP_MSR_CONFIG_LX 0x48002001 /* LX */
/* DC REG OFFSET */
#define DC_UNLOCK 0x0
#define DC_GENERAL_CFG 0x4
#define DC_DISPLAY_CFG 0x8
-#define DC_ARB_CFG 0xc
#define DC_FB_ST_OFFSET 0x10
#define DC_CB_ST_OFFSET 0x14
#define DC_CURS_ST_OFFSET 0x18
#define VP_CRT_SKEW (1 << 16)
#define VP_BYP_BOTH (1 << 0)
-/* Masks */
-#define VP_MSR_CFG_MSK 0x0
+/* Mask */
#define DC_CFG_MSK 0xf000a6
int geodevga_init();