* This file is part of the superiotool project.
*
* Copyright (C) 2007 Uwe Hermann <uwe@hermann-uwe.de>
- * Copyright (C) 2007 Rasmus Wiman <rasmus@wiman.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
*
* Some other Super I/Os only use bits 3..0 of 0x09 as ID.
*/
-const static struct superio_registers reg_table[] = {
+static const struct superio_registers reg_table[] = {
/* ID and rev[3..0] */
{0x527, "W83977CTF", { /* TODO: Not yet in sensors-detect */
{EOT}}},
/* ID and rev */
{0x9771, "W83977F-A/G-A/AF-A/AG-A", {
{EOT}}},
+ {0x9777, "W83977AF", {
+ /* W83977AF as found on the Advantech PCM-5820. We weren't able
+ * to find a datasheet (so far) which lists the 0x77 revision,
+ * but the hardware is there in the wild, so detect it...
+ */
+ {EOT}}},
{0x9773, "W83977TF", {
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x2a,0x2b,
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x00,0x00,0x00,0x00,EOT}},
{EOT}}},
- {0x68, "W83697SF/UF/UG", { /* TODO: Add comment. */
+ {0x68, "W83697SF/UF/UG", {
+ /* ID: 0x68 (for W83697SF/UF/UG)
+ * Rev: 0x1X (for W83697SF)
+ * 0x0X (for W83697SF) -- sic!
+ * 0x1X (for W83697UF/UG)
+ */
+ {NOLDN, NULL,
+ {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x28,0x29,0x2a,
+ 0x2b,0x2c,EOT},
+ {0x68,NANA,0xef,0xfe,MISC,0x00,0x00,0x00,0x00,MISC,
+ 0x00,0x30,EOT}},
+ {0x0, "Floppy",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,0xf5,
+ EOT},
+ {0x01,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,0x00,
+ EOT}},
+ {0x1, "Parallel port",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,EOT},
+ {0x01,0x03,0x78,0x07,0x03,0x3f,EOT}},
+ {0x2, "COM1",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x01,0x03,0xf8,0x04,0x00,EOT}},
+ {0x3, "COM2",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+ {0x01,0x02,0xf8,0x03,0x00,0x00,EOT}},
+ {0x7, "Game port, GPIO 1",
+ {0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
+ {0x00,0x02,0x01,0x00,0x00,0xff,0x00,0x00,EOT}},
+ {0x8, "MIDI port, GPIO 5",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
+ 0xf4,0xf5,EOT},
+ {0x00,0x03,0x30,0x00,0x00,0x09,0xff,0x00,0x00,0x00,
+ 0x00,0x00,EOT}},
+ {0x9, "GPIO 2, GPIO 3, GPIO 4",
+ {0x30,0x60,0x61,0xf0,0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,
+ 0xf7,0xf8,EOT},
+ {0x00,0x00,0x00,0xff,0x00,0x00,0xff,0x00,0x00,0xff,
+ 0x00,0x00,EOT}},
+ {0xa, "ACPI",
+ {0x30,0x70,0xf0,0xf1,0xf2,0xf3,0xf4,0xf6,0xf7,0xf9,
+ 0xfa,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,EOT}},
+ {0xb, "PWM",
+ {0x30,0x60,0x61,EOT},
+ {0x00,0x00,0x00,EOT}},
+ {0xc, "Smart card",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0xd, "URC, GPIO 6",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
+ 0xf4,EOT},
+ {0x00,0x03,0xe8,0x00,0x00,0x00,0x00,0xff,0x00,0x00,
+ 0x00,EOT}},
+ {0xe, "URD, GPIO 7",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
+ EOT},
+ {0x00,0x02,0xe8,0x00,0x00,0x00,0x00,0xff,0x00,0x00,
+ EOT}},
+ {0xf, "GPIO 8",
+ {0x30,0x60,0x61,0xf0,0xf1,0xf2,EOT},
+ {0x00,0x00,0x00,0xff,0x00,0x00,EOT}},
{EOT}}},
/* ID[3..0] */
outb(0x86, port);
}
-void probe_idregs_winbond_helper(const char *init, uint16_t port)
+static void probe_idregs_winbond_helper(const char *init, uint16_t port)
{
uint16_t id;
uint8_t devid, rev, olddevid;
if (verbose)
printf(NOTFOUND "id/oldid=0x%02x/0x%02x, rev=0x%02x\n",
devid, olddevid, rev);
- exit_conf_mode_winbond_fintek_ite_8787(port);
return;
}
get_superio_name(reg_table, id), devid, rev, port);
chip_found = 1;
- /* TODO: Special notes in dump output for the MISC entries. */
dump_superio("Winbond", reg_table, port, id);
- dump_superio_readable(port); /* TODO */
}
void probe_idregs_winbond(uint16_t port)
{
- /* TODO: Not all init sequences are valid for all ports. */
-
enter_conf_mode_winbond_88(port);
probe_idregs_winbond_helper("(init=0x88) ", port);
exit_conf_mode_winbond_fintek_ite_8787(port);
probe_idregs_winbond_helper("(init=0x87,0x87) ", port);
exit_conf_mode_winbond_fintek_ite_8787(port);
}
-