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Force coreboot mconf to create temp files in the output directory
[coreboot.git] / util / superiotool / nsc.c
diff --git a/util/superiotool/nsc.c b/util/superiotool/nsc.c
index 991bdc87c71eab13a219b28aa433a2ade0987168..90dfe23033e7d000b8a512435a5cbeeb92e2338a 100644 (file)
--- a/util/superiotool/nsc.c
+++ b/util/superiotool/nsc.c
@@ -242,6 +242,48 @@ static const struct superio_registers reg_table[] = {
                        {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,EOT}},
                {EOT}}},
        {0xe4, "PC87364", {
+               {NOLDN, NULL,
+                       {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x2a,
+                        0x2b,0x2c,0x2d,0x2e,EOT},
+                       {0xe4,0x11,0x00,0x03,0x00,0x00,0x00,NANA,0x00,MISC,
+                        0x00,0x00,NANA,RSVD,EOT}},
+               {0x0, "Floppy",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
+                       {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
+               {0x1, "Parallel port",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
+               {0x2, "COM2",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
+               {0x3, "COM1",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
+               {0x4, "System wake-up control (SWC)",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
+               {0x5, "Mouse",
+                       {0x30,0x70,0x71,0x74,0x75,EOT},
+                       {0x00,0x0c,0x02,0x04,0x04,EOT}},
+               {0x6, "Keyboard",
+                       {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
+                        EOT},
+                       {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
+                        EOT}},
+               {0x7, "GPIO",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
+                        EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,0x00,
+                        EOT}},
+               {0x8, "ACCESS.bus (ACB)",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,EOT}},
+               {0x9, "Fan speed control and monitor (FSCM)",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x00,EOT}},
+               {0xa, "Watchdog timer",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x02,EOT}},
                {EOT}}},
        {0xe5, "PC87365", {     /* SRID[7..0] == chip revision */
                {EOT}}},
@@ -305,9 +347,63 @@ static const struct superio_registers reg_table[] = {
                        {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
                        {0x00,0x00,0x00,0x00,0x03,0x04,0x04,EOT}},
                {EOT}}},
-
+       {0xf4, "PC87382", {
+               {NOLDN, NULL,
+                       {0x20,0x21,0x22,0x26,0x27,0x29,EOT},
+                       {0xf4,0x11,0x63,0x00,0x00,0x00,EOT}},
+               {0x02, "IR",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
+               {0x03, "COM1",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
+               {0x07, "GPIO",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
+                        0xf2,EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,
+                        0x01,EOT}},
+               {0x19, "Docking LPC switch",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x04,0x04,EOT}},
+               {EOT}}},
        /* SID[7..0]: family, SRID[7..5]: ID, SRID[4..0]: rev. */
        {0xea, "PC8739x", {
+               {NOLDN, NULL,
+                       {0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
+                        0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
+                       {0xea,0x11,MISC,MISC,MISC,0x80,0x00,NANA,0x00,MISC,
+                        0x37,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
+               {0x0, "Floppy",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,EOT},
+                       {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,EOT}},
+               {0x1, "Parallel port",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,EOT}},
+               {0x2, "COM2 / FIR",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
+               {0x3, "COM1",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
+               {0x7, "GPIO",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
+                        EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,0x44,0x01,
+                        EOT}},
+               {0xa, "Watchdog timer (WDT)",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x02,EOT}},
+               {0xb, "Game port",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x02,0x01,0x00,0x03,0x04,0x04,0x00,EOT}},
+               {0xc, "MIDI port",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x03,0x30,0x00,0x03,0x04,0x04,0x00,EOT}},
+               {0xf, "X-Bus",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf2,
+                        0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x04,0x04,0x00,0x00,0x00,
+                        0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
                {EOT}}},
        {0xec, "PC87591x", {
                /* SRID[7..5]: 000=PC87591E, 001=PC87591S, 100=PC87591L */
@@ -364,7 +460,7 @@ static const struct superio_registers reg_table[] = {
                {EOT}}},
        {0xf0, "PC87372", {
                {EOT}}},
-       {0xf1, "PC8374L", {
+       {0x0f1, "PC8374L", {
                {NOLDN, NULL,
                        {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
                         0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
@@ -406,6 +502,45 @@ static const struct superio_registers reg_table[] = {
                        {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
                        {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x05,EOT}},
                {EOT}}},
+       {0x8f1, "WPCD376I", {
+               {NOLDN, NULL,
+                       {0x10,0x12,0x13,0x20,0x21,0x22,0x23,0x24,0x25,0x26,
+                        0x27,0x28,0x29,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
+                       {0x00,0x00,0x00,0xf1,0x11,0x00,0x00,0x00,RSVD,0x00,
+                        MISC,RSVD,0x01,0x2e,RSVD,RSVD,RSVD,RSVD,RSVD,EOT}},
+               {0x0, "Floppy",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,0xf8,
+                        EOT},
+                       {0x00,0x03,0xf2,0x06,0x03,0x02,0x04,0x24,0x00,0x24,
+                        EOT}},
+               {0x1, "Parallel port",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf8,EOT},
+                       {0x00,0x02,0x78,0x07,0x02,0x04,0x04,0xf2,0x07,EOT}},
+               {0x2, "IR",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x02,0xf8,0x03,0x03,0x04,0x04,0x02,EOT}},
+               {0x3, "COM1",
+                       {0x30,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,EOT},
+                       {0x00,0x03,0xf8,0x04,0x03,0x04,0x04,0x02,EOT}},
+               {0x4, "System wake-up control (SWC)",
+                       {0x30,0x50,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
+                        EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,
+                        EOT}},
+               {0x5, "Mouse",
+                       {0x30,0x70,0x71,0x74,0x75,EOT},
+                       {0x00,0x0c,0x02,0x04,0x04,EOT}},
+               {0x6, "Keyboard",
+                       {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,0xf0,
+                        EOT},
+                       {0x00,0x00,0x60,0x00,0x64,0x01,0x02,0x04,0x04,0x40,
+                        EOT}},
+               {0x7, "GPIO",
+                       {0x30,0x50,0x60,0x61,0x70,0x71,0x74,0x75,0xf0,0xf1,
+                        0xf2,0xf3,0xf8,EOT},
+                       {0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,0x00,MISC,
+                        0x00,MISC,0x01,EOT}},
+               {EOT}}},
        {0xf2, "PC87427", {
                /* SRID[7..5] is marked as "not applicable for the PC87427". */
                {NOLDN, NULL,
@@ -462,7 +597,7 @@ static const struct superio_registers reg_table[] = {
                         0xf1,0xf2,0xf3,0xf6,0xf7,EOT},
                        {0x00,0x00,0x70,0x00,0x72,0x08,0x00,0x04,0x04,0x00,
                         0x00,0x00,0x00,MISC,0x00,EOT}},
-               {0x14, "Health Monitoring and Control (HMC)",
+               {0x14, "Health monitoring and control (HMC)",
                        {0x30,0x50,0x60,0x61,0x62,0x63,0x70,0x71,0x74,0x75,
                         0xf0,EOT},
                        {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x04,0x04,
@@ -476,6 +611,7 @@ static const struct superio_registers reg_table[] = {
 void probe_idregs_nsc(uint16_t port)
 {
        uint8_t id, rev;
+       uint16_t magic;
 
        probing_for("NSC", "", port);
 
@@ -496,17 +632,28 @@ void probe_idregs_nsc(uint16_t port)
                rev = INB(port + 1);
        }
 
-       if (superio_unknown(reg_table, id)) {
+       /*
+        * NSC PC8374L has ID 0xf1, rev 0b000xxxxx according to datasheet.
+        * Winbond WPCD376I has ID 0xf1, rev 0b100xxxxx according to datasheet.
+        */
+       if (id == 0xf1)
+               magic = ((rev & 0xe0) << 4) | id;
+       else
+               magic = id;
+
+       if (superio_unknown(reg_table, magic)) {
                if (verbose)
                        printf(NOTFOUND "sid=0x%02x, srid=0x%02x\n", id, rev);
                return;
        }
 
-       printf("Found NSC %s (sid=0x%02x, srid=0x%02x) at 0x%x\n",
-              get_superio_name(reg_table, id), id, rev, port);
+       printf("Found %s %s (sid=0x%02x, srid=0x%02x) at 0x%x\n",
+              magic == 0x8f1 ? "Winbond" : "NSC",
+              get_superio_name(reg_table, magic), id, rev, port);
        chip_found = 1;
 
-       dump_superio("NSC", reg_table, port, id, LDN_SEL);
+       dump_superio(magic == 0x8f1 ? "Winbond" : "NSC",
+                    reg_table, port, magic, LDN_SEL);
 }
 
 void print_nsc_chips(void)
my coreboot WIP stuff (asus m5a99x-evo board)