static const struct superio_registers reg_table[] = {
{0x8228, "IT8228E", {
{EOT}}},
+ {0x8500, "IT8500B/E", {
+ {NOLDN, NULL,
+ {0x20,0x21,0x22,0x23,0x25,0x2d,0x2e,0x2f,0x30,EOT},
+ {0x85,0x00,0x01,0x01,0x00,0x00,NANA,NANA,0x00,EOT}},
+ {0x04, "System Wake-Up Control (SWUC)",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x01,EOT}},
+ {0x05, "KBC/Mouse Interface",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x0c,0x01,EOT}},
+ {0x06, "KBC/Keyboard Interface",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x60,0x00,0x64,0x01,0x01,EOT}},
+ {0x0f, "Shared Memory/Flash Interface (SMFI)",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf4,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,EOT}},
+ {0x10, "BRAM",
+ {0x30,0x62,0x63,0x70,0x71,0xf3,0xf4,0xf5,EOT},
+ {0x00,0x00,0x72,0x08,0x01,NANA,NANA,NANA,EOT}},
+ {0x11, "Power Management I/F Channel 1 (PMC1)",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x62,0x00,0x66,0x01,0x01,EOT}},
+ {0x12, "Power Management I/F Channel 2 (PMC2)",
+ {0x30,0x60,0x61,0x62,0x63,0x64,0x65,0x70,0x71,0xf0,EOT},
+ {0x00,0x00,0x68,0x00,0x6c,0x00,0x00,0x01,0x01,NANA,EOT}},
+ {EOT}}},
{0x8502, "IT8502E/TE/G", {
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
{0x00,0x00,0x6a,0x00,0x6e,0x01,0x01,EOT}},
{EOT}}},
{0x8510, "IT8510E/TE/G", {
+ {NOLDN, "Chip ID",
+ {0x20,0x21, EOT},
+ {0x85,0x10, EOT}},
+ {NOLDN, "Chip Version",
+ {0x22,EOT},
+ {0x21,EOT}},
+ {NOLDN, "Super I/O Control Reigster (SIOCTRL)",
+ {0x23,EOT},
+ {0x01,EOT}},
+ {NOLDN, "Super I/O Configuration Register (SIOIRQ)",
+ {0x25,EOT},
+ {0x00,EOT}},
+ {NOLDN, "Super I/O General Purpose Register (SIOGP)",
+ {0x26,EOT},
+ {0x00,EOT}},
+ {NOLDN, "Super I/O Power Mode Register (SIOPWR)",
+ {0x2d,EOT},
+ {0x00,EOT}},
+ {NOLDN, "Logical Device Activate Register (LDA)",
+ {0x30,EOT},
+ {0x00,EOT}},
+ {NOLDN, "I/O Port Base Address for Descriptor 0 (IOBAD0)",
+ {0x60,0x61,EOT},
+ {NANA,NANA,EOT}},
+ {NOLDN, "I/O Port Base Address for Descriptor 1 (IOBAD1)",
+ {0x62,0x63,EOT},
+ {NANA,NANA,EOT}},
+ {NOLDN, "Interupt Request Number and Wake-Up on IRQ Enable (IRQNUMX)",
+ {0x70,EOT},
+ {NANA,EOT}},
+ {NOLDN, "Interrupt Request Type Select (IRQTP)",
+ {0x71,EOT},
+ {NANA,EOT}},
+ {NOLDN, "DMA Channel Select 0 (DMAS0)",
+ {0x74,EOT},
+ {0x04,EOT}},
+ {NOLDN, "DMA Channel Select 1 (DMAS1)",
+ {0x75,EOT},
+ {0x04,EOT}},
+ {0x4, "System Wakup-Up (SWUC)",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x03,EOT}},
+ {0x5, "Keyboard/Mouse",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x0c,0x03,EOT}},
+ {0x6, "Keyboard/Mouse",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x60,0x00,0x64,0x01,0x03,EOT}},
+ {0xf, "Shared Memory/Flash Interface (SMFI)",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf4,0xf5,0xf6,0xf7,0xf8,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x10, "Real Time Clock (RTC)",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,0xf1,0xf2,EOT},
+ {0x00,0x00,0x70,0x00,0x72,0x08,0x00,0x00,0x49,0x4a,EOT}},
+ {0x11, "Power Management Interface Channel 1",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x62,0x00,0x66,0x01,0x03,EOT}},
+ {0x12, "Power Management Interface Channel 2",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,EOT},
+ {0x00,0x00,0x68,0x00,0x6c,0x01,0x03,EOT}},
{EOT}}},
{0x8511, "IT8511E/TE/G", {
{NOLDN, NULL,
{0x8706, "IT8706R", { /* TODO: Not yet in sensors-detect */
/* This is a "Special General Purpose I/O chip". */
{EOT}}},
+ {0x8707, "IT8707F", {
+ {EOT}}},
{0x8708, "IT8708F", {
{NOLDN, NULL,
{0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,
{0x30,0x60,0x61,0x70,0xf0,EOT},
{0x00,0x03,0x10,0x0b,0x00,EOT}},
{EOT}}},
- {0x8720, "IT8720F", { /* From sensors-detect */
+ {0x8720, "IT8720F", {
+ {NOLDN, NULL,
+ {0x20,0x21,0x22,0x23,0x24,0x2b,EOT},
+ {0x87,0x20,0x05,0x00,0x00,0x00,EOT}},
+ {0x0, "Floppy",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
+ {0x00,0x03,0xf0,0x06,0x02,0x00,0x00,EOT}},
+ {0x1, "COM1",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+ {0x00,0x03,0xf8,0x04,0x00,0x50,EOT}},
+ {0x2, "COM2",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+ {0x00,0x02,0xf8,0x03,0x00,0x50,EOT}},
+ {0x3, "Parallel port",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x74,0xf0,EOT},
+ {0x00,0x03,0x78,0x07,0x78,0x07,0x03,0x03,EOT}},
+ {0x4, "Environment controller",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0xf0,0xf1,0xf2,0xf3,
+ 0xf4,0xf5,0xf6,EOT},
+ {0x00,0x02,0x90,0x02,0x30,0x09,0x00,0x00,0x00,0x00,
+ 0x00,NANA,NANA,EOT}},
+ {0x5, "Keyboard",
+ {0x30,0x60,0x61,0x62,0x63,0x70,0x71,0xf0,EOT},
+ {0x01,0x00,0x60,0x00,0x64,0x01,0x02,0x48,EOT}},
+ {0x6, "Mouse",
+ {0x30,0x70,0x71,0xf0,EOT},
+ {0x00,0x0c,0x02,0x00,EOT}},
+ {0x7, "GPIO",
+ {0x25,0x26,0x27,0x28,0x29,0x2a,0x2c,0x60,0x61,0x62,
+ 0x63,0x64,0x65,0x70,0x71,0x72,0x73,0x74,0xb0,0xb1,
+ 0xb2,0xb3,0xb4,0xb5,0xb8,0xb9,0xba,0xbb,0xbc,0xbd,
+ 0xc0,0xc1,0xc2,0xc3,0xc4,0xc8,0xc9,0xca,0xcb,0xcc,
+ 0xe0,0xe1,0xe2,0xe3,0xe4,0xe5,0xe6,0xe7,0xe9,0xf0,
+ 0xf1,0xf2,0xf3,0xf4,0xf5,0xf6,0xf7,0xf8,0xf9,0xfa,
+ 0xfb,0xfc,0xfd,0xfe,0xff,EOT},
+ {0x00,0xff,0x00,0x40,0x00,0x00,0x03,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x00,NANA,0x38,0x00,0x00,0x00,
+ 0x00,0x00,0x00,0x00,0x20,0x00,0x00,0x00,0x00,0x00,
+ 0x01,0x00,0x00,0x40,0x00,0x01,0x00,0x00,0x40,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,NANA,0x00,
+ 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+ 0x00,NANA,0x00,0x00,0x00,EOT}},
+ {0xa, "Consumer IR",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x03,0x10,0x0b,0x06,EOT}},
+ {EOT}}},
+ {0x8721, "IT8721F", {
{EOT}}},
{0x8722, "IT8722F", {
{EOT}}},
regwrite(port, 0x02, 0x02);
}
+static int chip_found_at_port;
+
static void probe_idregs_ite_helper(const char *init, uint16_t port)
{
uint16_t id, chipver, ecport;
printf("Found ITE %s (id=0x%04x, rev=0x%01x) at 0x%x\n",
get_superio_name(reg_table, id), id, chipver, port);
chip_found = 1;
+ chip_found_at_port = 1;
dump_superio("ITE", reg_table, port, id, LDN_SEL);
void probe_idregs_ite(uint16_t port)
{
+ chip_found_at_port = 0;
+
if (port == 0x3f0 || port == 0x3bd || port == 0x370) {
enter_conf_mode_ite_legacy(port, initkey_it8661f);
probe_idregs_ite_helper("(init=legacy/it8661f) ", port);
exit_conf_mode_ite(port);
+ if (chip_found_at_port)
+ return;
enter_conf_mode_ite_legacy(port, initkey_it8671f);
probe_idregs_ite_helper("(init=legacy/it8671f) ", port);
exit_conf_mode_ite(port);
+ if (chip_found_at_port)
+ return;
} else {
enter_conf_mode_ite(port);
probe_idregs_ite_helper("(init=standard) ", port);
exit_conf_mode_ite(port);
+ if (chip_found_at_port)
+ return;
enter_conf_mode_ite_it8502e(port);
probe_idregs_ite_helper("(init=it8502e) ", port);
exit_conf_mode_ite(port);
+ if (chip_found_at_port)
+ return;
enter_conf_mode_ite_it8761e(port);
probe_idregs_ite_helper("(init=it8761e) ", port);
exit_conf_mode_ite(port);
+ if (chip_found_at_port)
+ return;
enter_conf_mode_ite_it8228e(port);
probe_idregs_ite_helper("(init=it8228e) ", port);
exit_conf_mode_ite(port);
+ if (chip_found_at_port)
+ return;
enter_conf_mode_winbond_fintek_ite_8787(port);
probe_idregs_ite_helper("(init=0x87,0x87) ", port);
exit_conf_mode_winbond_fintek_ite_8787(port);
+ if (chip_found_at_port)
+ return;
}
}