Add detection/dump support for ServerEngines SE-SM 4210-P01.

[coreboot.git] / util / inteltool / powermgt.c

diff --git a/util/inteltool/powermgt.c b/util/inteltool/powermgt.c
index 3032f4dbe75f8f585b3b1d91082ba73714977ccf..a2ac32e1a9d7577097b2bc883f6e2ecc2c05b5a9 100644 (file)
--- a/util/inteltool/powermgt.c
+++ b/util/inteltool/powermgt.c
@@ -297,6 +297,32 @@ static const io_register_t ich6_pm_registers[] = {
        { 0x54, 4, "C3_RES (Mobile Only)" },
 };
 
+static const io_register_t ich5_pm_registers[] = {
+       { 0x00, 2, "PM1_STS" },
+       { 0x02, 2, "PM1_EN" },
+       { 0x04, 4, "PM1_CNT" },
+       { 0x08, 4, "PM1_TMR" },
+       { 0x0c, 4, "RESERVED" },
+       { 0x10, 4, "PROC_CNT" },
+       { 0x14, 3, "RESERVED" },
+       { 0x17, 9, "RESERVED" },
+       { 0x20, 1, "RESERVED" },
+       { 0x28, 4, "GPE0_STS" },
+       { 0x2c, 4, "GPE0_EN" },
+       { 0x30, 4, "SMI_EN" },
+       { 0x34, 4, "SMI_STS" },
+       { 0x38, 2, "ALT_GP_SMI_EN" },
+       { 0x3a, 2, "ALT_GP_SMI_STS" },
+       { 0x3c, 4, "RESERVED" },
+       { 0x40, 1, "MON_SMI" },
+       { 0x42, 2, "RESERVED" },
+       { 0x44, 1, "DEVACT_STS" },
+       { 0x48, 1, "DEVTRAP_EN" },
+       { 0x50, 1, "RESERVED" },
+       { 0x51, 15, "RESERVED" },
+       { 0x60, 16, "RESERVED" },
+};
+
 static const io_register_t ich4_pm_registers[] = {
        { 0x00, 2, "PM1_STS" },
        { 0x02, 2, "PM1_EN" },
@@ -524,11 +550,12 @@ static const io_register_t i82371xx_pm_registers[] = {
        { 0x37, 1, "GPOREG 3" },
 };
 
-int print_pmbase(struct pci_dev *sb)
+int print_pmbase(struct pci_dev *sb, struct pci_access *pacc)
 {
        int i, size;
        uint16_t pmbase;
        const io_register_t *pm_registers;
+       struct pci_dev *acpi;
 
        printf("\n============= PMBASE ============\n\n");
 
@@ -568,6 +595,11 @@ int print_pmbase(struct pci_dev *sb)
                pm_registers = ich6_pm_registers;
                size = ARRAY_SIZE(ich6_pm_registers);
                break;
+       case PCI_DEVICE_ID_INTEL_ICH5:
+               pmbase = pci_read_word(sb, 0x40) & 0xfffc;
+               pm_registers = ich5_pm_registers;
+               size = ARRAY_SIZE(ich5_pm_registers);
+               break;
        case PCI_DEVICE_ID_INTEL_ICH4:
                pmbase = pci_read_word(sb, 0x40) & 0xfffc;
                pm_registers = ich4_pm_registers;
@@ -584,7 +616,12 @@ int print_pmbase(struct pci_dev *sb)
                size = ARRAY_SIZE(ich0_pm_registers);
                break;
        case PCI_DEVICE_ID_INTEL_82371XX:
-               pmbase = pci_read_word(sb, 0x40) & 0xfffc;
+               acpi = pci_get_dev(pacc, sb->domain, sb->bus, sb->dev, 3);
+               if (!acpi) {
+                       printf("Southbridge function 3 not found.\n");
+                       return 1;
+               }
+               pmbase = pci_read_word(acpi, 0x40) & 0xfffc;
                pm_registers = i82371xx_pm_registers;
                size = ARRAY_SIZE(i82371xx_pm_registers);
                break;
@@ -623,4 +660,3 @@ int print_pmbase(struct pci_dev *sb)
 
        return 0;
 }
-