{ 0x3C, 4, "RESERVED" }
};
+static const io_register_t ich5_gpio_registers[] = {
+ { 0x00, 4, "GPIO_USE_SEL" },
+ { 0x04, 4, "GP_IO_SEL" },
+ { 0x08, 4, "RESERVED" },
+ { 0x0c, 4, "GP_LVL" },
+ { 0x10, 4, "RESERVED" },
+ { 0x14, 4, "GPO_TTL"},
+ { 0x18, 4, "GPO_BLINK"},
+ { 0x1c, 4, "RESERVED" },
+ { 0x20, 4, "RESERVED" },
+ { 0x2c, 4, "GPI_INV" },
+ { 0x30, 4, "GPIO_USE_SEL2" },
+ { 0x34, 4, "GP_IO_SEL2" },
+ { 0x38, 4, "GP_LVL2" },
+};
+
static const io_register_t ich6_gpio_registers[] = {
{ 0x00, 4, "GPIO_USE_SEL" },
{ 0x08, 4, "RESERVED" },
gpio_registers = ich6_gpio_registers;
size = ARRAY_SIZE(ich6_gpio_registers);
break;
+ case PCI_DEVICE_ID_INTEL_ICH5:
+ gpiobase = pci_read_word(sb, 0x58) & 0xfffc;
+ gpio_registers = ich5_gpio_registers;
+ size = ARRAY_SIZE(ich5_gpio_registers);
+ break;
case PCI_DEVICE_ID_INTEL_ICH4:
case PCI_DEVICE_ID_INTEL_ICH4M:
gpiobase = pci_read_word(sb, 0x58) & 0xfffc;
return 0;
}
-