this should get the VIA VT8454c in shape with Kconfig

[coreboot.git] / targets / artecgroup / dbe61 / Config.lb

diff --git a/targets/artecgroup/dbe61/Config.lb b/targets/artecgroup/dbe61/Config.lb
index 9a5ec8acb981915ee2578d43c7c1bd8cab667c53..eaa979c6f545e1a273ca6610954ee5c88a77ba06 100644 (file)
--- a/targets/artecgroup/dbe61/Config.lb
+++ b/targets/artecgroup/dbe61/Config.lb
@@ -9,26 +9,24 @@ option CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2=1
 option CONFIG_COMPRESSED_PAYLOAD_NRV2B=0
 option CONFIG_COMPRESSED_PAYLOAD_LZMA=0
 
-## ROM_SIZE is the total number of bytes allocated for coreboot use
+## CONFIG_ROM_SIZE is the total number of bytes allocated for coreboot use
 ## (normal AND fallback images and payloads).
 ## leave 36k for vsa and 32K for video ROM
-#option ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024
+#option CONFIG_ROM_SIZE = 1024*256 - 36*1024 - 32 * 1024
 
 #No VGA for now
-option ROM_SIZE = 1024*512 - 36*1024
+option CONFIG_ROM_SIZE = 1024*512 - 36*1024
 
-# ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
+# CONFIG_ROM_IMAGE_SIZE is the maximum number of bytes allowed for a coreboot image,
 ## not including any payload.
-option ROM_IMAGE_SIZE=64*1024
+option CONFIG_ROM_IMAGE_SIZE=64*1024
 
-option FALLBACK_SIZE = ROM_SIZE
-
-option DEFAULT_CONSOLE_LOGLEVEL = 9
-option MAXIMUM_CONSOLE_LOGLEVEL = 9
+option CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 9
+option CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 9
 romimage "fallback" 
-       option USE_FALLBACK_IMAGE=1
+       option CONFIG_USE_FALLBACK_IMAGE=1
        option COREBOOT_EXTRA_VERSION=".0Fallback"
        payload ../payload.elf
 end
 
-buildrom ./coreboot.rom ROM_SIZE  "fallback"
+buildrom ./coreboot.rom CONFIG_ROM_SIZE  "fallback"