* src/vm/jit/alpha/md.c (md_init): Smaller changes.

[cacao.git] / src / vm / jit / x86_64 / machine-instr.h

diff --git a/src/vm/jit/x86_64/machine-instr.h b/src/vm/jit/x86_64/machine-instr.h
index 565e1b3d0259fb0dbe16a6cfaeb6f8c769e913df..8e863822f58c46459772b2bb4da5992d49820019 100644 (file)
--- a/src/vm/jit/x86_64/machine-instr.h
+++ b/src/vm/jit/x86_64/machine-instr.h
@@ -1,26 +1,31 @@
 #ifndef _MACHINE_INSTR_H
 #define _MACHINE_INSTR_H
 
-static inline long
+static inline void
 __attribute__ ((unused))
-atomic_swap (volatile long *mem, long val)
+atomic_add (volatile int *mem, int val)
 {
-  __asm__ __volatile__ ("xchgq %2,%0"
-            : "=r" (val) : "0" (val), "m" (*mem));
-  return val;
+  __asm__ __volatile__ ("lock; addl %1,%0"
+                                               : "=m" (*mem) 
+                                               : "ir" (val), "m" (*mem));
 }
 
-static inline char
+static inline long
 __attribute__ ((unused))
-compare_and_swap (volatile long int *p, long int oldval, long int newval)
+compare_and_swap (volatile long *p, long oldval, long newval)
 {
-  char ret;
-  long int readval;
+  long ret;
 
-  __asm__ __volatile__ ("lock; cmpxchgq %3, %1; sete %0"
-                        : "=q" (ret), "=m" (*p), "=a" (readval)
-                        : "r" (newval), "m" (*p), "2" (oldval));
+  __asm__ __volatile__ ("lock; cmpxchgq %2, %1"
+                        : "=a" (ret), "=m" (*p)
+                        : "r" (newval), "m" (*p), "0" (oldval));
   return ret;
 }
 
+#define STORE_ORDER_BARRIER() __asm__ __volatile__ ("" : : : "memory");
+#define MEMORY_BARRIER_BEFORE_ATOMIC() __asm__ __volatile__ ("" : : : "memory");
+#define MEMORY_BARRIER_AFTER_ATOMIC() __asm__ __volatile__ ("" : : : "memory");
+#define MEMORY_BARRIER() __asm__ __volatile__ ( \
+               "mfence" : : : "memory" );
+
 #endif