/* src/vm/jit/x86_64/emit.c - x86_64 code emitter functions
- Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
#include "threads/lock-common.h"
-#include "vm/builtin.h"
-#include "vm/exceptions.h"
+#include "vm/options.h"
#include "vm/jit/abi.h"
#include "vm/jit/abi-asm.h"
#include "vm/jit/asmpart.h"
-#include "vm/jit/codegen-common.h"
-#include "vm/jit/emit-common.h"
-#include "vm/jit/jit.h"
-#include "vm/jit/patcher-common.h"
-#include "vm/jit/replace.h"
-
-#include "vmcore/options.h"
+#include "vm/jit/codegen-common.hpp"
+#include "vm/jit/emit-common.hpp"
+#include "vm/jit/jit.hpp"
+#include "vm/jit/patcher-common.hpp"
+#include "vm/jit/replace.hpp"
+#include "vm/jit/trace.hpp"
+#include "vm/jit/trap.h"
/* emit_load *******************************************************************
*******************************************************************************/
-inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
+void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
{
codegendata *cd;
s4 disp;
-#if 0
- s4 s;
- u2 opcode;
-#endif
/* get required compiler data */
cd = jd->cd;
-#if 0
- /* do we have to generate a conditional move? */
-
- if ((iptr != NULL) && (iptr->opc & ICMD_CONDITION_MASK)) {
- /* the passed register d is actually the source register */
-
- s = d;
-
- /* Only pass the opcode to codegen_reg_of_var to get the real
- destination register. */
-
- opcode = iptr->opc & ICMD_OPCODE_MASK;
-
- /* get the real destination register */
-
- d = codegen_reg_of_var(rd, opcode, dst, REG_ITMP1);
-
- /* and emit the conditional move */
-
- emit_cmovxx(cd, iptr, s, d);
- }
-#endif
-
if (IS_INMEMORY(dst->flags)) {
COUNT_SPILLS;
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_TEST(reg);
M_BNE(8);
- M_ALD_MEM(reg, EXCEPTION_HARDWARE_ARITHMETIC);
+ M_ALD_MEM(reg, TRAP_ArithmeticException);
}
}
M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
M_ICMP(REG_ITMP3, s2);
M_BULT(8);
- M_ALD_MEM(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
+ M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
}
}
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_TEST(REG_RESULT);
M_BNE(8);
- M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_ARRAYSTORE);
+ M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
}
}
case BRANCH_LE:
M_BGT(8);
break;
+ case BRANCH_GE:
+ M_BLT(8);
+ break;
case BRANCH_EQ:
M_BNE(8);
break;
+ case BRANCH_NE:
+ M_BEQ(8);
+ break;
case BRANCH_UGT:
M_BULE(8);
break;
default:
vm_abort("emit_classcast_check: unknown condition %d", condition);
}
- M_ALD_MEM(s1, EXCEPTION_HARDWARE_CLASSCAST);
+ M_ALD_MEM(s1, TRAP_ClassCastException);
}
}
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_TEST(reg);
M_BNE(8);
- M_ALD_MEM(reg, EXCEPTION_HARDWARE_NULLPOINTER);
+ M_ALD_MEM(reg, TRAP_NullPointerException);
}
}
if (INSTRUCTION_MUST_CHECK(iptr)) {
M_TEST(REG_RESULT);
M_BNE(8);
- M_ALD_MEM(REG_RESULT, EXCEPTION_HARDWARE_EXCEPTION);
+ M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
}
}
-/* emit_trap *******************************************************************
+/* emit_trap_compiler **********************************************************
- Emit a JIT compiler trap instruction.
+ Emit a trap instruction which calls the JIT compiler.
*******************************************************************************/
void emit_trap_compiler(codegendata *cd)
{
- M_ALD_MEM(REG_METHODPTR, EXCEPTION_HARDWARE_COMPILER);
+ M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
}
void emit_verbosecall_enter(jitdata *jd)
{
methodinfo *m;
+ codeinfo *code;
codegendata *cd;
registerdata *rd;
methoddesc *md;
- s4 i, j, k;
+ s4 stackframesize;
+ s4 i, s;
/* get required compiler data */
- m = jd->m;
- cd = jd->cd;
- rd = jd->rd;
+ m = jd->m;
+ code = jd->code;
+ cd = jd->cd;
+ rd = jd->rd;
md = m->parseddesc;
M_NOP;
- /* additional +1 is for 16-byte stack alignment */
+ /* keep 16-byte stack alignment */
- M_LSUB_IMM((ARG_CNT + TMP_CNT + 1 + 1) * 8, REG_SP);
+ stackframesize = md->paramcount + ARG_CNT + TMP_CNT;
+ ALIGN_2(stackframesize);
+
+ M_LSUB_IMM(stackframesize * 8, REG_SP);
/* save argument registers */
- for (i = 0; i < INT_ARG_CNT; i++)
- M_LST(abi_registers_integer_argument[i], REG_SP, (1 + i) * 8);
+ for (i = 0; i < md->paramcount; i++) {
+ if (!md->params[i].inmemory) {
+ s = md->params[i].regoff;
+
+ switch (md->paramtypes[i].type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LST(s, REG_SP, i * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DST(s, REG_SP, i * 8);
+ break;
+ }
+ }
+ }
+
+ /* save all argument and temporary registers for leaf methods */
- for (i = 0; i < FLT_ARG_CNT; i++)
- M_DST(abi_registers_float_argument[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
+ if (code_is_leafmethod(code)) {
+ for (i = 0; i < INT_ARG_CNT; i++)
+ M_LST(abi_registers_integer_argument[i], REG_SP, (md->paramcount + i) * 8);
- /* save temporary registers for leaf methods */
+ for (i = 0; i < FLT_ARG_CNT; i++)
+ M_DST(abi_registers_float_argument[i], REG_SP, (md->paramcount + INT_ARG_CNT + i) * 8);
- if (jd->isleafmethod) {
for (i = 0; i < INT_TMP_CNT; i++)
- M_LST(rd->tmpintregs[i], REG_SP, (1 + ARG_CNT + i) * 8);
+ M_LST(rd->tmpintregs[i], REG_SP, (md->paramcount + ARG_CNT + i) * 8);
for (i = 0; i < FLT_TMP_CNT; i++)
- M_DST(rd->tmpfltregs[i], REG_SP, (1 + ARG_CNT + INT_TMP_CNT + i) * 8);
+ M_DST(rd->tmpfltregs[i], REG_SP, (md->paramcount + ARG_CNT + INT_TMP_CNT + i) * 8);
}
- /* show integer hex code for float arguments */
+ M_MOV_IMM(m, REG_A0);
+ M_MOV(REG_SP, REG_A1);
+ M_MOV(REG_SP, REG_A2);
+ M_AADD_IMM((stackframesize + cd->stackframesize + 1) * 8, REG_A2);
+ M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
+ M_CALL(REG_ITMP1);
- for (i = 0, j = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
- /* If the paramtype is a float, we have to right shift all
- following integer registers. */
-
- if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
- for (k = INT_ARG_CNT - 2; k >= i; k--)
- M_MOV(abi_registers_integer_argument[k],
- abi_registers_integer_argument[k + 1]);
-
- emit_movd_freg_reg(cd, abi_registers_float_argument[j],
- abi_registers_integer_argument[i]);
- j++;
+ /* restore argument registers */
+
+ for (i = 0; i < md->paramcount; i++) {
+ if (!md->params[i].inmemory) {
+ s = md->params[i].regoff;
+
+ switch (md->paramtypes[i].type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LLD(s, REG_SP, i * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DLD(s, REG_SP, i * 8);
+ break;
+ }
}
}
- M_MOV_IMM(m, REG_ITMP2);
- M_AST(REG_ITMP2, REG_SP, 0 * 8);
- M_MOV_IMM(builtin_verbosecall_enter, REG_ITMP1);
- M_CALL(REG_ITMP1);
-
- /* restore argument registers */
- for (i = 0; i < INT_ARG_CNT; i++)
- M_LLD(abi_registers_integer_argument[i], REG_SP, (1 + i) * 8);
+ /* restore all argument and temporary registers for leaf methods */
- for (i = 0; i < FLT_ARG_CNT; i++)
- M_DLD(abi_registers_float_argument[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
+ if (code_is_leafmethod(code)) {
+ for (i = 0; i < INT_ARG_CNT; i++)
+ M_LLD(abi_registers_integer_argument[i], REG_SP, (md->paramcount + i) * 8);
- /* restore temporary registers for leaf methods */
+ for (i = 0; i < FLT_ARG_CNT; i++)
+ M_DLD(abi_registers_float_argument[i], REG_SP, (md->paramcount + INT_ARG_CNT + i) * 8);
- if (jd->isleafmethod) {
for (i = 0; i < INT_TMP_CNT; i++)
- M_LLD(rd->tmpintregs[i], REG_SP, (1 + ARG_CNT + i) * 8);
+ M_LLD(rd->tmpintregs[i], REG_SP, (md->paramcount + ARG_CNT + i) * 8);
for (i = 0; i < FLT_TMP_CNT; i++)
- M_DLD(rd->tmpfltregs[i], REG_SP, (1 + ARG_CNT + INT_TMP_CNT + i) * 8);
+ M_DLD(rd->tmpfltregs[i], REG_SP, (md->paramcount + ARG_CNT + INT_TMP_CNT + i) * 8);
}
- M_LADD_IMM((ARG_CNT + TMP_CNT + 1 + 1) * 8, REG_SP);
+ M_LADD_IMM(stackframesize * 8, REG_SP);
/* mark trace code */
methodinfo *m;
codegendata *cd;
registerdata *rd;
+ methoddesc *md;
/* get required compiler data */
cd = jd->cd;
rd = jd->rd;
+ md = m->parseddesc;
+
/* mark trace code */
M_NOP;
+ /* keep 16-byte stack alignment */
+
M_ASUB_IMM(2 * 8, REG_SP);
- M_LST(REG_RESULT, REG_SP, 0 * 8);
- M_DST(REG_FRESULT, REG_SP, 1 * 8);
+ /* save return value */
- M_INTMOVE(REG_RESULT, REG_A0);
- M_FLTMOVE(REG_FRESULT, REG_FA0);
- M_FLTMOVE(REG_FRESULT, REG_FA1);
- M_MOV_IMM(m, REG_A1);
+ switch (md->returntype.type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LST(REG_RESULT, REG_SP, 0 * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DST(REG_FRESULT, REG_SP, 0 * 8);
+ break;
+ }
+
+ M_MOV_IMM(m, REG_A0);
+ M_MOV(REG_SP, REG_A1);
- M_MOV_IMM(builtin_verbosecall_exit, REG_ITMP1);
+ M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
M_CALL(REG_ITMP1);
- M_LLD(REG_RESULT, REG_SP, 0 * 8);
- M_DLD(REG_FRESULT, REG_SP, 1 * 8);
+ /* restore return value */
+
+ switch (md->returntype.type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LLD(REG_RESULT, REG_SP, 0 * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DLD(REG_FRESULT, REG_SP, 0 * 8);
+ break;
+ }
M_AADD_IMM(2 * 8, REG_SP);
}
+void emit_movzbq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
+{
+ emit_rex(1,(dreg),0,(reg));
+ *(cd->mcodeptr++) = 0x0f;
+ *(cd->mcodeptr++) = 0xb6;
+ /* XXX: why do reg and dreg have to be exchanged */
+ emit_reg((dreg),(reg));
+}
+
+
void emit_movzwq_reg_reg(codegendata *cd, s8 reg, s8 dreg)
{
emit_rex(1,(dreg),0,(reg));
void emit_alu_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
if (IS_IMM8(imm)) {
- emit_rex(1,(basereg),0,0);
+ emit_rex(1,0,0,(basereg));
*(cd->mcodeptr++) = 0x83;
emit_membase(cd, (basereg),(disp),(opc));
emit_imm8((imm));
} else {
- emit_rex(1,(basereg),0,0);
+ emit_rex(1,0,0,(basereg));
*(cd->mcodeptr++) = 0x81;
emit_membase(cd, (basereg),(disp),(opc));
emit_imm32((imm));
void emit_alul_imm_membase(codegendata *cd, s8 opc, s8 imm, s8 basereg, s8 disp) {
if (IS_IMM8(imm)) {
- emit_rex(0,(basereg),0,0);
+ emit_rex(0,0,0,(basereg));
*(cd->mcodeptr++) = 0x83;
emit_membase(cd, (basereg),(disp),(opc));
emit_imm8((imm));
} else {
- emit_rex(0,(basereg),0,0);
+ emit_rex(0,0,0,(basereg));
*(cd->mcodeptr++) = 0x81;
emit_membase(cd, (basereg),(disp),(opc));
emit_imm32((imm));
}
}
+void emit_alu_memindex_reg(codegendata *cd, s8 opc, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg)
+{
+ emit_rex(1,(reg),(indexreg),(basereg));
+ *(cd->mcodeptr++) = (((opc)) << 3) + 3;
+ emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
+}
+
+void emit_alul_memindex_reg(codegendata *cd, s8 opc, s8 disp, s8 basereg, s8 indexreg, s8 scale, s8 reg)
+{
+ emit_rex(0,(reg),(indexreg),(basereg));
+ *(cd->mcodeptr++) = (((opc)) << 3) + 3;
+ emit_memindex(cd, (reg),(disp),(basereg),(indexreg),(scale));
+}
void emit_test_reg_reg(codegendata *cd, s8 reg, s8 dreg) {
emit_rex(1,(reg),0,(dreg));
}
+void emit_incl_reg(codegendata *cd, s8 reg)
+{
+ *(cd->mcodeptr++) = 0xff;
+ emit_reg(0,(reg));
+}
+
+void emit_incq_reg(codegendata *cd, s8 reg)
+{
+ emit_rex(1,0,0,(reg));
+ *(cd->mcodeptr++) = 0xff;
+ emit_reg(0,(reg));
+}
void emit_incl_membase(codegendata *cd, s8 basereg, s8 disp)
{
emit_membase(cd, (basereg),(disp),0);
}
+void emit_incq_membase(codegendata *cd, s8 basereg, s8 disp)
+{
+ emit_rex(1,0,0,(basereg));
+ *(cd->mcodeptr++) = 0xff;
+ emit_membase(cd, (basereg),(disp),0);
+}
+
void emit_cltd(codegendata *cd) {
emit_imm32((imm));
}
+/* like emit_jmp_imm but allows 8 bit optimization */
+void emit_jmp_imm2(codegendata *cd, s8 imm) {
+ if (IS_IMM8(imm)) {
+ *(cd->mcodeptr++) = 0xeb;
+ emit_imm8((imm));
+ }
+ else {
+ *(cd->mcodeptr++) = 0xe9;
+ emit_imm32((imm));
+ }
+}
+
void emit_jmp_reg(codegendata *cd, s8 reg) {
emit_rex(0,0,0,(reg));