* Removed all Id tags.
[cacao.git] / src / vm / jit / x86_64 / emit.c
index 70e52f9a7d9ef8cfc75a2a7caff861e3597e3208..44f3742a704166127f9e5f0a97401c5cfbe85e59 100644 (file)
@@ -22,8 +22,6 @@
    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    02110-1301, USA.
 
-   $Id: emit.c 7596 2007-03-28 21:05:53Z twisti $
-
 */
 
 #include "config.h"
 
 #include "mm/memory.h"
 
-#if defined(ENABLE_THREADS)
-# include "threads/native/lock.h"
-#endif
+#include "threads/lock-common.h"
 
 #include "vm/builtin.h"
 #include "vm/exceptions.h"
 
+#include "vm/jit/abi.h"
 #include "vm/jit/abi-asm.h"
 #include "vm/jit/asmpart.h"
 #include "vm/jit/codegen-common.h"
@@ -75,7 +72,7 @@ s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
        if (IS_INMEMORY(src->flags)) {
                COUNT_SPILLS;
 
-               disp = src->vv.regoff * 8;
+               disp = src->vv.regoff;
 
                switch (src->type) {
                case TYPE_INT:
@@ -152,7 +149,7 @@ inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
        if (IS_INMEMORY(dst->flags)) {
                COUNT_SPILLS;
 
-               disp = dst->vv.regoff * 8;
+               disp = dst->vv.regoff;
 
                switch (dst->type) {
                case TYPE_INT:
@@ -179,29 +176,41 @@ inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
 
 *******************************************************************************/
 
-void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
+void emit_copy(jitdata *jd, instruction *iptr)
 {
-       codegendata  *cd;
-       s4            s1, d;
+       codegendata *cd;
+       varinfo     *src;
+       varinfo     *dst;
+       s4           s1, d;
 
        /* get required compiler data */
 
        cd = jd->cd;
 
+       /* get source and destination variables */
+
+       src = VAROP(iptr->s1);
+       dst = VAROP(iptr->dst);
+
        if ((src->vv.regoff != dst->vv.regoff) ||
                ((src->flags ^ dst->flags) & INMEMORY)) {
 
+               if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
+                       /* emit nothing, as the value won't be used anyway */
+                       return;
+               }
+
                /* If one of the variables resides in memory, we can eliminate
                   the register move from/to the temporary register with the
                   order of getting the destination register and the load. */
 
                if (IS_INMEMORY(src->flags)) {
-                       d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
+                       d  = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
                        s1 = emit_load(jd, iptr, src, d);
                }
                else {
                        s1 = emit_load(jd, iptr, src, REG_IFTMP);
-                       d = codegen_reg_of_var(iptr->opc, dst, s1);
+                       d  = codegen_reg_of_var(iptr->opc, dst, s1);
                }
 
                if (s1 != d) {
@@ -342,7 +351,7 @@ void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
 void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
 {
        if (INSTRUCTION_MUST_CHECK(iptr)) {
-        M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
+        M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
         M_ICMP(REG_ITMP3, s2);
                M_BULT(8);
                M_ALD_MEM(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
@@ -496,66 +505,25 @@ void emit_patcher_stubs(jitdata *jd)
 }
 
 
-/* emit_replacement_stubs ******************************************************
+/* emit_trap *******************************************************************
 
-   Generates the code for the replacement stubs.
+   Emit a trap instruction and return the original machine code.
 
 *******************************************************************************/
 
-#if defined(ENABLE_REPLACEMENT)
-void emit_replacement_stubs(jitdata *jd)
+uint32_t emit_trap(codegendata *cd)
 {
-       codegendata *cd;
-       codeinfo    *code;
-       rplpoint    *rplp;
-       s4           disp;
-       s4           i;
-#if !defined(NDEBUG)
-       u1          *savedmcodeptr;
-#endif
-
-       /* get required compiler data */
-
-       cd   = jd->cd;
-       code = jd->code;
+       uint32_t mcode;
 
-       rplp = code->rplpoints;
+       /* Get machine code which is patched back in later. The
+          trap is 1 instruction word long. */
 
-       /* store beginning of replacement stubs */
+       mcode = *((uint32_t *) cd->mcodeptr);
 
-       code->replacementstubs = (u1*) (cd->mcodeptr - cd->mcodebase);
-
-       for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
-               /* do not generate stubs for non-trappable points */
-
-               if (rplp->flags & RPLPOINT_FLAG_NOTRAP)
-                       continue;
-
-               /* check code segment size */
-
-               MCODECHECK(512);
-
-               /* note start of stub code */
-
-#if !defined(NDEBUG)
-               savedmcodeptr = cd->mcodeptr;
-#endif
-
-               /* push address of `rplpoint` struct */
-                       
-               M_MOV_IMM(rplp, REG_ITMP3);
-               M_PUSH(REG_ITMP3);
-
-               /* jump to replacement function */
-
-               M_MOV_IMM(asm_replacement_out, REG_ITMP3);
-               M_PUSH(REG_ITMP3);
-               M_RET;
+       M_NOP;
 
-               assert((cd->mcodeptr - savedmcodeptr) == REPLACEMENT_STUB_SIZE);
-       }
+       return mcode;
 }
-#endif /* defined(ENABLE_REPLACEMENT) */
 
 
 /* emit_verbosecall_enter ******************************************************
@@ -592,10 +560,10 @@ void emit_verbosecall_enter(jitdata *jd)
        /* save argument registers */
 
        for (i = 0; i < INT_ARG_CNT; i++)
-               M_LST(rd->argintregs[i], REG_SP, (1 + i) * 8);
+               M_LST(abi_registers_integer_argument[i], REG_SP, (1 + i) * 8);
 
        for (i = 0; i < FLT_ARG_CNT; i++)
-               M_DST(rd->argfltregs[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
+               M_DST(abi_registers_float_argument[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
 
        /* save temporary registers for leaf methods */
 
@@ -615,9 +583,11 @@ void emit_verbosecall_enter(jitdata *jd)
        
                if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
                        for (k = INT_ARG_CNT - 2; k >= i; k--)
-                               M_MOV(rd->argintregs[k], rd->argintregs[k + 1]);
+                               M_MOV(abi_registers_integer_argument[k],
+                                         abi_registers_integer_argument[k + 1]);
 
-                       emit_movd_freg_reg(cd, rd->argfltregs[j], rd->argintregs[i]);
+                       emit_movd_freg_reg(cd, abi_registers_float_argument[j],
+                                                          abi_registers_integer_argument[i]);
                        j++;
                }
        }
@@ -630,10 +600,10 @@ void emit_verbosecall_enter(jitdata *jd)
        /* restore argument registers */
 
        for (i = 0; i < INT_ARG_CNT; i++)
-               M_LLD(rd->argintregs[i], REG_SP, (1 + i) * 8);
+               M_LLD(abi_registers_integer_argument[i], REG_SP, (1 + i) * 8);
 
        for (i = 0; i < FLT_ARG_CNT; i++)
-               M_DLD(rd->argfltregs[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
+               M_DLD(abi_registers_float_argument[i], REG_SP, (1 + INT_ARG_CNT + i) * 8);
 
        /* restore temporary registers for leaf methods */
 
@@ -803,53 +773,53 @@ void emit_ishift(jitdata *jd, s4 shift_op, instruction *iptr)
        if (IS_INMEMORY(v_dst->flags)) {
                if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
                        if (s1 == d) {
-                               M_ILD(RCX, REG_SP, s2 * 8);
-                               emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
+                               M_ILD(RCX, REG_SP, s2);
+                               emit_shiftl_membase(cd, shift_op, REG_SP, d);
 
                        } else {
-                               M_ILD(RCX, REG_SP, s2 * 8);
-                               M_ILD(REG_ITMP2, REG_SP, s1 * 8);
+                               M_ILD(RCX, REG_SP, s2);
+                               M_ILD(REG_ITMP2, REG_SP, s1);
                                emit_shiftl_reg(cd, shift_op, REG_ITMP2);
-                               M_IST(REG_ITMP2, REG_SP, d * 8);
+                               M_IST(REG_ITMP2, REG_SP, d);
                        }
 
                } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
                        /* s1 may be equal to RCX */
                        if (s1 == RCX) {
                                if (s2 == d) {
-                                       M_ILD(REG_ITMP1, REG_SP, s2 * 8);
-                                       M_IST(s1, REG_SP, d * 8);
+                                       M_ILD(REG_ITMP1, REG_SP, s2);
+                                       M_IST(s1, REG_SP, d);
                                        M_INTMOVE(REG_ITMP1, RCX);
 
                                } else {
-                                       M_IST(s1, REG_SP, d * 8);
-                                       M_ILD(RCX, REG_SP, s2 * 8);
+                                       M_IST(s1, REG_SP, d);
+                                       M_ILD(RCX, REG_SP, s2);
                                }
 
                        } else {
-                               M_ILD(RCX, REG_SP, s2 * 8);
-                               M_IST(s1, REG_SP, d * 8);
+                               M_ILD(RCX, REG_SP, s2);
+                               M_IST(s1, REG_SP, d);
                        }
 
-                       emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
+                       emit_shiftl_membase(cd, shift_op, REG_SP, d);
 
                } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
                        if (s1 == d) {
                                M_INTMOVE(s2, RCX);
-                               emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
+                               emit_shiftl_membase(cd, shift_op, REG_SP, d);
 
                        } else {
                                M_INTMOVE(s2, RCX);
-                               M_ILD(REG_ITMP2, REG_SP, s1 * 8);
+                               M_ILD(REG_ITMP2, REG_SP, s1);
                                emit_shiftl_reg(cd, shift_op, REG_ITMP2);
-                               M_IST(REG_ITMP2, REG_SP, d * 8);
+                               M_IST(REG_ITMP2, REG_SP, d);
                        }
 
                } else {
                        /* s1 may be equal to RCX */
-                       M_IST(s1, REG_SP, d * 8);
+                       M_IST(s1, REG_SP, d);
                        M_INTMOVE(s2, RCX);
-                       emit_shiftl_membase(cd, shift_op, REG_SP, d * 8);
+                       emit_shiftl_membase(cd, shift_op, REG_SP, d);
                }
 
                M_INTMOVE(REG_ITMP1, RCX);                             /* restore RCX */
@@ -861,19 +831,19 @@ void emit_ishift(jitdata *jd, s4 shift_op, instruction *iptr)
                }
                                        
                if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
-                       M_ILD(RCX, REG_SP, s2 * 8);
-                       M_ILD(d, REG_SP, s1 * 8);
+                       M_ILD(RCX, REG_SP, s2);
+                       M_ILD(d, REG_SP, s1);
                        emit_shiftl_reg(cd, shift_op, d);
 
                } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
                        /* s1 may be equal to RCX */
                        M_INTMOVE(s1, d);
-                       M_ILD(RCX, REG_SP, s2 * 8);
+                       M_ILD(RCX, REG_SP, s2);
                        emit_shiftl_reg(cd, shift_op, d);
 
                } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
                        M_INTMOVE(s2, RCX);
-                       M_ILD(d, REG_SP, s1 * 8);
+                       M_ILD(d, REG_SP, s1);
                        emit_shiftl_reg(cd, shift_op, d);
 
                } else {
@@ -930,53 +900,53 @@ void emit_lshift(jitdata *jd, s4 shift_op, instruction *iptr)
        if (IS_INMEMORY(v_dst->flags)) {
                if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
                        if (s1 == d) {
-                               M_ILD(RCX, REG_SP, s2 * 8);
-                               emit_shift_membase(cd, shift_op, REG_SP, d * 8);
+                               M_ILD(RCX, REG_SP, s2);
+                               emit_shift_membase(cd, shift_op, REG_SP, d);
 
                        } else {
-                               M_ILD(RCX, REG_SP, s2 * 8);
-                               M_LLD(REG_ITMP2, REG_SP, s1 * 8);
+                               M_ILD(RCX, REG_SP, s2);
+                               M_LLD(REG_ITMP2, REG_SP, s1);
                                emit_shift_reg(cd, shift_op, REG_ITMP2);
-                               M_LST(REG_ITMP2, REG_SP, d * 8);
+                               M_LST(REG_ITMP2, REG_SP, d);
                        }
 
                } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
                        /* s1 may be equal to RCX */
                        if (s1 == RCX) {
                                if (s2 == d) {
-                                       M_ILD(REG_ITMP1, REG_SP, s2 * 8);
-                                       M_LST(s1, REG_SP, d * 8);
+                                       M_ILD(REG_ITMP1, REG_SP, s2);
+                                       M_LST(s1, REG_SP, d);
                                        M_INTMOVE(REG_ITMP1, RCX);
 
                                } else {
-                                       M_LST(s1, REG_SP, d * 8);
-                                       M_ILD(RCX, REG_SP, s2 * 8);
+                                       M_LST(s1, REG_SP, d);
+                                       M_ILD(RCX, REG_SP, s2);
                                }
 
                        } else {
-                               M_ILD(RCX, REG_SP, s2 * 8);
-                               M_LST(s1, REG_SP, d * 8);
+                               M_ILD(RCX, REG_SP, s2);
+                               M_LST(s1, REG_SP, d);
                        }
 
-                       emit_shift_membase(cd, shift_op, REG_SP, d * 8);
+                       emit_shift_membase(cd, shift_op, REG_SP, d);
 
                } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
                        if (s1 == d) {
                                M_INTMOVE(s2, RCX);
-                               emit_shift_membase(cd, shift_op, REG_SP, d * 8);
+                               emit_shift_membase(cd, shift_op, REG_SP, d);
 
                        } else {
                                M_INTMOVE(s2, RCX);
-                               M_LLD(REG_ITMP2, REG_SP, s1 * 8);
+                               M_LLD(REG_ITMP2, REG_SP, s1);
                                emit_shift_reg(cd, shift_op, REG_ITMP2);
-                               M_LST(REG_ITMP2, REG_SP, d * 8);
+                               M_LST(REG_ITMP2, REG_SP, d);
                        }
 
                } else {
                        /* s1 may be equal to RCX */
-                       M_LST(s1, REG_SP, d * 8);
+                       M_LST(s1, REG_SP, d);
                        M_INTMOVE(s2, RCX);
-                       emit_shift_membase(cd, shift_op, REG_SP, d * 8);
+                       emit_shift_membase(cd, shift_op, REG_SP, d);
                }
 
                M_INTMOVE(REG_ITMP1, RCX);                             /* restore RCX */
@@ -988,19 +958,19 @@ void emit_lshift(jitdata *jd, s4 shift_op, instruction *iptr)
                }
 
                if (IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
-                       M_ILD(RCX, REG_SP, s2 * 8);
-                       M_LLD(d, REG_SP, s1 * 8);
+                       M_ILD(RCX, REG_SP, s2);
+                       M_LLD(d, REG_SP, s1);
                        emit_shift_reg(cd, shift_op, d);
 
                } else if (IS_INMEMORY(v_s2->flags) && !IS_INMEMORY(v_s1->flags)) {
                        /* s1 may be equal to RCX */
                        M_INTMOVE(s1, d);
-                       M_ILD(RCX, REG_SP, s2 * 8);
+                       M_ILD(RCX, REG_SP, s2);
                        emit_shift_reg(cd, shift_op, d);
 
                } else if (!IS_INMEMORY(v_s2->flags) && IS_INMEMORY(v_s1->flags)) {
                        M_INTMOVE(s2, RCX);
-                       M_LLD(d, REG_SP, s1 * 8);
+                       M_LLD(d, REG_SP, s1);
                        emit_shift_reg(cd, shift_op, d);
 
                } else {