/* src/vm/jit/x86_64/codegen.c - machine code generator for x86_64
- Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008, 2009, 2010
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- Contact: cacao@cacaojvm.org
-
- Authors: Andreas Krall
- Christian Thalinger
-
- Changes: Christian Ullrich
- Edwin Steiner
-
- $Id: codegen.c 4690 2006-03-27 11:37:46Z twisti $
-
*/
#include <assert.h>
#include <stdio.h>
+#include <stdint.h>
#include "vm/types.h"
+#include "vm/os.hpp"
-#include "md.h"
#include "md-abi.h"
#include "vm/jit/x86_64/arch.h"
#include "vm/jit/x86_64/codegen.h"
-#include "vm/jit/x86_64/emitfuncs.h"
+#include "vm/jit/x86_64/emit.h"
-#include "native/native.h"
-#include "vm/builtin.h"
-#include "vm/exceptions.h"
+#include "mm/memory.hpp"
+
+#include "native/localref.hpp"
+#include "native/native.hpp"
+
+#include "threads/lock.hpp"
+
+#include "vm/jit/builtin.hpp"
+#include "vm/exceptions.hpp"
#include "vm/global.h"
-#include "vm/loader.h"
+#include "vm/loader.hpp"
#include "vm/options.h"
+#include "vm/primitive.hpp"
#include "vm/statistics.h"
-#include "vm/stringlocal.h"
-#include "vm/vm.h"
+#include "vm/string.hpp"
+#include "vm/vm.hpp"
+
+#include "vm/jit/abi.h"
#include "vm/jit/asmpart.h"
-#include "vm/jit/codegen-common.h"
+#include "vm/jit/code.hpp"
+#include "vm/jit/codegen-common.hpp"
#include "vm/jit/dseg.h"
-#include "vm/jit/jit.h"
+#include "vm/jit/emit-common.hpp"
+#include "vm/jit/jit.hpp"
+#include "vm/jit/linenumbertable.hpp"
#include "vm/jit/methodheader.h"
-#include "vm/jit/parse.h"
-#include "vm/jit/patcher.h"
+#include "vm/jit/parse.hpp"
+#include "vm/jit/patcher-common.hpp"
#include "vm/jit/reg.h"
-#include "vm/jit/replace.h"
+#include "vm/jit/stacktrace.hpp"
+#include "vm/jit/trap.hpp"
-#if defined(ENABLE_LSRA)
-# include "vm/jit/allocator/lsra.h"
-#endif
-
-
-
-
-/* codegen *********************************************************************
-
- Generates machine code.
-
-*******************************************************************************/
-bool codegen(methodinfo *m, codegendata *cd, registerdata *rd)
+/**
+ * Generates machine code for the method prolog.
+ */
+void codegen_emit_prolog(jitdata* jd)
{
- s4 len, s1, s2, s3, d, disp;
- u2 currentline;
- ptrint a;
- s4 parentargs_base;
- stackptr src;
- varinfo *var;
- basicblock *bptr;
- instruction *iptr;
- exceptiontable *ex;
- methodinfo *lm; /* local methodinfo for ICMD_INVOKE* */
- builtintable_entry *bte;
- methoddesc *md;
- rplpoint *replacementpoint;
-
- /* prevent compiler warnings */
-
- d = 0;
- lm = NULL;
- bte = NULL;
-
- {
- s4 i, p, t, l;
- s4 savedregs_num;
-
- savedregs_num = 0;
-
- /* space to save used callee saved registers */
-
- savedregs_num += (INT_SAV_CNT - rd->savintreguse);
- savedregs_num += (FLT_SAV_CNT - rd->savfltreguse);
-
- parentargs_base = rd->memuse + savedregs_num;
-
-#if defined(USE_THREADS)
- /* space to save argument of monitor_enter */
-
- if (checksync && (m->flags & ACC_SYNCHRONIZED))
- parentargs_base++;
-#endif
-
- /* Keep stack of non-leaf functions 16-byte aligned for calls into native */
- /* code e.g. libc or jni (alignment problems with movaps). */
-
- if (!m->isleafmethod || opt_verbosecall)
- parentargs_base |= 0x1;
-
- /* create method header */
-
- (void) dseg_addaddress(cd, m); /* MethodPointer */
- (void) dseg_adds4(cd, parentargs_base * 8); /* FrameSize */
-
-#if defined(USE_THREADS)
- /* IsSync contains the offset relative to the stack pointer for the
- argument of monitor_exit used in the exception handler. Since the
- offset could be zero and give a wrong meaning of the flag it is
- offset by one.
- */
-
- if (checksync && (m->flags & ACC_SYNCHRONIZED))
- (void) dseg_adds4(cd, (rd->memuse + 1) * 8); /* IsSync */
- else
-#endif
- (void) dseg_adds4(cd, 0); /* IsSync */
-
- (void) dseg_adds4(cd, m->isleafmethod); /* IsLeaf */
- (void) dseg_adds4(cd, INT_SAV_CNT - rd->savintreguse); /* IntSave */
- (void) dseg_adds4(cd, FLT_SAV_CNT - rd->savfltreguse); /* FltSave */
-
- (void) dseg_addlinenumbertablesize(cd);
-
- (void) dseg_adds4(cd, cd->exceptiontablelength); /* ExTableSize */
-
- /* create exception table */
-
- for (ex = cd->exceptiontable; ex != NULL; ex = ex->down) {
- dseg_addtarget(cd, ex->start);
- dseg_addtarget(cd, ex->end);
- dseg_addtarget(cd, ex->handler);
- (void) dseg_addaddress(cd, ex->catchtype.cls);
- }
-
- /* initialize mcode variables */
-
- cd->mcodeptr = (u1 *) cd->mcodebase;
- cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
-
- /* initialize the last patcher pointer */
-
- cd->lastmcodeptr = cd->mcodeptr;
-
- /* generate method profiling code */
-
- if (opt_prof) {
- /* count frequency */
-
- M_MOV_IMM(m, REG_ITMP3);
- M_IINC_MEMBASE(REG_ITMP3, OFFSET(methodinfo, frequency));
-
- PROFILE_CYCLE_START;
- }
+ varinfo* var;
+ methoddesc* md;
+ int32_t s1;
+ int32_t p, t, l;
+ int32_t varindex;
+ int i;
+
+ // Get required compiler data.
+ methodinfo* m = jd->m;
+ codegendata* cd = jd->cd;
+ registerdata* rd = jd->rd;
/* create stack frame (if necessary) */
- if (parentargs_base)
- M_ASUB_IMM(parentargs_base * 8, REG_SP);
+ if (cd->stackframesize)
+ M_ASUB_IMM(cd->stackframesize * 8, REG_SP);
/* save used callee saved registers */
- p = parentargs_base;
+ p = cd->stackframesize;
for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
p--; M_LST(rd->savintregs[i], REG_SP, p * 8);
}
for (p = 0, l = 0; p < md->paramcount; p++) {
t = md->paramtypes[p].type;
- var = &(rd->locals[l][t]);
+
+ varindex = jd->local_map[l * 5 + t];
+
l++;
if (IS_2_WORD_TYPE(t)) /* increment local counter for 2 word types */
l++;
- if (var->type < 0)
- continue;
+
+ if (varindex == UNUSED)
+ continue;
+
+ var = VAR(varindex);
+
s1 = md->params[p].regoff;
+
if (IS_INT_LNG_TYPE(t)) { /* integer args */
- s2 = rd->argintregs[s1];
if (!md->params[p].inmemory) { /* register arguments */
- if (!(var->flags & INMEMORY)) { /* reg arg -> register */
- M_INTMOVE(s2, var->regoff);
-
- } else { /* reg arg -> spilled */
- M_LST(s2, REG_SP, var->regoff * 8);
- }
-
- } else { /* stack arguments */
- if (!(var->flags & INMEMORY)) { /* stack arg -> register */
+ if (!IS_INMEMORY(var->flags))
+ M_INTMOVE(s1, var->vv.regoff);
+ else
+ M_LST(s1, REG_SP, var->vv.regoff);
+ }
+ else { /* stack arguments */
+ if (!IS_INMEMORY(var->flags))
/* + 8 for return address */
- M_LLD(var->regoff, REG_SP, (parentargs_base + s1) * 8 + 8);
-
- } else { /* stack arg -> spilled */
- var->regoff = parentargs_base + s1 + 1;
- }
+ M_LLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1 + 8);
+ else
+ var->vv.regoff = cd->stackframesize * 8 + s1 + 8;
}
-
- } else { /* floating args */
+ }
+ else { /* floating args */
if (!md->params[p].inmemory) { /* register arguments */
- s2 = rd->argfltregs[s1];
- if (!(var->flags & INMEMORY)) { /* reg arg -> register */
- M_FLTMOVE(s2, var->regoff);
-
- } else { /* reg arg -> spilled */
- M_DST(s2, REG_SP, var->regoff * 8);
- }
-
- } else { /* stack arguments */
- if (!(var->flags & INMEMORY)) { /* stack-arg -> register */
- M_DLD(var->regoff, REG_SP, (parentargs_base + s1) * 8 + 8);
-
- } else {
- var->regoff = parentargs_base + s1 + 1;
- }
+ if (!IS_INMEMORY(var->flags))
+ emit_fmove(cd, s1, var->vv.regoff);
+ else
+ M_DST(s1, REG_SP, var->vv.regoff);
+ }
+ else { /* stack arguments */
+ if (!IS_INMEMORY(var->flags))
+ M_DLD(var->vv.regoff, REG_SP, cd->stackframesize * 8 + s1 + 8);
+ else
+ var->vv.regoff = cd->stackframesize * 8 + s1 + 8;
}
}
- } /* end for */
-
- /* save monitorenter argument */
-
-#if defined(USE_THREADS)
- if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
- /* stack offset for monitor argument */
-
- s1 = rd->memuse;
+ }
+}
- if (opt_verbosecall) {
- M_LSUB_IMM((INT_ARG_CNT + FLT_ARG_CNT) * 8, REG_SP);
- for (p = 0; p < INT_ARG_CNT; p++)
- M_LST(rd->argintregs[p], REG_SP, p * 8);
+/**
+ * Generates machine code for the method epilog.
+ */
+void codegen_emit_epilog(jitdata* jd)
+{
+ int32_t p;
+ int i;
- for (p = 0; p < FLT_ARG_CNT; p++)
- M_DST(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
+ // Get required compiler data.
+ codegendata* cd = jd->cd;
+ registerdata* rd = jd->rd;
- s1 += INT_ARG_CNT + FLT_ARG_CNT;
- }
+ p = cd->stackframesize;
- /* decide which monitor enter function to call */
+ /* restore saved registers */
- if (m->flags & ACC_STATIC) {
- M_MOV_IMM(m->class, REG_ITMP1);
- M_AST(REG_ITMP1, REG_SP, s1 * 8);
- M_INTMOVE(REG_ITMP1, rd->argintregs[0]);
- M_MOV_IMM(BUILTIN_staticmonitorenter, REG_ITMP1);
- M_CALL(REG_ITMP1);
+ for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
+ p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
+ }
+ for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
+ p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
+ }
- } else {
- M_TEST(rd->argintregs[0]);
- M_BEQ(0);
- codegen_add_nullpointerexception_ref(cd, cd->mcodeptr);
- M_AST(rd->argintregs[0], REG_SP, s1 * 8);
- M_MOV_IMM(BUILTIN_monitorenter, REG_ITMP1);
- M_CALL(REG_ITMP1);
- }
+ /* deallocate stack */
- if (opt_verbosecall) {
- for (p = 0; p < INT_ARG_CNT; p++)
- M_LLD(rd->argintregs[p], REG_SP, p * 8);
+ if (cd->stackframesize)
+ M_AADD_IMM(cd->stackframesize * 8, REG_SP);
- for (p = 0; p < FLT_ARG_CNT; p++)
- M_DLD(rd->argfltregs[p], REG_SP, (INT_ARG_CNT + p) * 8);
+ M_RET;
+}
- M_LADD_IMM((INT_ARG_CNT + FLT_ARG_CNT) * 8, REG_SP);
- }
+/**
+ * Generates a memory barrier to be used after volatile writes. It can be
+ * patched out later if the field turns out not to be volatile.
+ */
+void codegen_emit_patchable_barrier(instruction *iptr, codegendata *cd, patchref_t *pr, fieldinfo *fi)
+{
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ /* Align on word boundary */
+ if ((((intptr_t) cd->mcodeptr) & 3) >= 2)
+ emit_nop(cd, 4 - (((intptr_t) cd->mcodeptr) & 3));
+ /* Displacement for patching out MFENCE */
+ pr->disp_mb = (cd->mcodeptr - cd->mcodebase - pr->mpc);
}
-#endif
+ if (INSTRUCTION_IS_UNRESOLVED(iptr) || fi->flags & ACC_VOLATILE)
+ M_MFENCE;
+}
-#if !defined(NDEBUG)
- /* Copy argument registers to stack and call trace function with
- pointer to arguments on stack. */
+/**
+ * Generates machine code for one ICMD.
+ */
+void codegen_emit_instruction(jitdata* jd, instruction* iptr)
+{
+ varinfo* var;
+ varinfo* dst;
+ builtintable_entry* bte;
+ methodinfo* lm; // Local methodinfo for ICMD_INVOKE*.
+ unresolved_method* um;
+ fieldinfo* fi;
+ unresolved_field* uf;
+ patchref_t* pr;
+ int32_t fieldtype;
+ int32_t s1, s2, s3, d;
+ int32_t disp;
+
+ // Get required compiler data.
+ codegendata* cd = jd->cd;
+
+ switch (iptr->opc) {
+
+ /* constant operations ************************************************/
- if (opt_verbosecall) {
- M_LSUB_IMM((INT_ARG_CNT + FLT_ARG_CNT + INT_TMP_CNT + FLT_TMP_CNT + 1 + 1) * 8, REG_SP);
+ case ICMD_FCONST: /* ... ==> ..., constant */
- /* save integer argument registers */
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ disp = dseg_add_float(cd, iptr->sx.val.f);
+ emit_movdl_membase_reg(cd, RIP, -((cd->mcodeptr + ((d > 7) ? 9 : 8)) - cd->mcodebase) + disp, d);
+ emit_store_dst(jd, iptr, d);
+ break;
+
+ case ICMD_DCONST: /* ... ==> ..., constant */
- for (p = 0; p < INT_ARG_CNT; p++)
- M_LST(rd->argintregs[p], REG_SP, (1 + p) * 8);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ disp = dseg_add_double(cd, iptr->sx.val.d);
+ emit_movd_membase_reg(cd, RIP, -((cd->mcodeptr + 9) - cd->mcodebase) + disp, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- /* save float argument registers */
+ case ICMD_ACONST: /* ... ==> ..., constant */
- for (p = 0; p < FLT_ARG_CNT; p++)
- M_DST(rd->argfltregs[p], REG_SP, (1 + INT_ARG_CNT + p) * 8);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
- /* save temporary registers for leaf methods */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ constant_classref *cr = iptr->sx.val.c.ref;
+ disp = dseg_add_unique_address(cd, cr);
- if (m->isleafmethod) {
- for (p = 0; p < INT_TMP_CNT; p++)
- M_LST(rd->tmpintregs[p], REG_SP, (1 + INT_ARG_CNT + FLT_ARG_CNT + p) * 8);
+/* PROFILE_CYCLE_STOP; */
- for (p = 0; p < FLT_TMP_CNT; p++)
- M_DST(rd->tmpfltregs[p], REG_SP, (1 + INT_ARG_CNT + FLT_ARG_CNT + INT_TMP_CNT + p) * 8);
- }
+ patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
+ cr, disp);
- /* show integer hex code for float arguments */
+/* PROFILE_CYCLE_START; */
- for (p = 0, l = 0; p < md->paramcount && p < INT_ARG_CNT; p++) {
- /* If the paramtype is a float, we have to right shift all
- following integer registers. */
-
- if (IS_FLT_DBL_TYPE(md->paramtypes[p].type)) {
- for (s1 = INT_ARG_CNT - 2; s1 >= p; s1--) {
- M_MOV(rd->argintregs[s1], rd->argintregs[s1 + 1]);
+ M_ALD(d, RIP, disp);
+ }
+ else {
+ if (iptr->sx.val.anyptr == 0) {
+ M_CLR(d);
+ }
+ else {
+ disp = dseg_add_address(cd, iptr->sx.val.anyptr);
+ M_ALD(d, RIP, disp);
}
-
- x86_64_movd_freg_reg(cd, rd->argfltregs[l], rd->argintregs[p]);
- l++;
}
- }
-
- M_MOV_IMM(m, REG_ITMP2);
- M_AST(REG_ITMP2, REG_SP, 0 * 8);
- M_MOV_IMM(builtin_trace_args, REG_ITMP1);
- M_CALL(REG_ITMP1);
-
- /* restore integer argument registers */
+ emit_store_dst(jd, iptr, d);
+ break;
- for (p = 0; p < INT_ARG_CNT; p++)
- M_LLD(rd->argintregs[p], REG_SP, (1 + p) * 8);
- /* restore float argument registers */
+ /* integer operations *************************************************/
- for (p = 0; p < FLT_ARG_CNT; p++)
- M_DLD(rd->argfltregs[p], REG_SP, (1 + INT_ARG_CNT + p) * 8);
+ case ICMD_INEG: /* ..., value ==> ..., - value */
- /* restore temporary registers for leaf methods */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ M_INEG(d);
+ emit_store_dst(jd, iptr, d);
+ break;
- if (m->isleafmethod) {
- for (p = 0; p < INT_TMP_CNT; p++)
- M_LLD(rd->tmpintregs[p], REG_SP, (1 + INT_ARG_CNT + FLT_ARG_CNT + p) * 8);
+ case ICMD_LNEG: /* ..., value ==> ..., - value */
- for (p = 0; p < FLT_TMP_CNT; p++)
- M_DLD(rd->tmpfltregs[p], REG_SP, (1 + INT_ARG_CNT + FLT_ARG_CNT + INT_TMP_CNT + p) * 8);
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ M_LNEG(d);
+ emit_store_dst(jd, iptr, d);
+ break;
- M_LADD_IMM((INT_ARG_CNT + FLT_ARG_CNT + INT_TMP_CNT + FLT_TMP_CNT + 1 + 1) * 8, REG_SP);
- }
-#endif /* !defined(NDEBUG) */
+ case ICMD_I2L: /* ..., value ==> ..., value */
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_ISEXT(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- /* end of header generation */
+ case ICMD_L2I: /* ..., value ==> ..., value */
- replacementpoint = cd->code->rplpoints;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_IMOV(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- /* walk through all basic blocks */
+ case ICMD_INT2BYTE: /* ..., value ==> ..., value */
- for (bptr = m->basicblocks; bptr != NULL; bptr = bptr->next) {
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_BSEXT(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- bptr->mpc = (u4) ((u1 *) cd->mcodeptr - cd->mcodebase);
+ case ICMD_INT2CHAR: /* ..., value ==> ..., value */
- if (bptr->flags >= BBREACHED) {
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_CZEXT(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- /* branch resolving */
+ case ICMD_INT2SHORT: /* ..., value ==> ..., value */
- branchref *bref;
- for (bref = bptr->branchrefs; bref != NULL; bref = bref->next) {
- gen_resolvebranch((u1 *) cd->mcodebase + bref->branchpos,
- bref->branchpos,
- bptr->mpc);
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_SSEXT(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- /* handle replacement points */
- if (bptr->bitflags & BBFLAG_REPLACEMENT) {
- replacementpoint->pc = (u1*)(ptrint)bptr->mpc; /* will be resolved later */
-
- replacementpoint++;
+ case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
- assert(cd->lastmcodeptr <= cd->mcodeptr);
- cd->lastmcodeptr = cd->mcodeptr + 5; /* 5 byte jmp patch */
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_IADD(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_IADD(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- /* copy interface registers to their destination */
+ case ICMD_IINC:
+ case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
+ /* sx.val.i = constant */
- src = bptr->instack;
- len = bptr->indepth;
- MCODECHECK(512);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
- /* generate basicblock profiling code */
+ /* Using inc and dec is not faster than add (tested with
+ sieve). */
- if (opt_prof_bb) {
- /* count frequency */
+ M_INTMOVE(s1, d);
+ M_IADD_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- M_MOV_IMM(m->bbfrequency, REG_ITMP2);
- M_IINC_MEMBASE(REG_ITMP2, bptr->debug_nr * 4);
+ case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
- /* if this is an exception handler, start profiling again */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_LADD(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_LADD(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- if (bptr->type == BBTYPE_EXH)
- PROFILE_CYCLE_START;
- }
+ case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
+ /* sx.val.l = constant */
-#if defined(ENABLE_LSRA)
- if (opt_lsra) {
- while (src != NULL) {
- len--;
- if ((len == 0) && (bptr->type != BBTYPE_STD)) {
- if (bptr->type == BBTYPE_SBR) {
- /* d = reg_of_var(rd, src, REG_ITMP1); */
- if (!(src->flags & INMEMORY))
- d= src->regoff;
- else
- d=REG_ITMP1;
- x86_64_pop_reg(cd, d);
- store_reg_to_var_int(src, d);
-
- } else if (bptr->type == BBTYPE_EXH) {
- /* d = reg_of_var(rd, src, REG_ITMP1); */
- if (!(src->flags & INMEMORY))
- d= src->regoff;
- else
- d=REG_ITMP1;
- M_INTMOVE(REG_ITMP1, d);
- store_reg_to_var_int(src, d);
- }
- }
- src = src->prev;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ if (IS_IMM32(iptr->sx.val.l))
+ M_LADD_IMM(iptr->sx.val.l, d);
+ else {
+ M_MOV_IMM(iptr->sx.val.l, REG_ITMP2);
+ M_LADD(REG_ITMP2, d);
}
-
- } else {
-#endif
+ emit_store_dst(jd, iptr, d);
+ break;
- while (src != NULL) {
- len--;
- if ((len == 0) && (bptr->type != BBTYPE_STD)) {
- if (bptr->type == BBTYPE_SBR) {
- d = reg_of_var(rd, src, REG_ITMP1);
- M_POP(d);
- store_reg_to_var_int(src, d);
-
- } else if (bptr->type == BBTYPE_EXH) {
- d = reg_of_var(rd, src, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
- store_reg_to_var_int(src, d);
- }
+ case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d) {
+ M_INTMOVE(s1, REG_ITMP1);
+ M_ISUB(s2, REG_ITMP1);
+ M_INTMOVE(REG_ITMP1, d);
} else {
- d = reg_of_var(rd, src, REG_ITMP1);
- if ((src->varkind != STACKVAR)) {
- s2 = src->type;
- if (IS_FLT_DBL_TYPE(s2)) {
- s1 = rd->interfaces[len][s2].regoff;
-
- if (!(rd->interfaces[len][s2].flags & INMEMORY))
- M_FLTMOVE(s1, d);
- else
- M_DLD(d, REG_SP, s1 * 8);
-
- store_reg_to_var_flt(src, d);
-
- } else {
- s1 = rd->interfaces[len][s2].regoff;
-
- if (!(rd->interfaces[len][s2].flags & INMEMORY))
- M_INTMOVE(s1, d);
- else
- M_LLD(d, REG_SP, s1 * 8);
-
- store_reg_to_var_int(src, d);
- }
- }
- }
- src = src->prev;
- }
-#if defined(ENABLE_LSRA)
- }
-#endif
- /* walk through all instructions */
-
- src = bptr->instack;
- len = bptr->icount;
- currentline = 0;
-
- for (iptr = bptr->iinstr; len > 0; src = iptr->dst, len--, iptr++) {
- if (iptr->line != currentline) {
- dseg_addlinenumber(cd, iptr->line, cd->mcodeptr);
- currentline = iptr->line;
+ M_INTMOVE(s1, d);
+ M_ISUB(s2, d);
}
+ emit_store_dst(jd, iptr, d);
+ break;
- MCODECHECK(1024); /* 1KB should be enough */
+ case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
+ /* sx.val.i = constant */
- switch (iptr->opc) {
- case ICMD_INLINE_START: /* internal ICMDs */
- case ICMD_INLINE_END:
- break;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ M_ISUB_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- case ICMD_NOP: /* ... ==> ... */
- break;
+ case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- case ICMD_CHECKNULL: /* ..., objectref ==> ..., objectref */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d) {
+ M_INTMOVE(s1, REG_ITMP1);
+ M_LSUB(s2, REG_ITMP1);
+ M_INTMOVE(REG_ITMP1, d);
+ } else {
+ M_INTMOVE(s1, d);
+ M_LSUB(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- if (src->flags & INMEMORY)
- M_CMP_IMM_MEMBASE(0, REG_SP, src->regoff * 8);
- else
- M_TEST(src->regoff);
- M_BEQ(0);
- codegen_add_nullpointerexception_ref(cd, cd->mcodeptr);
- break;
+ case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
+ /* sx.val.l = constant */
- /* constant operations ************************************************/
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ if (IS_IMM32(iptr->sx.val.l))
+ M_LSUB_IMM(iptr->sx.val.l, d);
+ else {
+ M_MOV_IMM(iptr->sx.val.l, REG_ITMP2);
+ M_LSUB(REG_ITMP2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- case ICMD_ICONST: /* ... ==> ..., constant */
- /* op1 = 0, val.i = constant */
+ case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- if (iptr->val.i == 0)
- M_CLR(d);
- else
- M_IMOV_IMM(iptr->val.i, d);
- store_reg_to_var_int(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_IMUL(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_IMUL(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LCONST: /* ... ==> ..., constant */
- /* op1 = 0, val.l = constant */
+ case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */
+ /* sx.val.i = constant */
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- if (iptr->val.l == 0)
- M_CLR(d);
- else
- M_MOV_IMM(iptr->val.l, d);
- store_reg_to_var_int(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ if (iptr->sx.val.i == 2) {
+ M_INTMOVE(s1, d);
+ M_ISLL_IMM(1, d);
+ } else
+ M_IMUL_IMM(s1, iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_FCONST: /* ... ==> ..., constant */
- /* op1 = 0, val.f = constant */
+ case ICMD_LMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- disp = dseg_addfloat(cd, iptr->val.f);
- x86_64_movdl_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + ((d > 7) ? 9 : 8)) - (s8) cd->mcodebase) + disp, d);
- store_reg_to_var_flt(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_LMUL(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_LMUL(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
break;
-
- case ICMD_DCONST: /* ... ==> ..., constant */
- /* op1 = 0, val.d = constant */
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- disp = dseg_adddouble(cd, iptr->val.d);
- x86_64_movd_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ case ICMD_LMULCONST: /* ..., value ==> ..., value * constant */
+ /* sx.val.l = constant */
- case ICMD_ACONST: /* ... ==> ..., constant */
- /* op1 = 0, val.a = constant */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ if (IS_IMM32(iptr->sx.val.l))
+ M_LMUL_IMM(s1, iptr->sx.val.l, d);
+ else {
+ M_MOV_IMM(iptr->sx.val.l, REG_ITMP2);
+ M_INTMOVE(s1, d);
+ M_LMUL(REG_ITMP2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
+ case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- if ((iptr->target != NULL) && (iptr->val.a == NULL)) {
-/* PROFILE_CYCLE_STOP; */
+ s1 = emit_load_s1(jd, iptr, RAX);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP3);
+ d = codegen_reg_of_dst(jd, iptr, RAX);
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_aconst,
- (unresolved_class *) iptr->target, 0);
+ M_INTMOVE(s1, RAX);
+ M_INTMOVE(s2, REG_ITMP3);
+ emit_arithmetic_check(cd, iptr, REG_ITMP3);
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
+ M_MOV(RDX, REG_ITMP2); /* save RDX (it's an argument register) */
-/* PROFILE_CYCLE_START; */
+ M_ICMP_IMM(0x80000000, RAX); /* check as described in jvm spec */
+ M_BNE(4 + 6);
+ M_ICMP_IMM(-1, REG_ITMP3); /* 4 bytes */
+ M_BEQ(1 + 3); /* 6 bytes */
- M_MOV_IMM(iptr->val.a, d);
+ emit_cltd(cd); /* 1 byte */
+ emit_idivl_reg(cd, REG_ITMP3); /* 3 bytes */
- } else {
- if (iptr->val.a == 0)
- M_CLR(d);
- else
- M_MOV_IMM(iptr->val.a, d);
- }
- store_reg_to_var_int(iptr->dst, d);
+ M_INTMOVE(RAX, d);
+ emit_store_dst(jd, iptr, d);
+ dst = VAROP(iptr->dst);
+ if (IS_INMEMORY(dst->flags) || (dst->vv.regoff != RDX))
+ M_MOV(REG_ITMP2, RDX); /* restore RDX */
break;
+ case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
- /* load/store operations **********************************************/
+ s1 = emit_load_s1(jd, iptr, RAX);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP3);
+ d = codegen_reg_of_dst(jd, iptr, RDX);
- case ICMD_ILOAD: /* ... ==> ..., content of local variable */
- /* op1 = local variable */
+ M_INTMOVE(s1, RAX);
+ M_INTMOVE(s2, REG_ITMP3);
+ emit_arithmetic_check(cd, iptr, REG_ITMP3);
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- if ((iptr->dst->varkind == LOCALVAR) &&
- (iptr->dst->varnum == iptr->op1)) {
- break;
- }
- var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
- if (var->flags & INMEMORY) {
- x86_64_movl_membase_reg(cd, REG_SP, var->regoff * 8, d);
- store_reg_to_var_int(iptr->dst, d);
+ M_MOV(RDX, REG_ITMP2); /* save RDX (it's an argument register) */
- } else {
- if (iptr->dst->flags & INMEMORY) {
- x86_64_mov_reg_membase(cd, var->regoff, REG_SP, iptr->dst->regoff * 8);
+ M_ICMP_IMM(0x80000000, RAX); /* check as described in jvm spec */
+ M_BNE(3 + 4 + 6);
+ M_CLR(RDX); /* 3 bytes */
+ M_ICMP_IMM(-1, REG_ITMP3); /* 4 bytes */
+ M_BEQ(1 + 3); /* 6 bytes */
- } else {
- M_INTMOVE(var->regoff, d);
- }
- }
+ emit_cltd(cd); /* 1 byte */
+ emit_idivl_reg(cd, REG_ITMP3); /* 3 byte */
+
+ M_INTMOVE(RDX, d);
+ emit_store_dst(jd, iptr, d);
+ dst = VAROP(iptr->dst);
+ if (IS_INMEMORY(dst->flags) || (dst->vv.regoff != RDX))
+ M_MOV(REG_ITMP2, RDX); /* restore RDX */
break;
- case ICMD_LLOAD: /* ... ==> ..., content of local variable */
- case ICMD_ALOAD: /* op1 = local variable */
+ case ICMD_IDIVPOW2: /* ..., value ==> ..., value >> constant */
+ /* sx.val.i = constant */
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- if ((iptr->dst->varkind == LOCALVAR) &&
- (iptr->dst->varnum == iptr->op1)) {
- break;
- }
- var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
- if (var->flags & INMEMORY) {
- x86_64_mov_membase_reg(cd, REG_SP, var->regoff * 8, d);
- store_reg_to_var_int(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_INTMOVE(s1, REG_ITMP1);
+ emit_alul_imm_reg(cd, ALU_CMP, -1, REG_ITMP1);
+ emit_leal_membase_reg(cd, REG_ITMP1, (1 << iptr->sx.val.i) - 1, REG_ITMP2);
+ emit_cmovccl_reg_reg(cd, CC_LE, REG_ITMP2, REG_ITMP1);
+ emit_shiftl_imm_reg(cd, SHIFT_SAR, iptr->sx.val.i, REG_ITMP1);
+ emit_mov_reg_reg(cd, REG_ITMP1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if (iptr->dst->flags & INMEMORY) {
- x86_64_mov_reg_membase(cd, var->regoff, REG_SP, iptr->dst->regoff * 8);
+ case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
+ /* sx.val.i = constant */
- } else {
- M_INTMOVE(var->regoff, d);
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_INTMOVE(s1, REG_ITMP1);
+ emit_alul_imm_reg(cd, ALU_CMP, -1, REG_ITMP1);
+ emit_leal_membase_reg(cd, REG_ITMP1, iptr->sx.val.i, REG_ITMP2);
+ emit_cmovccl_reg_reg(cd, CC_G, REG_ITMP1, REG_ITMP2);
+ emit_alul_imm_reg(cd, ALU_AND, -1 - (iptr->sx.val.i), REG_ITMP2);
+ emit_alul_reg_reg(cd, ALU_SUB, REG_ITMP2, REG_ITMP1);
+ emit_mov_reg_reg(cd, REG_ITMP1, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_FLOAD: /* ... ==> ..., content of local variable */
- case ICMD_DLOAD: /* op1 = local variable */
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- if ((iptr->dst->varkind == LOCALVAR) &&
- (iptr->dst->varnum == iptr->op1)) {
- break;
- }
- var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ILOAD]);
- if (var->flags & INMEMORY) {
- x86_64_movq_membase_reg(cd, REG_SP, var->regoff * 8, d);
- store_reg_to_var_flt(iptr->dst, d);
+ case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- } else {
- if (iptr->dst->flags & INMEMORY) {
- x86_64_movq_reg_membase(cd, var->regoff, REG_SP, iptr->dst->regoff * 8);
+ s1 = emit_load_s1(jd, iptr, RAX);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP3);
+ d = codegen_reg_of_dst(jd, iptr, RAX);
- } else {
- M_FLTMOVE(var->regoff, d);
- }
- }
- break;
+ M_INTMOVE(s1, RAX);
+ M_INTMOVE(s2, REG_ITMP3);
+ emit_arithmetic_check(cd, iptr, REG_ITMP3);
- case ICMD_ISTORE: /* ..., value ==> ... */
- case ICMD_LSTORE: /* op1 = local variable */
- case ICMD_ASTORE:
+ M_MOV(RDX, REG_ITMP2); /* save RDX (it's an argument register) */
- if ((src->varkind == LOCALVAR) &&
- (src->varnum == iptr->op1)) {
- break;
- }
- var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
- if (var->flags & INMEMORY) {
- var_to_reg_int(s1, src, REG_ITMP1);
- x86_64_mov_reg_membase(cd, s1, REG_SP, var->regoff * 8);
+ /* check as described in jvm spec */
+ disp = dseg_add_s8(cd, 0x8000000000000000LL);
+ M_LCMP_MEMBASE(RIP, -((cd->mcodeptr + 7) - cd->mcodebase) + disp, RAX);
+ M_BNE(4 + 6);
+ M_LCMP_IMM(-1, REG_ITMP3); /* 4 bytes */
+ M_BEQ(2 + 3); /* 6 bytes */
- } else {
- var_to_reg_int(s1, src, var->regoff);
- M_INTMOVE(s1, var->regoff);
- }
+ emit_cqto(cd); /* 2 bytes */
+ emit_idiv_reg(cd, REG_ITMP3); /* 3 bytes */
+
+ M_INTMOVE(RAX, d);
+ emit_store_dst(jd, iptr, d);
+ dst = VAROP(iptr->dst);
+ if (IS_INMEMORY(dst->flags) || (dst->vv.regoff != RDX))
+ M_MOV(REG_ITMP2, RDX); /* restore RDX */
break;
- case ICMD_FSTORE: /* ..., value ==> ... */
- case ICMD_DSTORE: /* op1 = local variable */
+ case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
- if ((src->varkind == LOCALVAR) &&
- (src->varnum == iptr->op1)) {
- break;
- }
- var = &(rd->locals[iptr->op1][iptr->opc - ICMD_ISTORE]);
- if (var->flags & INMEMORY) {
- var_to_reg_flt(s1, src, REG_FTMP1);
- x86_64_movq_reg_membase(cd, s1, REG_SP, var->regoff * 8);
+ s1 = emit_load_s1(jd, iptr, RAX);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP3);
+ d = codegen_reg_of_dst(jd, iptr, RDX);
- } else {
- var_to_reg_flt(s1, src, var->regoff);
- M_FLTMOVE(s1, var->regoff);
- }
- break;
+ M_INTMOVE(s1, RAX);
+ M_INTMOVE(s2, REG_ITMP3);
+ emit_arithmetic_check(cd, iptr, REG_ITMP3);
+ M_MOV(RDX, REG_ITMP2); /* save RDX (it's an argument register) */
- /* pop/dup/swap operations ********************************************/
+ /* check as described in jvm spec */
+ disp = dseg_add_s8(cd, 0x8000000000000000LL);
+ M_LCMP_MEMBASE(RIP, -((cd->mcodeptr + 7) - cd->mcodebase) + disp, REG_ITMP1);
+ M_BNE(3 + 4 + 6);
+ M_LXOR(RDX, RDX); /* 3 bytes */
+ M_LCMP_IMM(-1, REG_ITMP3); /* 4 bytes */
+ M_BEQ(2 + 3); /* 6 bytes */
- /* attention: double and longs are only one entry in CACAO ICMDs */
+ emit_cqto(cd); /* 2 bytes */
+ emit_idiv_reg(cd, REG_ITMP3); /* 3 bytes */
- case ICMD_POP: /* ..., value ==> ... */
- case ICMD_POP2: /* ..., value, value ==> ... */
+ M_INTMOVE(RDX, d);
+ emit_store_dst(jd, iptr, d);
+ dst = VAROP(iptr->dst);
+ if (IS_INMEMORY(dst->flags) || (dst->vv.regoff != RDX))
+ M_MOV(REG_ITMP2, RDX); /* restore RDX */
break;
- case ICMD_DUP: /* ..., a ==> ..., a, a */
- M_COPY(src, iptr->dst);
+ case ICMD_LDIVPOW2: /* ..., value ==> ..., value >> constant */
+ /* sx.val.i = constant */
+
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_INTMOVE(s1, REG_ITMP1);
+ emit_alu_imm_reg(cd, ALU_CMP, -1, REG_ITMP1);
+ emit_lea_membase_reg(cd, REG_ITMP1, (1 << iptr->sx.val.i) - 1, REG_ITMP2);
+ emit_cmovcc_reg_reg(cd, CC_LE, REG_ITMP2, REG_ITMP1);
+ emit_shift_imm_reg(cd, SHIFT_SAR, iptr->sx.val.i, REG_ITMP1);
+ emit_mov_reg_reg(cd, REG_ITMP1, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_DUP_X1: /* ..., a, b ==> ..., b, a, b */
+ case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */
+ /* sx.val.l = constant */
- M_COPY(src, iptr->dst);
- M_COPY(src->prev, iptr->dst->prev);
- M_COPY(iptr->dst, iptr->dst->prev->prev);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_INTMOVE(s1, REG_ITMP1);
+ emit_alu_imm_reg(cd, ALU_CMP, -1, REG_ITMP1);
+ emit_lea_membase_reg(cd, REG_ITMP1, iptr->sx.val.i, REG_ITMP2);
+ emit_cmovcc_reg_reg(cd, CC_G, REG_ITMP1, REG_ITMP2);
+ emit_alu_imm_reg(cd, ALU_AND, -1 - (iptr->sx.val.i), REG_ITMP2);
+ emit_alu_reg_reg(cd, ALU_SUB, REG_ITMP2, REG_ITMP1);
+ emit_mov_reg_reg(cd, REG_ITMP1, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_DUP_X2: /* ..., a, b, c ==> ..., c, a, b, c */
+ case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
- M_COPY(src, iptr->dst);
- M_COPY(src->prev, iptr->dst->prev);
- M_COPY(src->prev->prev, iptr->dst->prev->prev);
- M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
+ d = codegen_reg_of_dst(jd, iptr, REG_NULL);
+ emit_ishift(jd, SHIFT_SHL, iptr);
break;
- case ICMD_DUP2: /* ..., a, b ==> ..., a, b, a, b */
+ case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
+ /* sx.val.i = constant */
- M_COPY(src, iptr->dst);
- M_COPY(src->prev, iptr->dst->prev);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ M_ISLL_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_DUP2_X1: /* ..., a, b, c ==> ..., b, c, a, b, c */
+ case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
- M_COPY(src, iptr->dst);
- M_COPY(src->prev, iptr->dst->prev);
- M_COPY(src->prev->prev, iptr->dst->prev->prev);
- M_COPY(iptr->dst, iptr->dst->prev->prev->prev);
- M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev);
+ d = codegen_reg_of_dst(jd, iptr, REG_NULL);
+ emit_ishift(jd, SHIFT_SAR, iptr);
break;
- case ICMD_DUP2_X2: /* ..., a, b, c, d ==> ..., c, d, a, b, c, d */
+ case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
+ /* sx.val.i = constant */
- M_COPY(src, iptr->dst);
- M_COPY(src->prev, iptr->dst->prev);
- M_COPY(src->prev->prev, iptr->dst->prev->prev);
- M_COPY(src->prev->prev->prev, iptr->dst->prev->prev->prev);
- M_COPY(iptr->dst, iptr->dst->prev->prev->prev->prev);
- M_COPY(iptr->dst->prev, iptr->dst->prev->prev->prev->prev->prev);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ M_INTMOVE(s1, d);
+ M_ISRA_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_SWAP: /* ..., a, b ==> ..., b, a */
+ case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
- M_COPY(src, iptr->dst->prev);
- M_COPY(src->prev, iptr->dst);
+ d = codegen_reg_of_dst(jd, iptr, REG_NULL);
+ emit_ishift(jd, SHIFT_SHR, iptr);
break;
+ case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
+ /* sx.val.i = constant */
- /* integer operations *************************************************/
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ M_INTMOVE(s1, d);
+ M_ISRL_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- case ICMD_INEG: /* ..., value ==> ..., - value */
+ case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- x86_64_negl_membase(cd, REG_SP, iptr->dst->regoff * 8);
+ d = codegen_reg_of_dst(jd, iptr, REG_NULL);
+ emit_lshift(jd, SHIFT_SHL, iptr);
+ break;
- } else {
- x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_negl_reg(cd, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */
+ /* sx.val.i = constant */
- } else {
- x86_64_movl_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8);
- x86_64_negl_membase(cd, REG_SP, iptr->dst->regoff * 8);
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ M_LSLL_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if (src->flags & INMEMORY) {
- x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
- x86_64_negl_reg(cd, d);
+ case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- x86_64_negl_reg(cd, iptr->dst->regoff);
- }
- }
+ d = codegen_reg_of_dst(jd, iptr, REG_NULL);
+ emit_lshift(jd, SHIFT_SAR, iptr);
break;
- case ICMD_LNEG: /* ..., value ==> ..., - value */
+ case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */
+ /* sx.val.i = constant */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (src->regoff == iptr->dst->regoff) {
- x86_64_neg_membase(cd, REG_SP, iptr->dst->regoff * 8);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ M_INTMOVE(s1, d);
+ M_LSRA_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- x86_64_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_neg_reg(cd, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
- } else {
- x86_64_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8);
- x86_64_neg_membase(cd, REG_SP, iptr->dst->regoff * 8);
- }
+ d = codegen_reg_of_dst(jd, iptr, REG_NULL);
+ emit_lshift(jd, SHIFT_SHR, iptr);
+ break;
- } else {
- if (src->flags & INMEMORY) {
- x86_64_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
- x86_64_neg_reg(cd, iptr->dst->regoff);
+ case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */
+ /* sx.val.l = constant */
- } else {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- x86_64_neg_reg(cd, iptr->dst->regoff);
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ M_INTMOVE(s1, d);
+ M_LSRL_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_I2L: /* ..., value ==> ..., value */
-
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (src->flags & INMEMORY) {
- x86_64_movslq_membase_reg(cd, REG_SP, src->regoff * 8, d);
+ case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
- } else {
- x86_64_movslq_reg_reg(cd, src->regoff, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_IAND(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_IAND(s2, d);
}
- store_reg_to_var_int(iptr->dst, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_L2I: /* ..., value ==> ..., value */
+ case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */
+ /* sx.val.i = constant */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
M_INTMOVE(s1, d);
- store_reg_to_var_int(iptr->dst, d);
+ M_IAND_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_INT2BYTE: /* ..., value ==> ..., value */
-
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (src->flags & INMEMORY) {
- x86_64_movsbq_membase_reg(cd, REG_SP, src->regoff * 8, d);
+ case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
- } else {
- x86_64_movsbq_reg_reg(cd, src->regoff, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_LAND(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_LAND(s2, d);
}
- store_reg_to_var_int(iptr->dst, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_INT2CHAR: /* ..., value ==> ..., value */
+ case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
+ /* sx.val.l = constant */
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (src->flags & INMEMORY) {
- x86_64_movzwq_membase_reg(cd, REG_SP, src->regoff * 8, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ if (IS_IMM32(iptr->sx.val.l))
+ M_LAND_IMM(iptr->sx.val.l, d);
+ else {
+ M_MOV_IMM(iptr->sx.val.l, REG_ITMP2);
+ M_LAND(REG_ITMP2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- x86_64_movzwq_reg_reg(cd, src->regoff, d);
+ case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
+
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_IOR(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_IOR(s2, d);
}
- store_reg_to_var_int(iptr->dst, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_INT2SHORT: /* ..., value ==> ..., value */
+ case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
+ /* sx.val.i = constant */
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (src->flags & INMEMORY) {
- x86_64_movswq_membase_reg(cd, REG_SP, src->regoff * 8, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ M_IOR_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- x86_64_movswq_reg_reg(cd, src->regoff, d);
+ case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
+
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_LOR(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_LOR(s2, d);
}
- store_reg_to_var_int(iptr->dst, d);
+ emit_store_dst(jd, iptr, d);
break;
+ case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
+ /* sx.val.l = constant */
- case ICMD_IADD: /* ..., val1, val2 ==> ..., val1 + val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialu(cd, X86_64_ADD, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ if (IS_IMM32(iptr->sx.val.l))
+ M_LOR_IMM(iptr->sx.val.l, d);
+ else {
+ M_MOV_IMM(iptr->sx.val.l, REG_ITMP2);
+ M_LOR(REG_ITMP2, d);
+ }
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_IADDCONST: /* ..., value ==> ..., value + constant */
- /* val.i = constant */
+ case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialuconst(cd, X86_64_ADD, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_IXOR(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_IXOR(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LADD: /* ..., val1, val2 ==> ..., val1 + val2 */
+ case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
+ /* sx.val.i = constant */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lalu(cd, X86_64_ADD, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ M_IXOR_IMM(iptr->sx.val.i, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LADDCONST: /* ..., value ==> ..., value + constant */
- /* val.l = constant */
+ case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_laluconst(cd, X86_64_ADD, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ if (s2 == d)
+ M_LXOR(s1, d);
+ else {
+ M_INTMOVE(s1, d);
+ M_LXOR(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_ISUB: /* ..., val1, val2 ==> ..., val1 - val2 */
+ case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
+ /* sx.val.l = constant */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_alul_reg_membase(cd, X86_64_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, d);
+ if (IS_IMM32(iptr->sx.val.l))
+ M_LXOR_IMM(iptr->sx.val.l, d);
+ else {
+ M_MOV_IMM(iptr->sx.val.l, REG_ITMP2);
+ M_LXOR(REG_ITMP2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_alul_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
+ /* floating operations ************************************************/
- } else {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_FNEG: /* ..., value ==> ..., - value */
- } else {
- x86_64_movl_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- x86_64_alul_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ disp = dseg_add_s4(cd, 0x80000000);
+ emit_fmove(cd, s1, d);
+ emit_movss_membase_reg(cd, RIP, -((cd->mcodeptr + 9) - cd->mcodebase) + disp, REG_FTMP2);
+ emit_xorps_reg_reg(cd, REG_FTMP2, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alul_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
-
- } else {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
+ case ICMD_DNEG: /* ..., value ==> ..., - value */
- } else {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ disp = dseg_add_s8(cd, 0x8000000000000000);
+ emit_fmove(cd, s1, d);
+ emit_movd_membase_reg(cd, RIP, -((cd->mcodeptr + 9) - cd->mcodebase) + disp, REG_FTMP2);
+ emit_xorpd_reg_reg(cd, REG_FTMP2, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alul_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
- }
+ case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
+
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d)
+ M_FADD(s1, d);
+ else {
+ emit_fmove(cd, s1, d);
+ M_FADD(s2, d);
}
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_ISUBCONST: /* ..., value ==> ..., value + constant */
- /* val.i = constant */
+ case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialuconst(cd, X86_64_SUB, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d)
+ M_DADD(s1, d);
+ else {
+ emit_fmove(cd, s1, d);
+ M_DADD(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_alu_reg_membase(cd, X86_64_SUB, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d) {
+ emit_fmove(cd, s2, REG_FTMP2);
+ s2 = REG_FTMP2;
+ }
+ emit_fmove(cd, s1, d);
+ M_FSUB(s2, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- if (src->prev->regoff == iptr->dst->regoff) {
- x86_64_alu_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
+ case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- } else {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d) {
+ emit_fmove(cd, s2, REG_FTMP2);
+ s2 = REG_FTMP2;
+ }
+ emit_fmove(cd, s1, d);
+ M_DSUB(s2, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- x86_64_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
- x86_64_alu_reg_membase(cd, X86_64_SUB, src->regoff, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alu_membase_reg(cd, X86_64_SUB, REG_SP, src->regoff * 8, d);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
-
- } else {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, d);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d)
+ M_FMUL(s1, d);
+ else {
+ emit_fmove(cd, s1, d);
+ M_FMUL(s2, d);
+ }
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- /* workaround for reg alloc */
- if (src->regoff == iptr->dst->regoff) {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, REG_ITMP1);
- M_INTMOVE(REG_ITMP1, d);
+ case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
- } else {
- M_INTMOVE(src->prev->regoff, d);
- x86_64_alu_reg_reg(cd, X86_64_SUB, src->regoff, d);
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d)
+ M_DMUL(s1, d);
+ else {
+ emit_fmove(cd, s1, d);
+ M_DMUL(s2, d);
}
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LSUBCONST: /* ..., value ==> ..., value - constant */
- /* val.l = constant */
+ case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_laluconst(cd, X86_64_SUB, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d) {
+ emit_fmove(cd, s2, REG_FTMP2);
+ s2 = REG_FTMP2;
+ }
+ emit_fmove(cd, s1, d);
+ M_FDIV(s2, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_IMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_imull_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_imull_reg_reg(cd, src->prev->regoff, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_imull_reg_reg(cd, src->regoff, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- x86_64_imull_reg_reg(cd, src->regoff, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- x86_64_imull_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ if (s2 == d) {
+ emit_fmove(cd, s2, REG_FTMP2);
+ s2 = REG_FTMP2;
+ }
+ emit_fmove(cd, s1, d);
+ M_DDIV(s2, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- x86_64_imull_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ case ICMD_I2F: /* ..., value ==> ..., (float) value */
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- x86_64_imull_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ M_CVTIF(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if (src->regoff == iptr->dst->regoff) {
- x86_64_imull_reg_reg(cd, src->prev->regoff, iptr->dst->regoff);
+ case ICMD_I2D: /* ..., value ==> ..., (double) value */
- } else {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- x86_64_imull_reg_reg(cd, src->regoff, iptr->dst->regoff);
- }
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ M_CVTID(s1, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_IMULCONST: /* ..., value ==> ..., value * constant */
- /* val.i = constant */
+ case ICMD_L2F: /* ..., value ==> ..., (float) value */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- x86_64_imull_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ M_CVTLF(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
+
+ case ICMD_L2D: /* ..., value ==> ..., (double) value */
- } else {
- x86_64_imull_imm_reg_reg(cd, iptr->val.i, src->regoff, REG_ITMP1);
- x86_64_movl_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ M_CVTLD(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
+
+ case ICMD_F2I: /* ..., value ==> ..., (int) value */
- } else {
- if (src->flags & INMEMORY) {
- x86_64_imull_imm_membase_reg(cd, iptr->val.i, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_CVTFI(s1, d);
+ M_ICMP_IMM(0x80000000, d); /* corner cases */
+ disp = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 +
+ ((REG_RESULT == d) ? 0 : 3);
+ M_BNE(disp);
+ emit_fmove(cd, s1, REG_FTMP1);
+ M_MOV_IMM(asm_builtin_f2i, REG_ITMP2);
+ M_CALL(REG_ITMP2);
+ M_INTMOVE(REG_RESULT, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if (iptr->val.i == 2) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- x86_64_alul_reg_reg(cd, X86_64_ADD, iptr->dst->regoff, iptr->dst->regoff);
+ case ICMD_D2I: /* ..., value ==> ..., (int) value */
- } else {
- x86_64_imull_imm_reg_reg(cd, iptr->val.i, src->regoff, iptr->dst->regoff); /* 3 cycles */
- }
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_CVTDI(s1, d);
+ M_ICMP_IMM(0x80000000, d); /* corner cases */
+ disp = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 +
+ ((REG_RESULT == d) ? 0 : 3);
+ M_BNE(disp);
+ emit_fmove(cd, s1, REG_FTMP1);
+ M_MOV_IMM(asm_builtin_d2i, REG_ITMP2);
+ M_CALL(REG_ITMP2);
+ M_INTMOVE(REG_RESULT, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
+ case ICMD_F2L: /* ..., value ==> ..., (long) value */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- x86_64_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- x86_64_imul_reg_reg(cd, src->prev->regoff, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
- x86_64_imul_reg_reg(cd, src->regoff, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- x86_64_mov_reg_reg(cd, src->prev->regoff, REG_ITMP1);
- x86_64_imul_reg_reg(cd, src->regoff, REG_ITMP1);
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_CVTFL(s1, d);
+ M_MOV_IMM(0x8000000000000000, REG_ITMP2);
+ M_LCMP(REG_ITMP2, d); /* corner cases */
+ disp = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 +
+ ((REG_RESULT == d) ? 0 : 3);
+ M_BNE(disp);
+ emit_fmove(cd, s1, REG_FTMP1);
+ M_MOV_IMM(asm_builtin_f2l, REG_ITMP2);
+ M_CALL(REG_ITMP2);
+ M_INTMOVE(REG_RESULT, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- x86_64_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
- x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ case ICMD_D2L: /* ..., value ==> ..., (long) value */
- } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_CVTDL(s1, d);
+ M_MOV_IMM(0x8000000000000000, REG_ITMP2);
+ M_LCMP(REG_ITMP2, d); /* corner cases */
+ disp = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 +
+ ((REG_RESULT == d) ? 0 : 3);
+ M_BNE(disp);
+ emit_fmove(cd, s1, REG_FTMP1);
+ M_MOV_IMM(asm_builtin_d2l, REG_ITMP2);
+ M_CALL(REG_ITMP2);
+ M_INTMOVE(REG_RESULT, d);
+ emit_store_dst(jd, iptr, d);
+ break;
+
+ case ICMD_F2D: /* ..., value ==> ..., (double) value */
- } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- x86_64_imul_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ M_CVTFD(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if (src->regoff == iptr->dst->regoff) {
- x86_64_imul_reg_reg(cd, src->prev->regoff, iptr->dst->regoff);
+ case ICMD_D2F: /* ..., value ==> ..., (float) value */
- } else {
- M_INTMOVE(src->prev->regoff, iptr->dst->regoff);
- x86_64_imul_reg_reg(cd, src->regoff, iptr->dst->regoff);
- }
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ M_CVTDF(s1, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LMULCONST: /* ..., value ==> ..., value * constant */
- /* val.l = constant */
+ case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
+ /* == => 0, < => 1, > => -1 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (iptr->dst->flags & INMEMORY) {
- if (src->flags & INMEMORY) {
- if (IS_IMM32(iptr->val.l)) {
- x86_64_imul_imm_membase_reg(cd, iptr->val.l, REG_SP, src->regoff * 8, REG_ITMP1);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_CLR(d);
+ M_MOV_IMM(1, REG_ITMP1);
+ M_MOV_IMM(-1, REG_ITMP2);
+ emit_ucomiss_reg_reg(cd, s1, s2);
+ M_CMOVULT(REG_ITMP1, d);
+ M_CMOVUGT(REG_ITMP2, d);
+ M_CMOVP(REG_ITMP2, d); /* treat unordered as GT */
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1);
- x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
- }
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-
- } else {
- if (IS_IMM32(iptr->val.l)) {
- x86_64_imul_imm_reg_reg(cd, iptr->val.l, src->regoff, REG_ITMP1);
-
- } else {
- x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1);
- x86_64_imul_reg_reg(cd, src->regoff, REG_ITMP1);
- }
- x86_64_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
- }
+ case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
+ /* == => 0, < => 1, > => -1 */
- } else {
- if (src->flags & INMEMORY) {
- if (IS_IMM32(iptr->val.l)) {
- x86_64_imul_imm_membase_reg(cd, iptr->val.l, REG_SP, src->regoff * 8, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_CLR(d);
+ M_MOV_IMM(1, REG_ITMP1);
+ M_MOV_IMM(-1, REG_ITMP2);
+ emit_ucomiss_reg_reg(cd, s1, s2);
+ M_CMOVULT(REG_ITMP1, d);
+ M_CMOVUGT(REG_ITMP2, d);
+ M_CMOVP(REG_ITMP1, d); /* treat unordered as LT */
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- x86_64_mov_imm_reg(cd, iptr->val.l, iptr->dst->regoff);
- x86_64_imul_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
- }
+ case ICMD_DCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
+ /* == => 0, < => 1, > => -1 */
- } else {
- /* should match in many cases */
- if (iptr->val.l == 2) {
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- x86_64_alul_reg_reg(cd, X86_64_ADD, iptr->dst->regoff, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_CLR(d);
+ M_MOV_IMM(1, REG_ITMP1);
+ M_MOV_IMM(-1, REG_ITMP2);
+ emit_ucomisd_reg_reg(cd, s1, s2);
+ M_CMOVULT(REG_ITMP1, d);
+ M_CMOVUGT(REG_ITMP2, d);
+ M_CMOVP(REG_ITMP2, d); /* treat unordered as GT */
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- if (IS_IMM32(iptr->val.l)) {
- x86_64_imul_imm_reg_reg(cd, iptr->val.l, src->regoff, iptr->dst->regoff); /* 4 cycles */
+ case ICMD_DCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
+ /* == => 0, < => 1, > => -1 */
- } else {
- x86_64_mov_imm_reg(cd, iptr->val.l, REG_ITMP1);
- M_INTMOVE(src->regoff, iptr->dst->regoff);
- x86_64_imul_reg_reg(cd, REG_ITMP1, iptr->dst->regoff);
- }
- }
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_FTMP1);
+ s2 = emit_load_s2(jd, iptr, REG_FTMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ M_CLR(d);
+ M_MOV_IMM(1, REG_ITMP1);
+ M_MOV_IMM(-1, REG_ITMP2);
+ emit_ucomisd_reg_reg(cd, s1, s2);
+ M_CMOVULT(REG_ITMP1, d);
+ M_CMOVUGT(REG_ITMP2, d);
+ M_CMOVP(REG_ITMP1, d); /* treat unordered as LT */
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_IDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (src->prev->flags & INMEMORY) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, RAX);
+ /* memory operations **************************************************/
- } else {
- M_INTMOVE(src->prev->regoff, RAX);
- }
-
- if (src->flags & INMEMORY) {
- x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP3);
+ case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
- } else {
- M_INTMOVE(src->regoff, REG_ITMP3);
- }
- gen_div_check(src);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movsbq_memindex_reg(cd, OFFSET(java_bytearray_t, data[0]), s1, s2, 0, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, RAX); /* check as described in jvm spec */
- x86_64_jcc(cd, X86_64_CC_NE, 4 + 6);
- x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP3); /* 4 bytes */
- x86_64_jcc(cd, X86_64_CC_E, 3 + 1 + 3); /* 6 bytes */
+ case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
- x86_64_mov_reg_reg(cd, RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */
- x86_64_cltd(cd);
- x86_64_idivl_reg(cd, REG_ITMP3);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movzwq_memindex_reg(cd, OFFSET(java_chararray_t, data[0]), s1, s2, 1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- if (iptr->dst->flags & INMEMORY) {
- x86_64_mov_reg_membase(cd, RAX, REG_SP, iptr->dst->regoff * 8);
- x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */
+ case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
- } else {
- M_INTMOVE(RAX, iptr->dst->regoff);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movswq_memindex_reg(cd, OFFSET(java_shortarray_t, data[0]), s1, s2, 1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- if (iptr->dst->regoff != RDX) {
- x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */
- }
- }
+ case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
+
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movl_memindex_reg(cd, OFFSET(java_intarray_t, data[0]), s1, s2, 2, d);
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_IREM: /* ..., val1, val2 ==> ..., val1 % val2 */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (src->prev->flags & INMEMORY) {
- x86_64_movl_membase_reg(cd, REG_SP, src->prev->regoff * 8, RAX);
+ case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
- } else {
- M_INTMOVE(src->prev->regoff, RAX);
- }
-
- if (src->flags & INMEMORY) {
- x86_64_movl_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP3);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_mov_memindex_reg(cd, OFFSET(java_longarray_t, data[0]), s1, s2, 3, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- } else {
- M_INTMOVE(src->regoff, REG_ITMP3);
- }
- gen_div_check(src);
+ case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
- x86_64_mov_reg_reg(cd, RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movss_memindex_reg(cd, OFFSET(java_floatarray_t, data[0]), s1, s2, 2, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, RAX); /* check as described in jvm spec */
- x86_64_jcc(cd, X86_64_CC_NE, 2 + 4 + 6);
+ case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movsd_memindex_reg(cd, OFFSET(java_doublearray_t, data[0]), s1, s2, 3, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- x86_64_alul_reg_reg(cd, X86_64_XOR, RDX, RDX); /* 2 bytes */
- x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP3); /* 4 bytes */
- x86_64_jcc(cd, X86_64_CC_E, 1 + 3); /* 6 bytes */
+ case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
- x86_64_cltd(cd);
- x86_64_idivl_reg(cd, REG_ITMP3);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_mov_memindex_reg(cd, OFFSET(java_objectarray_t, data[0]), s1, s2, 3, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- if (iptr->dst->flags & INMEMORY) {
- x86_64_mov_reg_membase(cd, RDX, REG_SP, iptr->dst->regoff * 8);
- x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */
- } else {
- M_INTMOVE(RDX, iptr->dst->regoff);
+ case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
- if (iptr->dst->regoff != RDX) {
- x86_64_mov_reg_reg(cd, REG_ITMP2, RDX); /* restore %rdx */
- }
- }
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_ITMP3);
+ emit_movb_reg_memindex(cd, s3, OFFSET(java_bytearray_t, data[0]), s1, s2, 0);
break;
- case ICMD_IDIVPOW2: /* ..., value ==> ..., value >> constant */
- /* val.i = constant */
+ case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_INTMOVE(s1, REG_ITMP1);
- x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1);
- x86_64_leal_membase_reg(cd, REG_ITMP1, (1 << iptr->val.i) - 1, REG_ITMP2);
- x86_64_cmovccl_reg_reg(cd, X86_64_CC_LE, REG_ITMP2, REG_ITMP1);
- x86_64_shiftl_imm_reg(cd, X86_64_SAR, iptr->val.i, REG_ITMP1);
- x86_64_mov_reg_reg(cd, REG_ITMP1, d);
- store_reg_to_var_int(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_ITMP3);
+ emit_movw_reg_memindex(cd, s3, OFFSET(java_chararray_t, data[0]), s1, s2, 1);
break;
- case ICMD_IREMPOW2: /* ..., value ==> ..., value % constant */
- /* val.i = constant */
+ case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_INTMOVE(s1, REG_ITMP1);
- x86_64_alul_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1);
- x86_64_leal_membase_reg(cd, REG_ITMP1, iptr->val.i, REG_ITMP2);
- x86_64_cmovccl_reg_reg(cd, X86_64_CC_G, REG_ITMP1, REG_ITMP2);
- x86_64_alul_imm_reg(cd, X86_64_AND, -1 - (iptr->val.i), REG_ITMP2);
- x86_64_alul_reg_reg(cd, X86_64_SUB, REG_ITMP2, REG_ITMP1);
- x86_64_mov_reg_reg(cd, REG_ITMP1, d);
- store_reg_to_var_int(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_ITMP3);
+ emit_movw_reg_memindex(cd, s3, OFFSET(java_shortarray_t, data[0]), s1, s2, 1);
break;
+ case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
- case ICMD_LDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_ITMP3);
+ emit_movl_reg_memindex(cd, s3, OFFSET(java_intarray_t, data[0]), s1, s2, 2);
+ break;
- d = reg_of_var(rd, iptr->dst, REG_NULL);
+ case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
- if (src->prev->flags & INMEMORY) {
- M_LLD(RAX, REG_SP, src->prev->regoff * 8);
-
- } else {
- M_INTMOVE(src->prev->regoff, RAX);
- }
-
- if (src->flags & INMEMORY) {
- M_LLD(REG_ITMP3, REG_SP, src->regoff * 8);
-
- } else {
- M_INTMOVE(src->regoff, REG_ITMP3);
- }
- gen_div_check(src);
-
- /* check as described in jvm spec */
- disp = dseg_adds8(cd, 0x8000000000000000LL);
- M_CMP_MEMBASE(RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + disp, RAX);
- M_BNE(4 + 6);
- M_CMP_IMM(-1, REG_ITMP3); /* 4 bytes */
- M_BEQ(3 + 2 + 3); /* 6 bytes */
-
- M_MOV(RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */
- x86_64_cqto(cd);
- x86_64_idiv_reg(cd, REG_ITMP3);
-
- if (iptr->dst->flags & INMEMORY) {
- M_LST(RAX, REG_SP, iptr->dst->regoff * 8);
- M_MOV(REG_ITMP2, RDX); /* restore %rdx */
-
- } else {
- M_INTMOVE(RAX, iptr->dst->regoff);
-
- if (iptr->dst->regoff != RDX) {
- M_MOV(REG_ITMP2, RDX); /* restore %rdx */
- }
- }
- break;
-
- case ICMD_LREM: /* ..., val1, val2 ==> ..., val1 % val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- if (src->prev->flags & INMEMORY) {
- M_LLD(REG_ITMP1, REG_SP, src->prev->regoff * 8);
-
- } else {
- M_INTMOVE(src->prev->regoff, REG_ITMP1);
- }
-
- if (src->flags & INMEMORY) {
- M_LLD(REG_ITMP3, REG_SP, src->regoff * 8);
-
- } else {
- M_INTMOVE(src->regoff, REG_ITMP3);
- }
- gen_div_check(src);
-
- M_MOV(RDX, REG_ITMP2); /* save %rdx, cause it's an argument register */
-
- /* check as described in jvm spec */
- disp = dseg_adds8(cd, 0x8000000000000000LL);
- M_CMP_MEMBASE(RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + disp, REG_ITMP1);
- M_BNE(3 + 4 + 6);
-
-#if 0
- x86_64_alul_reg_reg(cd, X86_64_XOR, RDX, RDX); /* 2 bytes */
-#endif
- M_XOR(RDX, RDX); /* 3 bytes */
- M_CMP_IMM(-1, REG_ITMP3); /* 4 bytes */
- M_BEQ(2 + 3); /* 6 bytes */
-
- x86_64_cqto(cd);
- x86_64_idiv_reg(cd, REG_ITMP3);
-
- if (iptr->dst->flags & INMEMORY) {
- M_LST(RDX, REG_SP, iptr->dst->regoff * 8);
- M_MOV(REG_ITMP2, RDX); /* restore %rdx */
-
- } else {
- M_INTMOVE(RDX, iptr->dst->regoff);
-
- if (iptr->dst->regoff != RDX) {
- M_MOV(REG_ITMP2, RDX); /* restore %rdx */
- }
- }
- break;
-
- case ICMD_LDIVPOW2: /* ..., value ==> ..., value >> constant */
- /* val.i = constant */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_INTMOVE(s1, REG_ITMP1);
- x86_64_alu_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1);
- x86_64_lea_membase_reg(cd, REG_ITMP1, (1 << iptr->val.i) - 1, REG_ITMP2);
- x86_64_cmovcc_reg_reg(cd, X86_64_CC_LE, REG_ITMP2, REG_ITMP1);
- x86_64_shift_imm_reg(cd, X86_64_SAR, iptr->val.i, REG_ITMP1);
- x86_64_mov_reg_reg(cd, REG_ITMP1, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_LREMPOW2: /* ..., value ==> ..., value % constant */
- /* val.l = constant */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_INTMOVE(s1, REG_ITMP1);
- x86_64_alu_imm_reg(cd, X86_64_CMP, -1, REG_ITMP1);
- x86_64_lea_membase_reg(cd, REG_ITMP1, iptr->val.i, REG_ITMP2);
- x86_64_cmovcc_reg_reg(cd, X86_64_CC_G, REG_ITMP1, REG_ITMP2);
- x86_64_alu_imm_reg(cd, X86_64_AND, -1 - (iptr->val.i), REG_ITMP2);
- x86_64_alu_reg_reg(cd, X86_64_SUB, REG_ITMP2, REG_ITMP1);
- x86_64_mov_reg_reg(cd, REG_ITMP1, d);
- store_reg_to_var_int(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_ITMP3);
+ emit_mov_reg_memindex(cd, s3, OFFSET(java_longarray_t, data[0]), s1, s2, 3);
break;
- case ICMD_ISHL: /* ..., val1, val2 ==> ..., val1 << val2 */
+ case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ishift(cd, X86_64_SHL, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_FTMP3);
+ emit_movss_reg_memindex(cd, s3, OFFSET(java_floatarray_t, data[0]), s1, s2, 2);
break;
- case ICMD_ISHLCONST: /* ..., value ==> ..., value << constant */
- /* val.i = constant */
+ case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ishiftconst(cd, X86_64_SHL, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_FTMP3);
+ emit_movsd_reg_memindex(cd, s3, OFFSET(java_doublearray_t, data[0]), s1, s2, 3);
break;
- case ICMD_ISHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
+ case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ishift(cd, X86_64_SAR, src, iptr);
- break;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ s3 = emit_load_s3(jd, iptr, REG_ITMP3);
- case ICMD_ISHRCONST: /* ..., value ==> ..., value >> constant */
- /* val.i = constant */
+ M_MOV(s1, REG_A0);
+ M_MOV(s3, REG_A1);
+ M_MOV_IMM(BUILTIN_FAST_canstore, REG_ITMP1);
+ M_CALL(REG_ITMP1);
+ emit_arraystore_check(cd, iptr);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ishiftconst(cd, X86_64_SAR, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ s3 = emit_load_s3(jd, iptr, REG_ITMP3);
+ emit_mov_reg_memindex(cd, s3, OFFSET(java_objectarray_t, data[0]), s1, s2, 3);
break;
- case ICMD_IUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ishift(cd, X86_64_SHR, src, iptr);
- break;
- case ICMD_IUSHRCONST: /* ..., value ==> ..., value >>> constant */
- /* val.i = constant */
+ case ICMD_BASTORECONST: /* ..., arrayref, index ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ishiftconst(cd, X86_64_SHR, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movb_imm_memindex(cd, iptr->sx.s23.s3.constval, OFFSET(java_bytearray_t, data[0]), s1, s2, 0);
break;
- case ICMD_LSHL: /* ..., val1, val2 ==> ..., val1 << val2 */
+ case ICMD_CASTORECONST: /* ..., arrayref, index ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lshift(cd, X86_64_SHL, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movw_imm_memindex(cd, iptr->sx.s23.s3.constval, OFFSET(java_chararray_t, data[0]), s1, s2, 1);
break;
- case ICMD_LSHLCONST: /* ..., value ==> ..., value << constant */
- /* val.i = constant */
+ case ICMD_SASTORECONST: /* ..., arrayref, index ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lshiftconst(cd, X86_64_SHL, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movw_imm_memindex(cd, iptr->sx.s23.s3.constval, OFFSET(java_shortarray_t, data[0]), s1, s2, 1);
break;
- case ICMD_LSHR: /* ..., val1, val2 ==> ..., val1 >> val2 */
+ case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lshift(cd, X86_64_SAR, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_movl_imm_memindex(cd, iptr->sx.s23.s3.constval, OFFSET(java_intarray_t, data[0]), s1, s2, 2);
break;
- case ICMD_LSHRCONST: /* ..., value ==> ..., value >> constant */
- /* val.i = constant */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lshiftconst(cd, X86_64_SAR, src, iptr);
- break;
+ case ICMD_LASTORECONST: /* ..., arrayref, index ==> ... */
- case ICMD_LUSHR: /* ..., val1, val2 ==> ..., val1 >>> val2 */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lshift(cd, X86_64_SHR, src, iptr);
+ if (IS_IMM32(iptr->sx.s23.s3.constval)) {
+ emit_mov_imm_memindex(cd, (u4) (iptr->sx.s23.s3.constval & 0x00000000ffffffff), OFFSET(java_longarray_t, data[0]), s1, s2, 3);
+ }
+ else {
+ emit_movl_imm_memindex(cd, (u4) (iptr->sx.s23.s3.constval & 0x00000000ffffffff), OFFSET(java_longarray_t, data[0]), s1, s2, 3);
+ emit_movl_imm_memindex(cd, (u4) (iptr->sx.s23.s3.constval >> 32), OFFSET(java_longarray_t, data[0]) + 4, s1, s2, 3);
+ }
break;
- case ICMD_LUSHRCONST: /* ..., value ==> ..., value >>> constant */
- /* val.l = constant */
+ case ICMD_AASTORECONST: /* ..., arrayref, index ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lshiftconst(cd, X86_64_SHR, src, iptr);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ /* implicit null-pointer check */
+ emit_arrayindexoutofbounds_check(cd, iptr, s1, s2);
+ emit_mov_imm_memindex(cd, 0, OFFSET(java_objectarray_t, data[0]), s1, s2, 3);
break;
- case ICMD_IAND: /* ..., val1, val2 ==> ..., val1 & val2 */
-
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialu(cd, X86_64_AND, src, iptr);
- break;
+ case ICMD_PUTSTATICCONST: /* ... ==> ... */
+ /* val = value (in current instruction) */
+ /* following NOP) */
- case ICMD_IANDCONST: /* ..., value ==> ..., value & constant */
- /* val.i = constant */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ uf = iptr->sx.s23.s3.uf;
+ fieldtype = uf->fieldref->parseddesc.fd->type;
+ disp = dseg_add_unique_address(cd, uf);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialuconst(cd, X86_64_AND, src, iptr);
- break;
+/* PROFILE_CYCLE_STOP; */
- case ICMD_LAND: /* ..., val1, val2 ==> ..., val1 & val2 */
+ pr = patcher_add_patch_ref(jd, PATCHER_get_putstatic, uf, disp);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lalu(cd, X86_64_AND, src, iptr);
- break;
+/* PROFILE_CYCLE_START; */
- case ICMD_LANDCONST: /* ..., value ==> ..., value & constant */
- /* val.l = constant */
+ fi = NULL; /* Silence compiler warning */
+ }
+ else {
+ fi = iptr->sx.s23.s3.fmiref->p.field;
+ fieldtype = fi->type;
+ disp = dseg_add_address(cd, fi->value);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_laluconst(cd, X86_64_AND, src, iptr);
- break;
+ if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->clazz)) {
+ //PROFILE_CYCLE_STOP;
- case ICMD_IOR: /* ..., val1, val2 ==> ..., val1 | val2 */
+ patcher_add_patch_ref(jd, PATCHER_initialize_class,
+ fi->clazz, 0);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialu(cd, X86_64_OR, src, iptr);
- break;
+ //PROFILE_CYCLE_START;
+ }
- case ICMD_IORCONST: /* ..., value ==> ..., value | constant */
- /* val.i = constant */
+ pr = NULL; /* Silence compiler warning */
+ }
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialuconst(cd, X86_64_OR, src, iptr);
- break;
+ /* This approach is much faster than moving the field
+ address inline into a register. */
- case ICMD_LOR: /* ..., val1, val2 ==> ..., val1 | val2 */
+ M_ALD(REG_ITMP1, RIP, disp);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lalu(cd, X86_64_OR, src, iptr);
+ switch (fieldtype) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ M_IST_IMM(iptr->sx.s23.s2.constval, REG_ITMP1, 0);
+ break;
+ case TYPE_LNG:
+ case TYPE_ADR:
+ case TYPE_DBL:
+ if (IS_IMM32(iptr->sx.s23.s2.constval))
+ M_LST_IMM32(iptr->sx.s23.s2.constval, REG_ITMP1, 0);
+ else {
+ M_MOV_IMM(iptr->sx.s23.s2.constval, REG_ITMP2);
+ M_LST(REG_ITMP2, REG_ITMP1, 0);
+ }
+ break;
+ }
+ codegen_emit_patchable_barrier(iptr, cd, pr, fi);
break;
- case ICMD_LORCONST: /* ..., value ==> ..., value | constant */
- /* val.l = constant */
+ case ICMD_GETFIELD: /* ... ==> ..., value */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_laluconst(cd, X86_64_OR, src, iptr);
- break;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
- case ICMD_IXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ uf = iptr->sx.s23.s3.uf;
+ fieldtype = uf->fieldref->parseddesc.fd->type;
+ disp = 0;
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialu(cd, X86_64_XOR, src, iptr);
- break;
+/* PROFILE_CYCLE_STOP; */
- case ICMD_IXORCONST: /* ..., value ==> ..., value ^ constant */
- /* val.i = constant */
+ patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_ialuconst(cd, X86_64_XOR, src, iptr);
- break;
+/* PROFILE_CYCLE_START; */
- case ICMD_LXOR: /* ..., val1, val2 ==> ..., val1 ^ val2 */
+ fi = NULL; /* Silence compiler warning */
+ }
+ else {
+ fi = iptr->sx.s23.s3.fmiref->p.field;
+ fieldtype = fi->type;
+ disp = fi->offset;
+ }
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_lalu(cd, X86_64_XOR, src, iptr);
+ /* implicit null-pointer check */
+ switch (fieldtype) {
+ case TYPE_INT:
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_ILD32(d, s1, disp);
+ break;
+ case TYPE_LNG:
+ case TYPE_ADR:
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP1);
+ M_LLD32(d, s1, disp);
+ break;
+ case TYPE_FLT:
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ M_FLD32(d, s1, disp);
+ break;
+ case TYPE_DBL:
+ d = codegen_reg_of_dst(jd, iptr, REG_FTMP1);
+ M_DLD32(d, s1, disp);
+ break;
+ default:
+ // Silence compiler warning.
+ d = 0;
+ }
+ emit_store_dst(jd, iptr, d);
break;
- case ICMD_LXORCONST: /* ..., value ==> ..., value ^ constant */
- /* val.l = constant */
+ case ICMD_PUTFIELD: /* ..., objectref, value ==> ... */
- d = reg_of_var(rd, iptr->dst, REG_NULL);
- x86_64_emit_laluconst(cd, X86_64_XOR, src, iptr);
- break;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_IFTMP); /* REG_IFTMP == REG_ITMP2 */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ uf = iptr->sx.s23.s3.uf;
+ fieldtype = uf->fieldref->parseddesc.fd->type;
+ disp = 0;
- case ICMD_IINC: /* ..., value ==> ..., value + constant */
- /* op1 = variable, val.i = constant */
+/* PROFILE_CYCLE_STOP; */
- /* using inc and dec is definitely faster than add -- tested */
- /* with sieve */
+ pr = patcher_add_patch_ref(jd, PATCHER_get_putfield, uf, 0);
- var = &(rd->locals[iptr->op1][TYPE_INT]);
- d = var->regoff;
- if (var->flags & INMEMORY) {
- if (iptr->val.i == 1) {
- x86_64_incl_membase(cd, REG_SP, d * 8);
-
- } else if (iptr->val.i == -1) {
- x86_64_decl_membase(cd, REG_SP, d * 8);
+/* PROFILE_CYCLE_START; */
- } else {
- x86_64_alul_imm_membase(cd, X86_64_ADD, iptr->val.i, REG_SP, d * 8);
- }
+ fi = NULL; /* Silence compiler warning */
+ }
+ else {
+ fi = iptr->sx.s23.s3.fmiref->p.field;
+ fieldtype = fi->type;
+ disp = fi->offset;
- } else {
- if (iptr->val.i == 1) {
- x86_64_incl_reg(cd, d);
-
- } else if (iptr->val.i == -1) {
- x86_64_decl_reg(cd, d);
-
- } else {
- x86_64_alul_imm_reg(cd, X86_64_ADD, iptr->val.i, d);
- }
+ pr = NULL; /* Silence compiler warning */
}
- break;
-
-
- /* floating operations ************************************************/
- case ICMD_FNEG: /* ..., value ==> ..., - value */
-
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- disp = dseg_adds4(cd, 0x80000000);
- M_FLTMOVE(s1, d);
- x86_64_movss_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, REG_FTMP2);
- x86_64_xorps_reg_reg(cd, REG_FTMP2, d);
- store_reg_to_var_flt(iptr->dst, d);
+ /* implicit null-pointer check */
+ switch (fieldtype) {
+ case TYPE_INT:
+ M_IST32(s2, s1, disp);
+ break;
+ case TYPE_LNG:
+ case TYPE_ADR:
+ M_LST32(s2, s1, disp);
+ break;
+ case TYPE_FLT:
+ M_FST32(s2, s1, disp);
+ break;
+ case TYPE_DBL:
+ M_DST32(s2, s1, disp);
+ break;
+ }
+ codegen_emit_patchable_barrier(iptr, cd, pr, fi);
break;
- case ICMD_DNEG: /* ..., value ==> ..., - value */
+ case ICMD_PUTFIELDCONST: /* ..., objectref, value ==> ... */
+ /* val = value (in current instruction) */
+ /* following NOP) */
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- disp = dseg_adds8(cd, 0x8000000000000000);
- M_FLTMOVE(s1, d);
- x86_64_movd_membase_reg(cd, RIP, -(((s8) cd->mcodeptr + 9) - (s8) cd->mcodebase) + disp, REG_FTMP2);
- x86_64_xorpd_reg_reg(cd, REG_FTMP2, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
- case ICMD_FADD: /* ..., val1, val2 ==> ..., val1 + val2 */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ uf = iptr->sx.s23.s3.uf;
+ fieldtype = uf->fieldref->parseddesc.fd->type;
+ disp = 0;
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s1 == d) {
- x86_64_addss_reg_reg(cd, s2, d);
- } else if (s2 == d) {
- x86_64_addss_reg_reg(cd, s1, d);
- } else {
- M_FLTMOVE(s1, d);
- x86_64_addss_reg_reg(cd, s2, d);
- }
- store_reg_to_var_flt(iptr->dst, d);
- break;
+/* PROFILE_CYCLE_STOP; */
- case ICMD_DADD: /* ..., val1, val2 ==> ..., val1 + val2 */
+ pr = patcher_add_patch_ref(jd, PATCHER_putfieldconst, uf, 0);
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s1 == d) {
- x86_64_addsd_reg_reg(cd, s2, d);
- } else if (s2 == d) {
- x86_64_addsd_reg_reg(cd, s1, d);
- } else {
- M_FLTMOVE(s1, d);
- x86_64_addsd_reg_reg(cd, s2, d);
- }
- store_reg_to_var_flt(iptr->dst, d);
- break;
+/* PROFILE_CYCLE_START; */
- case ICMD_FSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
+ fi = NULL; /* Silence compiler warning */
+ }
+ else {
+ fi = iptr->sx.s23.s3.fmiref->p.field;
+ fieldtype = fi->type;
+ disp = fi->offset;
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s2 == d) {
- M_FLTMOVE(s2, REG_FTMP2);
- s2 = REG_FTMP2;
+ pr = NULL; /* Silence compiler warning */
}
- M_FLTMOVE(s1, d);
- x86_64_subss_reg_reg(cd, s2, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
-
- case ICMD_DSUB: /* ..., val1, val2 ==> ..., val1 - val2 */
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s2 == d) {
- M_FLTMOVE(s2, REG_FTMP2);
- s2 = REG_FTMP2;
+ /* implicit null-pointer check */
+ switch (fieldtype) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ M_IST32_IMM(iptr->sx.s23.s2.constval, s1, disp);
+ break;
+ case TYPE_LNG:
+ case TYPE_ADR:
+ case TYPE_DBL:
+ /* XXX why no check for IS_IMM32? -- probably because of the patcher */
+ M_MOV_IMM(iptr->sx.s23.s2.constval, REG_ITMP2);
+ if (disp) /* resolved, disp can never be 0 */
+ M_LST(REG_ITMP2, s1, disp);
+ else /* unresolved */
+ M_LST32(REG_ITMP2, s1, disp);
+ break;
}
- M_FLTMOVE(s1, d);
- x86_64_subsd_reg_reg(cd, s2, d);
- store_reg_to_var_flt(iptr->dst, d);
+ codegen_emit_patchable_barrier(iptr, cd, pr, fi);
break;
- case ICMD_FMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
-
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s1 == d) {
- x86_64_mulss_reg_reg(cd, s2, d);
- } else if (s2 == d) {
- x86_64_mulss_reg_reg(cd, s1, d);
- } else {
- M_FLTMOVE(s1, d);
- x86_64_mulss_reg_reg(cd, s2, d);
- }
- store_reg_to_var_flt(iptr->dst, d);
- break;
- case ICMD_DMUL: /* ..., val1, val2 ==> ..., val1 * val2 */
+ /* branch operations **************************************************/
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s1 == d) {
- x86_64_mulsd_reg_reg(cd, s2, d);
- } else if (s2 == d) {
- x86_64_mulsd_reg_reg(cd, s1, d);
- } else {
- M_FLTMOVE(s1, d);
- x86_64_mulsd_reg_reg(cd, s2, d);
- }
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
- case ICMD_FDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
+ M_CALL_IMM(0); /* passing exception pc */
+ M_POP(REG_ITMP2_XPC);
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s2 == d) {
- M_FLTMOVE(s2, REG_FTMP2);
- s2 = REG_FTMP2;
- }
- M_FLTMOVE(s1, d);
- x86_64_divss_reg_reg(cd, s2, d);
- store_reg_to_var_flt(iptr->dst, d);
+ M_MOV_IMM(asm_handle_exception, REG_ITMP3);
+ M_JMP(REG_ITMP3);
break;
- case ICMD_DDIV: /* ..., val1, val2 ==> ..., val1 / val2 */
+ case ICMD_IF_LEQ: /* ..., value ==> ... */
+ case ICMD_IF_LNE:
+ case ICMD_IF_LLT:
+ case ICMD_IF_LGE:
+ case ICMD_IF_LGT:
+ case ICMD_IF_LLE:
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (s2 == d) {
- M_FLTMOVE(s2, REG_FTMP2);
- s2 = REG_FTMP2;
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ if (IS_IMM32(iptr->sx.val.l))
+ M_LCMP_IMM(iptr->sx.val.l, s1);
+ else {
+ M_MOV_IMM(iptr->sx.val.l, REG_ITMP2);
+ M_LCMP(REG_ITMP2, s1);
}
- M_FLTMOVE(s1, d);
- x86_64_divsd_reg_reg(cd, s2, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
-
- case ICMD_I2F: /* ..., value ==> ..., (float) value */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- x86_64_cvtsi2ss_reg_reg(cd, s1, d);
- store_reg_to_var_flt(iptr->dst, d);
+ emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_LEQ, BRANCH_OPT_NONE);
break;
- case ICMD_I2D: /* ..., value ==> ..., (double) value */
+ case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */
+ case ICMD_IF_LCMPNE:
+ case ICMD_IF_LCMPLT:
+ case ICMD_IF_LCMPGE:
+ case ICMD_IF_LCMPGT:
+ case ICMD_IF_LCMPLE:
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- x86_64_cvtsi2sd_reg_reg(cd, s1, d);
- store_reg_to_var_flt(iptr->dst, d);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ s2 = emit_load_s2(jd, iptr, REG_ITMP2);
+ M_LCMP(s2, s1);
+ emit_bcc(cd, iptr->dst.block, iptr->opc - ICMD_IF_LCMPEQ, BRANCH_OPT_NONE);
break;
- case ICMD_L2F: /* ..., value ==> ..., (float) value */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- x86_64_cvtsi2ssq_reg_reg(cd, s1, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
-
- case ICMD_L2D: /* ..., value ==> ..., (double) value */
+ case ICMD_TABLESWITCH: /* ..., index ==> ... */
+ {
+ s4 i, l;
+ branch_target_t *table;
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- x86_64_cvtsi2sdq_reg_reg(cd, s1, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
-
- case ICMD_F2I: /* ..., value ==> ..., (int) value */
+ table = iptr->dst.table;
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- x86_64_cvttss2si_reg_reg(cd, s1, d);
- x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, d); /* corner cases */
- a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3);
- x86_64_jcc(cd, X86_64_CC_NE, a);
- M_FLTMOVE(s1, REG_FTMP1);
- x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_f2i, REG_ITMP2);
- x86_64_call_reg(cd, REG_ITMP2);
- M_INTMOVE(REG_RESULT, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
+ l = iptr->sx.s23.s2.tablelow;
+ i = iptr->sx.s23.s3.tablehigh;
- case ICMD_D2I: /* ..., value ==> ..., (int) value */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ M_INTMOVE(s1, REG_ITMP1);
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- x86_64_cvttsd2si_reg_reg(cd, s1, d);
- x86_64_alul_imm_reg(cd, X86_64_CMP, 0x80000000, d); /* corner cases */
- a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3);
- x86_64_jcc(cd, X86_64_CC_NE, a);
- M_FLTMOVE(s1, REG_FTMP1);
- x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_d2i, REG_ITMP2);
- x86_64_call_reg(cd, REG_ITMP2);
- M_INTMOVE(REG_RESULT, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
+ if (l != 0)
+ M_ISUB_IMM(l, REG_ITMP1);
- case ICMD_F2L: /* ..., value ==> ..., (long) value */
+ /* number of targets */
+ i = i - l + 1;
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- x86_64_cvttss2siq_reg_reg(cd, s1, d);
- x86_64_mov_imm_reg(cd, 0x8000000000000000, REG_ITMP2);
- x86_64_alu_reg_reg(cd, X86_64_CMP, REG_ITMP2, d); /* corner cases */
- a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3);
- x86_64_jcc(cd, X86_64_CC_NE, a);
- M_FLTMOVE(s1, REG_FTMP1);
- x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_f2l, REG_ITMP2);
- x86_64_call_reg(cd, REG_ITMP2);
- M_INTMOVE(REG_RESULT, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
+ /* range check */
- case ICMD_D2L: /* ..., value ==> ..., (long) value */
+ M_ICMP_IMM(i - 1, REG_ITMP1);
+ emit_bugt(cd, table[0].block);
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- x86_64_cvttsd2siq_reg_reg(cd, s1, d);
- x86_64_mov_imm_reg(cd, 0x8000000000000000, REG_ITMP2);
- x86_64_alu_reg_reg(cd, X86_64_CMP, REG_ITMP2, d); /* corner cases */
- a = ((s1 == REG_FTMP1) ? 0 : 5) + 10 + 3 + ((REG_RESULT == d) ? 0 : 3);
- x86_64_jcc(cd, X86_64_CC_NE, a);
- M_FLTMOVE(s1, REG_FTMP1);
- x86_64_mov_imm_reg(cd, (ptrint) asm_builtin_d2l, REG_ITMP2);
- x86_64_call_reg(cd, REG_ITMP2);
- M_INTMOVE(REG_RESULT, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
+ /* build jump table top down and use address of lowest entry */
- case ICMD_F2D: /* ..., value ==> ..., (double) value */
+ table += i;
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- x86_64_cvtss2sd_reg_reg(cd, s1, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
+ while (--i >= 0) {
+ dseg_add_target(cd, table->block);
+ --table;
+ }
- case ICMD_D2F: /* ..., value ==> ..., (float) value */
+ /* length of dataseg after last dseg_add_target is used
+ by load */
- var_to_reg_flt(s1, src, REG_FTMP1);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- x86_64_cvtsd2ss_reg_reg(cd, s1, d);
- store_reg_to_var_flt(iptr->dst, d);
+ M_MOV_IMM(0, REG_ITMP2);
+ dseg_adddata(cd);
+ emit_mov_memindex_reg(cd, -(cd->dseglen), REG_ITMP2, REG_ITMP1, 3, REG_ITMP1);
+ M_JMP(REG_ITMP1);
+ }
break;
- case ICMD_FCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
- /* == => 0, < => 1, > => -1 */
-
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_CLR(d);
- M_MOV_IMM(1, REG_ITMP1);
- M_MOV_IMM(-1, REG_ITMP2);
- x86_64_ucomiss_reg_reg(cd, s1, s2);
- M_CMOVB(REG_ITMP1, d);
- M_CMOVA(REG_ITMP2, d);
- M_CMOVP(REG_ITMP2, d); /* treat unordered as GT */
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_FCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
- /* == => 0, < => 1, > => -1 */
-
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_CLR(d);
- M_MOV_IMM(1, REG_ITMP1);
- M_MOV_IMM(-1, REG_ITMP2);
- x86_64_ucomiss_reg_reg(cd, s1, s2);
- M_CMOVB(REG_ITMP1, d);
- M_CMOVA(REG_ITMP2, d);
- M_CMOVP(REG_ITMP1, d); /* treat unordered as LT */
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_DCMPL: /* ..., val1, val2 ==> ..., val1 fcmpl val2 */
- /* == => 0, < => 1, > => -1 */
-
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_CLR(d);
- M_MOV_IMM(1, REG_ITMP1);
- M_MOV_IMM(-1, REG_ITMP2);
- x86_64_ucomisd_reg_reg(cd, s1, s2);
- M_CMOVB(REG_ITMP1, d);
- M_CMOVA(REG_ITMP2, d);
- M_CMOVP(REG_ITMP2, d); /* treat unordered as GT */
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_DCMPG: /* ..., val1, val2 ==> ..., val1 fcmpg val2 */
- /* == => 0, < => 1, > => -1 */
-
- var_to_reg_flt(s1, src->prev, REG_FTMP1);
- var_to_reg_flt(s2, src, REG_FTMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- M_CLR(d);
- M_MOV_IMM(1, REG_ITMP1);
- M_MOV_IMM(-1, REG_ITMP2);
- x86_64_ucomisd_reg_reg(cd, s1, s2);
- M_CMOVB(REG_ITMP1, d);
- M_CMOVA(REG_ITMP2, d);
- M_CMOVP(REG_ITMP1, d); /* treat unordered as LT */
- store_reg_to_var_int(iptr->dst, d);
- break;
-
-
- /* memory operations **************************************************/
-
- case ICMD_ARRAYLENGTH: /* ..., arrayref ==> ..., (int) length */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- gen_nullptr_check(s1);
- M_ILD(d, s1, OFFSET(java_arrayheader, size));
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_BALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movsbq_memindex_reg(cd, OFFSET(java_bytearray, data[0]), s1, s2, 0, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_CALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movzwq_memindex_reg(cd, OFFSET(java_chararray, data[0]), s1, s2, 1, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_SALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movswq_memindex_reg(cd, OFFSET(java_shortarray, data[0]), s1, s2, 1, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_IALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movl_memindex_reg(cd, OFFSET(java_intarray, data[0]), s1, s2, 2, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_LALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_mov_memindex_reg(cd, OFFSET(java_longarray, data[0]), s1, s2, 3, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_FALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movss_memindex_reg(cd, OFFSET(java_floatarray, data[0]), s1, s2, 2, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
-
- case ICMD_DALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_FTMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movsd_memindex_reg(cd, OFFSET(java_doublearray, data[0]), s1, s2, 3, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
-
- case ICMD_AALOAD: /* ..., arrayref, index ==> ..., value */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_mov_memindex_reg(cd, OFFSET(java_objectarray, data[0]), s1, s2, 3, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
-
- case ICMD_BASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_int(s3, src, REG_ITMP3);
- x86_64_movb_reg_memindex(cd, s3, OFFSET(java_bytearray, data[0]), s1, s2, 0);
- break;
-
- case ICMD_CASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_int(s3, src, REG_ITMP3);
- x86_64_movw_reg_memindex(cd, s3, OFFSET(java_chararray, data[0]), s1, s2, 1);
- break;
-
- case ICMD_SASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_int(s3, src, REG_ITMP3);
- x86_64_movw_reg_memindex(cd, s3, OFFSET(java_shortarray, data[0]), s1, s2, 1);
- break;
-
- case ICMD_IASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_int(s3, src, REG_ITMP3);
- x86_64_movl_reg_memindex(cd, s3, OFFSET(java_intarray, data[0]), s1, s2, 2);
- break;
-
- case ICMD_LASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_int(s3, src, REG_ITMP3);
- x86_64_mov_reg_memindex(cd, s3, OFFSET(java_longarray, data[0]), s1, s2, 3);
- break;
-
- case ICMD_FASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_flt(s3, src, REG_FTMP3);
- x86_64_movss_reg_memindex(cd, s3, OFFSET(java_floatarray, data[0]), s1, s2, 2);
- break;
-
- case ICMD_DASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_flt(s3, src, REG_FTMP3);
- x86_64_movsd_reg_memindex(cd, s3, OFFSET(java_doublearray, data[0]), s1, s2, 3);
- break;
-
- case ICMD_AASTORE: /* ..., arrayref, index, value ==> ... */
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- var_to_reg_int(s3, src, REG_ITMP3);
-
- M_MOV(s1, rd->argintregs[0]);
- M_MOV(s3, rd->argintregs[1]);
- M_MOV_IMM(BUILTIN_canstore, REG_ITMP1);
- M_CALL(REG_ITMP1);
- M_TEST(REG_RESULT);
- M_BEQ(0);
- codegen_add_arraystoreexception_ref(cd, cd->mcodeptr);
-
- var_to_reg_int(s1, src->prev->prev, REG_ITMP1);
- var_to_reg_int(s2, src->prev, REG_ITMP2);
- var_to_reg_int(s3, src, REG_ITMP3);
- x86_64_mov_reg_memindex(cd, s3, OFFSET(java_objectarray, data[0]), s1, s2, 3);
- break;
-
-
- case ICMD_BASTORECONST: /* ..., arrayref, index ==> ... */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movb_imm_memindex(cd, iptr->val.i, OFFSET(java_bytearray, data[0]), s1, s2, 0);
- break;
-
- case ICMD_CASTORECONST: /* ..., arrayref, index ==> ... */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_chararray, data[0]), s1, s2, 1);
- break;
-
- case ICMD_SASTORECONST: /* ..., arrayref, index ==> ... */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movw_imm_memindex(cd, iptr->val.i, OFFSET(java_shortarray, data[0]), s1, s2, 1);
- break;
-
- case ICMD_IASTORECONST: /* ..., arrayref, index ==> ... */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_movl_imm_memindex(cd, iptr->val.i, OFFSET(java_intarray, data[0]), s1, s2, 2);
- break;
-
- case ICMD_LASTORECONST: /* ..., arrayref, index ==> ... */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
-
- if (IS_IMM32(iptr->val.l)) {
- x86_64_mov_imm_memindex(cd, (u4) (iptr->val.l & 0x00000000ffffffff), OFFSET(java_longarray, data[0]), s1, s2, 3);
- } else {
- x86_64_movl_imm_memindex(cd, (u4) (iptr->val.l & 0x00000000ffffffff), OFFSET(java_longarray, data[0]), s1, s2, 3);
- x86_64_movl_imm_memindex(cd, (u4) (iptr->val.l >> 32), OFFSET(java_longarray, data[0]) + 4, s1, s2, 3);
- }
- break;
-
- case ICMD_AASTORECONST: /* ..., arrayref, index ==> ... */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- var_to_reg_int(s2, src, REG_ITMP2);
- if (iptr->op1 == 0) {
- gen_nullptr_check(s1);
- gen_bound_check;
- }
- x86_64_mov_imm_memindex(cd, 0, OFFSET(java_objectarray, data[0]), s1, s2, 3);
- break;
-
-
- case ICMD_GETSTATIC: /* ... ==> ..., value */
- /* op1 = type, val.a = field address */
-
- if (iptr->val.a == NULL) {
- disp = dseg_addaddress(cd, NULL);
-
-/* PROFILE_CYCLE_STOP; */
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_get_putstatic,
- (unresolved_field *) iptr->target, disp);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
-/* PROFILE_CYCLE_START; */
-
- } else {
- fieldinfo *fi = iptr->val.a;
-
- disp = dseg_addaddress(cd, &(fi->value));
-
- if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
- PROFILE_CYCLE_STOP;
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_clinit, fi->class, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- PROFILE_CYCLE_START;
- }
- }
-
- /* This approach is much faster than moving the field
- address inline into a register. */
-
- M_ALD(REG_ITMP2, RIP, -(((ptrint) cd->mcodeptr + 7) -
- (ptrint) cd->mcodebase) + disp);
-
- switch (iptr->op1) {
- case TYPE_INT:
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- M_ILD(d, REG_ITMP2, 0);
- store_reg_to_var_int(iptr->dst, d);
- break;
- case TYPE_LNG:
- case TYPE_ADR:
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- M_LLD(d, REG_ITMP2, 0);
- store_reg_to_var_int(iptr->dst, d);
- break;
- case TYPE_FLT:
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- x86_64_movss_membase_reg(cd, REG_ITMP2, 0, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
- case TYPE_DBL:
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- x86_64_movsd_membase_reg(cd, REG_ITMP2, 0, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
- }
- break;
-
- case ICMD_PUTSTATIC: /* ..., value ==> ... */
- /* op1 = type, val.a = field address */
-
- if (iptr->val.a == NULL) {
- disp = dseg_addaddress(cd, NULL);
-
-/* PROFILE_CYCLE_STOP; */
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_get_putstatic,
- (unresolved_field *) iptr->target, disp);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
-/* PROFILE_CYCLE_START; */
-
- } else {
- fieldinfo *fi = iptr->val.a;
-
- disp = dseg_addaddress(cd, &(fi->value));
-
- if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
- PROFILE_CYCLE_STOP;
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_clinit, fi->class, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- PROFILE_CYCLE_START;
- }
- }
-
- /* This approach is much faster than moving the field
- address inline into a register. */
-
- M_ALD(REG_ITMP2, RIP, -(((ptrint) cd->mcodeptr + 7) -
- (ptrint) cd->mcodebase) + disp);
-
- switch (iptr->op1) {
- case TYPE_INT:
- var_to_reg_int(s2, src, REG_ITMP1);
- M_IST(s2, REG_ITMP2, 0);
- break;
- case TYPE_LNG:
- case TYPE_ADR:
- var_to_reg_int(s2, src, REG_ITMP1);
- M_LST(s2, REG_ITMP2, 0);
- break;
- case TYPE_FLT:
- var_to_reg_flt(s2, src, REG_FTMP1);
- x86_64_movss_reg_membase(cd, s2, REG_ITMP2, 0);
- break;
- case TYPE_DBL:
- var_to_reg_flt(s2, src, REG_FTMP1);
- x86_64_movsd_reg_membase(cd, s2, REG_ITMP2, 0);
- break;
- }
- break;
-
- case ICMD_PUTSTATICCONST: /* ... ==> ... */
- /* val = value (in current instruction) */
- /* op1 = type, val.a = field address (in */
- /* following NOP) */
-
- if (iptr[1].val.a == NULL) {
- disp = dseg_addaddress(cd, NULL);
-
-/* PROFILE_CYCLE_STOP; */
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_get_putstatic,
- (unresolved_field *) iptr[1].target, disp);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
-/* PROFILE_CYCLE_START; */
-
- } else {
- fieldinfo *fi = iptr[1].val.a;
-
- disp = dseg_addaddress(cd, &(fi->value));
-
- if (!CLASS_IS_OR_ALMOST_INITIALIZED(fi->class)) {
- PROFILE_CYCLE_STOP;
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_clinit, fi->class, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- PROFILE_CYCLE_START;
- }
- }
-
- /* This approach is much faster than moving the field
- address inline into a register. */
-
- M_ALD(REG_ITMP1, RIP, -(((ptrint) cd->mcodeptr + 7) -
- (ptrint) cd->mcodebase) + disp);
-
- switch (iptr->op1) {
- case TYPE_INT:
- case TYPE_FLT:
- M_IST_IMM(iptr->val.i, REG_ITMP1, 0);
- break;
- case TYPE_LNG:
- case TYPE_ADR:
- case TYPE_DBL:
- if (IS_IMM32(iptr->val.l)) {
- M_LST_IMM32(iptr->val.l, REG_ITMP1, 0);
- } else {
- M_IST_IMM(iptr->val.l, REG_ITMP1, 0);
- M_IST_IMM(iptr->val.l >> 32, REG_ITMP1, 4);
- }
- break;
- }
- break;
-
- case ICMD_GETFIELD: /* ... ==> ..., value */
- /* op1 = type, val.i = field offset */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- gen_nullptr_check(s1);
-
- if (iptr->val.a == NULL) {
-/* PROFILE_CYCLE_STOP; */
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_get_putfield,
- (unresolved_field *) iptr->target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
-/* PROFILE_CYCLE_START; */
-
- disp = 0;
-
- } else {
- disp = ((fieldinfo *) (iptr->val.a))->offset;
- }
-
- switch (iptr->op1) {
- case TYPE_INT:
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- if (iptr->val.a == NULL)
- M_ILD32(d, s1, disp);
- else
- M_ILD(d, s1, disp);
- store_reg_to_var_int(iptr->dst, d);
- break;
- case TYPE_LNG:
- case TYPE_ADR:
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- if (iptr->val.a == NULL)
- M_LLD32(d, s1, disp);
- else
- M_LLD(d, s1, disp);
- store_reg_to_var_int(iptr->dst, d);
- break;
- case TYPE_FLT:
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- x86_64_movss_membase32_reg(cd, s1, disp, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
- case TYPE_DBL:
- d = reg_of_var(rd, iptr->dst, REG_FTMP1);
- x86_64_movsd_membase32_reg(cd, s1, disp, d);
- store_reg_to_var_flt(iptr->dst, d);
- break;
- }
- break;
-
- case ICMD_PUTFIELD: /* ..., objectref, value ==> ... */
- /* op1 = type, val.i = field offset */
-
- var_to_reg_int(s1, src->prev, REG_ITMP1);
- gen_nullptr_check(s1);
-
- if (IS_INT_LNG_TYPE(iptr->op1)) {
- var_to_reg_int(s2, src, REG_ITMP2);
- } else {
- var_to_reg_flt(s2, src, REG_FTMP2);
- }
-
- if (iptr->val.a == NULL) {
-/* PROFILE_CYCLE_STOP; */
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_get_putfield,
- (unresolved_field *) iptr->target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
-/* PROFILE_CYCLE_START; */
-
- disp = 0;
-
- } else {
- disp = ((fieldinfo *) (iptr->val.a))->offset;
- }
-
- switch (iptr->op1) {
- case TYPE_INT:
- if (iptr->val.a == NULL)
- M_IST32(s2, s1, disp);
- else
- M_IST(s2, s1, disp);
- break;
- case TYPE_LNG:
- case TYPE_ADR:
- if (iptr->val.a == NULL)
- M_LST32(s2, s1, disp);
- else
- M_LST(s2, s1, disp);
- break;
- case TYPE_FLT:
- x86_64_movss_reg_membase32(cd, s2, s1, disp);
- break;
- case TYPE_DBL:
- x86_64_movsd_reg_membase32(cd, s2, s1, disp);
- break;
- }
- break;
-
- case ICMD_PUTFIELDCONST: /* ..., objectref, value ==> ... */
- /* val = value (in current instruction) */
- /* op1 = type, val.a = field address (in */
- /* following NOP) */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- gen_nullptr_check(s1);
-
- if (iptr[1].val.a == NULL) {
-/* PROFILE_CYCLE_STOP; */
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_putfieldconst,
- (unresolved_field *) iptr[1].target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
-/* PROFILE_CYCLE_START; */
-
- disp = 0;
-
- } else {
- disp = ((fieldinfo *) (iptr[1].val.a))->offset;
- }
-
- switch (iptr->op1) {
- case TYPE_INT:
- case TYPE_FLT:
- if (iptr[1].val.a == NULL)
- M_IST32_IMM(iptr->val.i, s1, disp);
- else
- M_IST_IMM(iptr->val.i, s1, disp);
- break;
- case TYPE_LNG:
- case TYPE_ADR:
- case TYPE_DBL:
- /* We can only optimize the move, if the class is
- resolved. Otherwise we don't know what to patch. */
- if (iptr[1].val.a == NULL) {
- M_IST32_IMM(iptr->val.l, s1, disp);
- M_IST32_IMM(iptr->val.l >> 32, s1, disp + 4);
- } else {
- if (IS_IMM32(iptr->val.l)) {
- M_LST_IMM32(iptr->val.l, s1, disp);
- } else {
- M_IST_IMM(iptr->val.l, s1, disp);
- M_IST_IMM(iptr->val.l >> 32, s1, disp + 4);
- }
- }
- break;
- }
- break;
-
-
- /* branch operations **************************************************/
-
- case ICMD_ATHROW: /* ..., objectref ==> ... (, objectref) */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- M_INTMOVE(s1, REG_ITMP1_XPTR);
-
- PROFILE_CYCLE_STOP;
-
-#ifdef ENABLE_VERIFIER
- if (iptr->val.a) {
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_athrow_areturn,
- (unresolved_class *) iptr->val.a, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
- }
-#endif /* ENABLE_VERIFIER */
-
- M_CALL_IMM(0); /* passing exception pc */
- M_POP(REG_ITMP2_XPC);
-
- M_MOV_IMM(asm_handle_exception, REG_ITMP3);
- M_JMP(REG_ITMP3);
- break;
-
- case ICMD_GOTO: /* ... ==> ... */
- /* op1 = target JavaVM pc */
-
- M_JMP_IMM(0);
- codegen_addreference(cd, (basicblock *) iptr->target, cd->mcodeptr);
- break;
-
- case ICMD_JSR: /* ... ==> ... */
- /* op1 = target JavaVM pc */
-
- M_CALL_IMM(0);
- codegen_addreference(cd, (basicblock *) iptr->target, cd->mcodeptr);
- break;
-
- case ICMD_RET: /* ... ==> ... */
- /* op1 = local variable */
-
- var = &(rd->locals[iptr->op1][TYPE_ADR]);
- var_to_reg_int(s1, var, REG_ITMP1);
- M_JMP(s1);
- break;
-
- case ICMD_IFNULL: /* ..., value ==> ... */
- /* op1 = target JavaVM pc */
-
- if (src->flags & INMEMORY)
- M_CMP_IMM_MEMBASE(0, REG_SP, src->regoff * 8);
- else
- M_TEST(src->regoff);
- M_BEQ(0);
- codegen_addreference(cd, (basicblock *) iptr->target, cd->mcodeptr);
- break;
-
- case ICMD_IFNONNULL: /* ..., value ==> ... */
- /* op1 = target JavaVM pc */
-
- if (src->flags & INMEMORY)
- M_CMP_IMM_MEMBASE(0, REG_SP, src->regoff * 8);
- else
- M_TEST(src->regoff);
- M_BNE(0);
- codegen_addreference(cd, (basicblock *) iptr->target, cd->mcodeptr);
- break;
-
- case ICMD_IFEQ: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.i = constant */
-
- x86_64_emit_ifcc(cd, X86_64_CC_E, src, iptr);
- break;
-
- case ICMD_IFLT: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.i = constant */
-
- x86_64_emit_ifcc(cd, X86_64_CC_L, src, iptr);
- break;
-
- case ICMD_IFLE: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.i = constant */
-
- x86_64_emit_ifcc(cd, X86_64_CC_LE, src, iptr);
- break;
-
- case ICMD_IFNE: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.i = constant */
-
- x86_64_emit_ifcc(cd, X86_64_CC_NE, src, iptr);
- break;
-
- case ICMD_IFGT: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.i = constant */
-
- x86_64_emit_ifcc(cd, X86_64_CC_G, src, iptr);
- break;
-
- case ICMD_IFGE: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.i = constant */
-
- x86_64_emit_ifcc(cd, X86_64_CC_GE, src, iptr);
- break;
-
- case ICMD_IF_LEQ: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.l = constant */
-
- x86_64_emit_if_lcc(cd, X86_64_CC_E, src, iptr);
- break;
-
- case ICMD_IF_LLT: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.l = constant */
-
- x86_64_emit_if_lcc(cd, X86_64_CC_L, src, iptr);
- break;
-
- case ICMD_IF_LLE: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.l = constant */
-
- x86_64_emit_if_lcc(cd, X86_64_CC_LE, src, iptr);
- break;
-
- case ICMD_IF_LNE: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.l = constant */
-
- x86_64_emit_if_lcc(cd, X86_64_CC_NE, src, iptr);
- break;
-
- case ICMD_IF_LGT: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.l = constant */
-
- x86_64_emit_if_lcc(cd, X86_64_CC_G, src, iptr);
- break;
-
- case ICMD_IF_LGE: /* ..., value ==> ... */
- /* op1 = target JavaVM pc, val.l = constant */
-
- x86_64_emit_if_lcc(cd, X86_64_CC_GE, src, iptr);
- break;
-
- case ICMD_IF_ICMPEQ: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_icmpcc(cd, X86_64_CC_E, src, iptr);
- break;
-
- case ICMD_IF_LCMPEQ: /* ..., value, value ==> ... */
- case ICMD_IF_ACMPEQ: /* op1 = target JavaVM pc */
-
- x86_64_emit_if_lcmpcc(cd, X86_64_CC_E, src, iptr);
- break;
-
- case ICMD_IF_ICMPNE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_icmpcc(cd, X86_64_CC_NE, src, iptr);
- break;
-
- case ICMD_IF_LCMPNE: /* ..., value, value ==> ... */
- case ICMD_IF_ACMPNE: /* op1 = target JavaVM pc */
-
- x86_64_emit_if_lcmpcc(cd, X86_64_CC_NE, src, iptr);
- break;
-
- case ICMD_IF_ICMPLT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_icmpcc(cd, X86_64_CC_L, src, iptr);
- break;
-
- case ICMD_IF_LCMPLT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_lcmpcc(cd, X86_64_CC_L, src, iptr);
- break;
-
- case ICMD_IF_ICMPGT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_icmpcc(cd, X86_64_CC_G, src, iptr);
- break;
-
- case ICMD_IF_LCMPGT: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_lcmpcc(cd, X86_64_CC_G, src, iptr);
- break;
-
- case ICMD_IF_ICMPLE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_icmpcc(cd, X86_64_CC_LE, src, iptr);
- break;
-
- case ICMD_IF_LCMPLE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_lcmpcc(cd, X86_64_CC_LE, src, iptr);
- break;
-
- case ICMD_IF_ICMPGE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_icmpcc(cd, X86_64_CC_GE, src, iptr);
- break;
-
- case ICMD_IF_LCMPGE: /* ..., value, value ==> ... */
- /* op1 = target JavaVM pc */
-
- x86_64_emit_if_lcmpcc(cd, X86_64_CC_GE, src, iptr);
- break;
-
- /* (value xx 0) ? IFxx_ICONST : ELSE_ICONST */
-
- case ICMD_ELSE_ICONST: /* handled by IFxx_ICONST */
- break;
-
- case ICMD_IFEQ_ICONST: /* ..., value ==> ..., constant */
- case ICMD_IFNE_ICONST: /* val.i = constant */
- case ICMD_IFLT_ICONST:
- case ICMD_IFGE_ICONST:
- case ICMD_IFGT_ICONST:
- case ICMD_IFLE_ICONST:
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
- if (iptr[1].opc == ICMD_ELSE_ICONST) {
- if (s1 == d) {
- M_INTMOVE(s1, REG_ITMP1);
- s1 = REG_ITMP1;
- }
- if (iptr[1].val.i == 0)
- M_CLR(d);
- else
- M_IMOV_IMM(iptr[1].val.i, d);
- }
- if (iptr->val.i == 0)
- M_CLR(REG_ITMP2);
- else
- M_IMOV_IMM(iptr->val.i, REG_ITMP2);
- M_ITEST(s1);
-
- switch (iptr->opc) {
- case ICMD_IFEQ_ICONST:
- M_CMOVEQ(REG_ITMP2, d);
- break;
- case ICMD_IFNE_ICONST:
- M_CMOVNE(REG_ITMP2, d);
- break;
- case ICMD_IFLT_ICONST:
- M_CMOVLT(REG_ITMP2, d);
- break;
- case ICMD_IFGE_ICONST:
- M_CMOVGE(REG_ITMP2, d);
- break;
- case ICMD_IFGT_ICONST:
- M_CMOVGT(REG_ITMP2, d);
- break;
- case ICMD_IFLE_ICONST:
- M_CMOVLE(REG_ITMP2, d);
- break;
- }
-
- store_reg_to_var_int(iptr->dst, d);
- break;
-
-
- case ICMD_IRETURN: /* ..., retvalue ==> ... */
- case ICMD_LRETURN:
-
- var_to_reg_int(s1, src, REG_RESULT);
- M_INTMOVE(s1, REG_RESULT);
- goto nowperformreturn;
-
- case ICMD_ARETURN: /* ..., retvalue ==> ... */
-
- var_to_reg_int(s1, src, REG_RESULT);
- M_INTMOVE(s1, REG_RESULT);
-
-#ifdef ENABLE_VERIFIER
- if (iptr->val.a) {
- PROFILE_CYCLE_STOP;
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_athrow_areturn,
- (unresolved_class *) iptr->val.a, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- PROFILE_CYCLE_START;
- }
-#endif /* ENABLE_VERIFIER */
- goto nowperformreturn;
-
- case ICMD_FRETURN: /* ..., retvalue ==> ... */
- case ICMD_DRETURN:
-
- var_to_reg_flt(s1, src, REG_FRESULT);
- M_FLTMOVE(s1, REG_FRESULT);
- goto nowperformreturn;
-
- case ICMD_RETURN: /* ... ==> ... */
-
-nowperformreturn:
- {
- s4 i, p;
-
- p = parentargs_base;
-
-#if !defined(NDEBUG)
- /* generate call trace */
-
- if (opt_verbosecall) {
- x86_64_alu_imm_reg(cd, X86_64_SUB, 2 * 8, REG_SP);
-
- x86_64_mov_reg_membase(cd, REG_RESULT, REG_SP, 0 * 8);
- x86_64_movq_reg_membase(cd, REG_FRESULT, REG_SP, 1 * 8);
-
- x86_64_mov_imm_reg(cd, (u8) m, rd->argintregs[0]);
- x86_64_mov_reg_reg(cd, REG_RESULT, rd->argintregs[1]);
- M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
- M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
-
- M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
- M_CALL(REG_ITMP1);
-
- x86_64_mov_membase_reg(cd, REG_SP, 0 * 8, REG_RESULT);
- x86_64_movq_membase_reg(cd, REG_SP, 1 * 8, REG_FRESULT);
-
- x86_64_alu_imm_reg(cd, X86_64_ADD, 2 * 8, REG_SP);
- }
-#endif /* !defined(NDEBUG) */
-
-#if defined(USE_THREADS)
- if (checksync && (m->flags & ACC_SYNCHRONIZED)) {
- M_ALD(rd->argintregs[0], REG_SP, rd->memuse * 8);
-
- /* we need to save the proper return value */
- switch (iptr->opc) {
- case ICMD_IRETURN:
- case ICMD_ARETURN:
- case ICMD_LRETURN:
- M_LST(REG_RESULT, REG_SP, rd->memuse * 8);
- break;
- case ICMD_FRETURN:
- case ICMD_DRETURN:
- M_DST(REG_FRESULT, REG_SP, rd->memuse * 8);
- break;
- }
-
- M_MOV_IMM(builtin_monitorexit, REG_ITMP1);
- M_CALL(REG_ITMP1);
-
- /* and now restore the proper return value */
- switch (iptr->opc) {
- case ICMD_IRETURN:
- case ICMD_ARETURN:
- case ICMD_LRETURN:
- M_LLD(REG_RESULT, REG_SP, rd->memuse * 8);
- break;
- case ICMD_FRETURN:
- case ICMD_DRETURN:
- M_DLD(REG_FRESULT, REG_SP, rd->memuse * 8);
- break;
- }
- }
-#endif
-
- /* restore saved registers */
-
- for (i = INT_SAV_CNT - 1; i >= rd->savintreguse; i--) {
- p--; M_LLD(rd->savintregs[i], REG_SP, p * 8);
- }
- for (i = FLT_SAV_CNT - 1; i >= rd->savfltreguse; i--) {
- p--; M_DLD(rd->savfltregs[i], REG_SP, p * 8);
- }
-
- /* deallocate stack */
-
- if (parentargs_base)
- M_AADD_IMM(parentargs_base * 8, REG_SP);
-
- /* generate method profiling code */
-
- PROFILE_CYCLE_STOP;
-
- M_RET;
- }
- break;
-
-
- case ICMD_TABLESWITCH: /* ..., index ==> ... */
- {
- s4 i, l, *s4ptr;
- void **tptr;
-
- tptr = (void **) iptr->target;
-
- s4ptr = iptr->val.a;
- l = s4ptr[1]; /* low */
- i = s4ptr[2]; /* high */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- M_INTMOVE(s1, REG_ITMP1);
- if (l != 0) {
- x86_64_alul_imm_reg(cd, X86_64_SUB, l, REG_ITMP1);
- }
- i = i - l + 1;
-
- /* range check */
- x86_64_alul_imm_reg(cd, X86_64_CMP, i - 1, REG_ITMP1);
- x86_64_jcc(cd, X86_64_CC_A, 0);
-
- /* codegen_addreference(cd, BlockPtrOfPC(s4ptr[0]), cd->mcodeptr); */
- codegen_addreference(cd, (basicblock *) tptr[0], cd->mcodeptr);
-
- /* build jump table top down and use address of lowest entry */
-
- /* s4ptr += 3 + i; */
- tptr += i;
-
- while (--i >= 0) {
- dseg_addtarget(cd, (basicblock *) tptr[0]);
- --tptr;
- }
-
- /* length of dataseg after last dseg_addtarget is used by load */
-
- x86_64_mov_imm_reg(cd, 0, REG_ITMP2);
- dseg_adddata(cd, cd->mcodeptr);
- x86_64_mov_memindex_reg(cd, -(cd->dseglen), REG_ITMP2, REG_ITMP1, 3, REG_ITMP1);
- x86_64_jmp_reg(cd, REG_ITMP1);
- }
- break;
-
-
- case ICMD_LOOKUPSWITCH: /* ..., key ==> ... */
- {
- s4 i, l, val, *s4ptr;
- void **tptr;
-
- tptr = (void **) iptr->target;
-
- s4ptr = iptr->val.a;
- l = s4ptr[0]; /* default */
- i = s4ptr[1]; /* count */
-
- MCODECHECK(8 + ((7 + 6) * i) + 5);
- var_to_reg_int(s1, src, REG_ITMP1); /* reg compare should always be faster */
- while (--i >= 0) {
- s4ptr += 2;
- ++tptr;
-
- val = s4ptr[0];
- x86_64_alul_imm_reg(cd, X86_64_CMP, val, s1);
- x86_64_jcc(cd, X86_64_CC_E, 0);
- codegen_addreference(cd, (basicblock *) tptr[0], cd->mcodeptr);
- }
-
- x86_64_jmp_imm(cd, 0);
-
- tptr = (void **) iptr->target;
- codegen_addreference(cd, (basicblock *) tptr[0], cd->mcodeptr);
- }
- break;
-
-
- case ICMD_BUILTIN: /* ..., [arg1, [arg2 ...]] ==> ... */
- /* op1 = arg count val.a = builtintable entry */
-
- bte = iptr->val.a;
- md = bte->md;
- goto gen_method;
-
- case ICMD_INVOKESTATIC: /* ..., [arg1, [arg2 ...]] ==> ... */
- /* op1 = arg count, val.a = method pointer */
-
- case ICMD_INVOKESPECIAL:/* ..., objectref, [arg1, [arg2 ...]] ==> ... */
- case ICMD_INVOKEVIRTUAL:/* op1 = arg count, val.a = method pointer */
- case ICMD_INVOKEINTERFACE:
-
- lm = iptr->val.a;
-
- if (lm == NULL) {
- unresolved_method *um = iptr->target;
- md = um->methodref->parseddesc.md;
- } else {
- md = lm->parseddesc;
- }
-
-gen_method:
- s3 = md->paramcount;
-
- MCODECHECK((20 * s3) + 128);
-
- /* copy arguments to registers or stack location */
-
- for (s3 = s3 - 1; s3 >= 0; s3--, src = src->prev) {
- if (src->varkind == ARGVAR)
- continue;
- if (IS_INT_LNG_TYPE(src->type)) {
- if (!md->params[s3].inmemory) {
- s1 = rd->argintregs[md->params[s3].regoff];
- var_to_reg_int(d, src, s1);
- M_INTMOVE(d, s1);
- } else {
- var_to_reg_int(d, src, REG_ITMP1);
- M_LST(d, REG_SP, md->params[s3].regoff * 8);
- }
-
- } else {
- if (!md->params[s3].inmemory) {
- s1 = rd->argfltregs[md->params[s3].regoff];
- var_to_reg_flt(d, src, s1);
- M_FLTMOVE(d, s1);
- } else {
- var_to_reg_flt(d, src, REG_FTMP1);
- M_DST(d, REG_SP, md->params[s3].regoff * 8);
- }
- }
- }
-
- /* generate method profiling code */
-
- PROFILE_CYCLE_STOP;
-
- switch (iptr->opc) {
- case ICMD_BUILTIN:
- a = (ptrint) bte->fp;
- d = md->returntype.type;
-
- M_MOV_IMM(a, REG_ITMP1);
- M_CALL(REG_ITMP1);
-
- /* if op1 == true, we need to check for an exception */
-
- if (iptr->op1 == true) {
- M_TEST(REG_RESULT);
- M_BEQ(0);
- codegen_add_fillinstacktrace_ref(cd, cd->mcodeptr);
- }
- break;
-
- case ICMD_INVOKESPECIAL:
- M_TEST(rd->argintregs[0]);
- M_BEQ(0);
- codegen_add_nullpointerexception_ref(cd, cd->mcodeptr);
-
- /* first argument contains pointer */
-/* gen_nullptr_check(rd->argintregs[0]); */
-
- /* access memory for hardware nullptr */
-/* x86_64_mov_membase_reg(cd, rd->argintregs[0], 0, REG_ITMP2); */
-
- /* fall through */
-
- case ICMD_INVOKESTATIC:
- if (lm == NULL) {
- unresolved_method *um = iptr->target;
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_invokestatic_special, um, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- a = 0;
- d = um->methodref->parseddesc.md->returntype.type;
-
- } else {
- a = (ptrint) lm->stubroutine;
- d = lm->parseddesc->returntype.type;
- }
-
- M_MOV_IMM(a, REG_ITMP2);
- M_CALL(REG_ITMP2);
- break;
-
- case ICMD_INVOKEVIRTUAL:
- gen_nullptr_check(rd->argintregs[0]);
-
- if (lm == NULL) {
- unresolved_method *um = iptr->target;
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_invokevirtual, um, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- s1 = 0;
- d = um->methodref->parseddesc.md->returntype.type;
-
- } else {
- s1 = OFFSET(vftbl_t, table[0]) +
- sizeof(methodptr) * lm->vftblindex;
- d = lm->parseddesc->returntype.type;
- }
-
- x86_64_mov_membase_reg(cd, rd->argintregs[0],
- OFFSET(java_objectheader, vftbl),
- REG_ITMP2);
- x86_64_mov_membase32_reg(cd, REG_ITMP2, s1, REG_ITMP1);
- M_CALL(REG_ITMP1);
- break;
-
- case ICMD_INVOKEINTERFACE:
- gen_nullptr_check(rd->argintregs[0]);
-
- if (lm == NULL) {
- unresolved_method *um = iptr->target;
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_invokeinterface, um, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- s1 = 0;
- s2 = 0;
- d = um->methodref->parseddesc.md->returntype.type;
-
- } else {
- s1 = OFFSET(vftbl_t, interfacetable[0]) -
- sizeof(methodptr) * lm->class->index;
-
- s2 = sizeof(methodptr) * (lm - lm->class->methods);
-
- d = lm->parseddesc->returntype.type;
- }
-
- M_ALD(REG_ITMP2, rd->argintregs[0],
- OFFSET(java_objectheader, vftbl));
- x86_64_mov_membase32_reg(cd, REG_ITMP2, s1, REG_ITMP2);
- x86_64_mov_membase32_reg(cd, REG_ITMP2, s2, REG_ITMP1);
- M_CALL(REG_ITMP1);
- break;
- }
-
- /* generate method profiling code */
-
- PROFILE_CYCLE_START;
-
- /* d contains return type */
-
- if (d != TYPE_VOID) {
- if (IS_INT_LNG_TYPE(iptr->dst->type)) {
- s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
- M_INTMOVE(REG_RESULT, s1);
- store_reg_to_var_int(iptr->dst, s1);
- } else {
- s1 = reg_of_var(rd, iptr->dst, REG_FRESULT);
- M_FLTMOVE(REG_FRESULT, s1);
- store_reg_to_var_flt(iptr->dst, s1);
- }
- }
- break;
-
-
- case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
-
- /* op1: 0 == array, 1 == class */
- /* val.a: (classinfo *) superclass */
-
- /* superclass is an interface:
- *
- * OK if ((sub == NULL) ||
- * (sub->vftbl->interfacetablelength > super->index) &&
- * (sub->vftbl->interfacetable[-super->index] != NULL));
- *
- * superclass is a class:
- *
- * OK if ((sub == NULL) || (0
- * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
- * super->vftbl->diffval));
- */
-
- if (iptr->op1 == 1) {
- /* object type cast-check */
-
- classinfo *super;
- vftbl_t *supervftbl;
- s4 superindex;
-
- super = (classinfo *) iptr->val.a;
-
- if (!super) {
- superindex = 0;
- supervftbl = NULL;
-
- } else {
- superindex = super->index;
- supervftbl = super->vftbl;
- }
-
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
-#endif
- var_to_reg_int(s1, src, REG_ITMP1);
-
- /* calculate interface checkcast code size */
-
- s2 = 3; /* mov_membase_reg */
- CALCOFFSETBYTES(s2, s1, OFFSET(java_objectheader, vftbl));
-
- s2 += 3 + 4 /* movl_membase32_reg */ + 3 + 4 /* sub imm32 */ +
- 3 /* test */ + 6 /* jcc */ + 3 + 4 /* mov_membase32_reg */ +
- 3 /* test */ + 6 /* jcc */;
-
- if (!super)
- s2 += (opt_showdisassemble ? 5 : 0);
-
- /* calculate class checkcast code size */
-
- s3 = 3; /* mov_membase_reg */
- CALCOFFSETBYTES(s3, s1, OFFSET(java_objectheader, vftbl));
- s3 += 10 /* mov_imm_reg */ + 3 + 4 /* movl_membase32_reg */;
-
-#if 0
- if (s1 != REG_ITMP1) {
- a += 3; /* movl_membase_reg - only if REG_ITMP3 == R11 */
- CALCOFFSETBYTES(a, REG_ITMP3, OFFSET(vftbl_t, baseval));
- a += 3; /* movl_membase_reg - only if REG_ITMP3 == R11 */
- CALCOFFSETBYTES(a, REG_ITMP3, OFFSET(vftbl_t, diffval));
- a += 3; /* sub */
-
- } else
-#endif
- {
- s3 += 3 + 4 /* movl_membase32_reg */ + 3 /* sub */ +
- 10 /* mov_imm_reg */ + 3 /* movl_membase_reg */;
- CALCOFFSETBYTES(s3, REG_ITMP3, OFFSET(vftbl_t, diffval));
- }
-
- s3 += 3 /* cmp */ + 6 /* jcc */;
-
- if (!super)
- s3 += (opt_showdisassemble ? 5 : 0);
-
- /* if class is not resolved, check which code to call */
-
- if (!super) {
- M_TEST(s1);
- M_BEQ(6 + (opt_showdisassemble ? 5 : 0) + 7 + 6 + s2 + 5 + s3);
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_checkcast_instanceof_flags,
- (constant_classref *) iptr->target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- M_IMOV_IMM(0, REG_ITMP2); /* super->flags */
- M_IAND_IMM(ACC_INTERFACE, REG_ITMP2);
- M_BEQ(s2 + 5);
- }
-
- /* interface checkcast code */
-
- if (!super || (super->flags & ACC_INTERFACE)) {
- if (super) {
- M_TEST(s1);
- M_BEQ(s2);
- }
-
- M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
-
- if (!super) {
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_checkcast_instanceof_interface,
- (constant_classref *) iptr->target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
- }
-
- x86_64_movl_membase32_reg(cd, REG_ITMP2,
- OFFSET(vftbl_t, interfacetablelength),
- REG_ITMP3);
- /* XXX TWISTI: should this be int arithmetic? */
- M_LSUB_IMM32(superindex, REG_ITMP3);
- M_TEST(REG_ITMP3);
- M_BLE(0);
- codegen_add_classcastexception_ref(cd, cd->mcodeptr);
- x86_64_mov_membase32_reg(cd, REG_ITMP2,
- OFFSET(vftbl_t, interfacetable[0]) -
- superindex * sizeof(methodptr*),
- REG_ITMP3);
- M_TEST(REG_ITMP3);
- M_BEQ(0);
- codegen_add_classcastexception_ref(cd, cd->mcodeptr);
-
- if (!super)
- M_JMP_IMM(s3);
- }
-
- /* class checkcast code */
-
- if (!super || !(super->flags & ACC_INTERFACE)) {
- if (super) {
- M_TEST(s1);
- M_BEQ(s3);
- }
-
- M_ALD(REG_ITMP2, s1, OFFSET(java_objectheader, vftbl));
-
- if (!super) {
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_checkcast_class,
- (constant_classref *) iptr->target,
- 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
- }
-
- M_MOV_IMM(supervftbl, REG_ITMP3);
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
-#endif
- x86_64_movl_membase32_reg(cd, REG_ITMP2,
- OFFSET(vftbl_t, baseval),
- REG_ITMP2);
- /* if (s1 != REG_ITMP1) { */
- /* x86_64_movl_membase_reg(cd, REG_ITMP3, */
- /* OFFSET(vftbl_t, baseval), */
- /* REG_ITMP1); */
- /* x86_64_movl_membase_reg(cd, REG_ITMP3, */
- /* OFFSET(vftbl_t, diffval), */
- /* REG_ITMP3); */
- /* #if defined(USE_THREADS) && defined(NATIVE_THREADS) */
- /* codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase); */
- /* #endif */
- /* x86_64_alu_reg_reg(cd, X86_64_SUB, REG_ITMP1, REG_ITMP2); */
-
- /* } else { */
- x86_64_movl_membase32_reg(cd, REG_ITMP3,
- OFFSET(vftbl_t, baseval),
- REG_ITMP3);
- M_LSUB(REG_ITMP3, REG_ITMP2);
- M_MOV_IMM(supervftbl, REG_ITMP3);
- M_ILD(REG_ITMP3, REG_ITMP3, OFFSET(vftbl_t, diffval));
- /* } */
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
-#endif
- M_CMP(REG_ITMP3, REG_ITMP2);
- M_BA(0); /* (u) REG_ITMP1 > (u) REG_ITMP2 -> jump */
- codegen_add_classcastexception_ref(cd, cd->mcodeptr);
- }
- d = reg_of_var(rd, iptr->dst, REG_ITMP3);
-
- } else {
- /* array type cast-check */
-
- var_to_reg_int(s1, src, REG_ITMP1);
- M_INTMOVE(s1, rd->argintregs[0]);
-
- if (iptr->val.a == NULL) {
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_builtin_arraycheckcast,
- (constant_classref *) iptr->target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
- }
-
- M_MOV_IMM(iptr->val.a, rd->argintregs[1]);
- M_MOV_IMM(BUILTIN_arraycheckcast, REG_ITMP1);
- M_CALL(REG_ITMP1);
- M_TEST(REG_RESULT);
- M_BEQ(0);
- codegen_add_classcastexception_ref(cd, cd->mcodeptr);
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP1);
- }
- M_INTMOVE(s1, d);
- store_reg_to_var_int(iptr->dst, d);
- break;
-
- case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
-
- /* op1: 0 == array, 1 == class */
- /* val.a: (classinfo *) superclass */
-
- /* superclass is an interface:
- *
- * return (sub != NULL) &&
- * (sub->vftbl->interfacetablelength > super->index) &&
- * (sub->vftbl->interfacetable[-super->index] != NULL);
- *
- * superclass is a class:
- *
- * return ((sub != NULL) && (0
- * <= (sub->vftbl->baseval - super->vftbl->baseval) <=
- * super->vftbl->diffvall));
- */
-
- {
- classinfo *super;
- vftbl_t *supervftbl;
- s4 superindex;
-
- super = (classinfo *) iptr->val.a;
-
- if (!super) {
- superindex = 0;
- supervftbl = NULL;
-
- } else {
- superindex = super->index;
- supervftbl = super->vftbl;
- }
-
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- codegen_threadcritrestart(cd, cd->mcodeptr - cd->mcodebase);
-#endif
-
- var_to_reg_int(s1, src, REG_ITMP1);
- d = reg_of_var(rd, iptr->dst, REG_ITMP2);
- if (s1 == d) {
- M_INTMOVE(s1, REG_ITMP1);
- s1 = REG_ITMP1;
- }
-
- /* calculate interface instanceof code size */
-
- s2 = 3; /* mov_membase_reg */
- CALCOFFSETBYTES(s2, s1, OFFSET(java_objectheader, vftbl));
- s2 += 3 + 4 /* movl_membase32_reg */ + 3 + 4 /* sub_imm32 */ +
- 3 /* test */ + 6 /* jcc */ + 3 + 4 /* mov_membase32_reg */ +
- 3 /* test */ + 4 /* setcc */;
-
- if (!super)
- s2 += (opt_showdisassemble ? 5 : 0);
-
- /* calculate class instanceof code size */
-
- s3 = 3; /* mov_membase_reg */
- CALCOFFSETBYTES(s3, s1, OFFSET(java_objectheader, vftbl));
- s3 += 10; /* mov_imm_reg */
- s3 += 2; /* movl_membase_reg - only if REG_ITMP1 == RAX */
- CALCOFFSETBYTES(s3, REG_ITMP1, OFFSET(vftbl_t, baseval));
- s3 += 3; /* movl_membase_reg - only if REG_ITMP2 == R10 */
- CALCOFFSETBYTES(s3, REG_ITMP2, OFFSET(vftbl_t, baseval));
- s3 += 3; /* movl_membase_reg - only if REG_ITMP2 == R10 */
- CALCOFFSETBYTES(s3, REG_ITMP2, OFFSET(vftbl_t, diffval));
- s3 += 3 /* sub */ + 3 /* xor */ + 3 /* cmp */ + 4 /* setcc */;
-
- if (!super)
- s3 += (opt_showdisassemble ? 5 : 0);
-
- x86_64_alu_reg_reg(cd, X86_64_XOR, d, d);
-
- /* if class is not resolved, check which code to call */
-
- if (!super) {
- x86_64_test_reg_reg(cd, s1, s1);
- x86_64_jcc(cd, X86_64_CC_Z, (6 + (opt_showdisassemble ? 5 : 0) +
- 7 + 6 + s2 + 5 + s3));
-
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_checkcast_instanceof_flags,
- (constant_classref *) iptr->target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
-
- x86_64_movl_imm_reg(cd, 0, REG_ITMP3); /* super->flags */
- x86_64_alul_imm_reg(cd, X86_64_AND, ACC_INTERFACE, REG_ITMP3);
- x86_64_jcc(cd, X86_64_CC_Z, s2 + 5);
- }
-
- /* interface instanceof code */
-
- if (!super || (super->flags & ACC_INTERFACE)) {
- if (super) {
- x86_64_test_reg_reg(cd, s1, s1);
- x86_64_jcc(cd, X86_64_CC_Z, s2);
- }
-
- x86_64_mov_membase_reg(cd, s1,
- OFFSET(java_objectheader, vftbl),
- REG_ITMP1);
- if (!super) {
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_checkcast_instanceof_interface,
- (constant_classref *) iptr->target, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
- }
-
- x86_64_movl_membase32_reg(cd, REG_ITMP1,
- OFFSET(vftbl_t, interfacetablelength),
- REG_ITMP3);
- x86_64_alu_imm32_reg(cd, X86_64_SUB, superindex, REG_ITMP3);
- x86_64_test_reg_reg(cd, REG_ITMP3, REG_ITMP3);
-
- a = 3 + 4 /* mov_membase32_reg */ + 3 /* test */ + 4 /* setcc */;
-
- x86_64_jcc(cd, X86_64_CC_LE, a);
- x86_64_mov_membase32_reg(cd, REG_ITMP1,
- OFFSET(vftbl_t, interfacetable[0]) -
- superindex * sizeof(methodptr*),
- REG_ITMP1);
- x86_64_test_reg_reg(cd, REG_ITMP1, REG_ITMP1);
- x86_64_setcc_reg(cd, X86_64_CC_NE, d);
-
- if (!super)
- x86_64_jmp_imm(cd, s3);
- }
-
- /* class instanceof code */
-
- if (!super || !(super->flags & ACC_INTERFACE)) {
- if (super) {
- x86_64_test_reg_reg(cd, s1, s1);
- x86_64_jcc(cd, X86_64_CC_E, s3);
- }
-
- x86_64_mov_membase_reg(cd, s1,
- OFFSET(java_objectheader, vftbl),
- REG_ITMP1);
+ case ICMD_BUILTIN:
+ bte = iptr->sx.s23.s3.bte;
+ if (bte->stub == NULL) {
+ M_MOV_IMM(bte->fp, REG_ITMP1);
+ }
+ else {
+ M_MOV_IMM(bte->stub, REG_ITMP1);
+ }
+ M_CALL(REG_ITMP1);
+ break;
- if (!super) {
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_instanceof_class,
- (constant_classref *) iptr->target, 0);
+ case ICMD_INVOKESPECIAL:
+ emit_nullpointer_check(cd, iptr, REG_A0);
+ /* fall through */
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
- }
+ case ICMD_INVOKESTATIC:
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ um = iptr->sx.s23.s3.um;
+ disp = dseg_add_unique_address(cd, um);
- x86_64_mov_imm_reg(cd, (ptrint) supervftbl, REG_ITMP2);
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- codegen_threadcritstart(cd, cd->mcodeptr - cd->mcodebase);
-#endif
- x86_64_movl_membase_reg(cd, REG_ITMP1,
- OFFSET(vftbl_t, baseval),
- REG_ITMP1);
- x86_64_movl_membase_reg(cd, REG_ITMP2,
- OFFSET(vftbl_t, diffval),
- REG_ITMP3);
- x86_64_movl_membase_reg(cd, REG_ITMP2,
- OFFSET(vftbl_t, baseval),
- REG_ITMP2);
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- codegen_threadcritstop(cd, cd->mcodeptr - cd->mcodebase);
-#endif
- x86_64_alu_reg_reg(cd, X86_64_SUB, REG_ITMP2, REG_ITMP1);
- x86_64_alu_reg_reg(cd, X86_64_XOR, d, d); /* may be REG_ITMP2 */
- x86_64_alu_reg_reg(cd, X86_64_CMP, REG_ITMP3, REG_ITMP1);
- x86_64_setcc_reg(cd, X86_64_CC_BE, d);
+ patcher_add_patch_ref(jd, PATCHER_invokestatic_special,
+ um, disp);
}
- store_reg_to_var_int(iptr->dst, d);
+ else {
+ lm = iptr->sx.s23.s3.fmiref->p.method;
+ disp = dseg_add_functionptr(cd, lm->stubroutine);
}
+
+ M_ALD(REG_ITMP2, RIP, disp);
+ M_CALL(REG_ITMP2);
break;
- case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
- /* op1 = dimension, val.a = class */
+ case ICMD_INVOKEVIRTUAL:
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ um = iptr->sx.s23.s3.um;
+ patcher_add_patch_ref(jd, PATCHER_invokevirtual, um, 0);
- /* check for negative sizes and copy sizes to stack if necessary */
+ s1 = 0;
+ }
+ else {
+ lm = iptr->sx.s23.s3.fmiref->p.method;
+ s1 = OFFSET(vftbl_t, table[0]) +
+ sizeof(methodptr) * lm->vftblindex;
+ }
- MCODECHECK((10 * 4 * iptr->op1) + 5 + 10 * 8);
+ /* implicit null-pointer check */
+ M_ALD(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
+ M_ALD32(REG_ITMP3, REG_METHODPTR, s1);
+ M_CALL(REG_ITMP3);
+ break;
- for (s1 = iptr->op1; --s1 >= 0; src = src->prev) {
- /* copy SAVEDVAR sizes to stack */
+ case ICMD_INVOKEINTERFACE:
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ um = iptr->sx.s23.s3.um;
+ patcher_add_patch_ref(jd, PATCHER_invokeinterface, um, 0);
- if (src->varkind != ARGVAR) {
- var_to_reg_int(s2, src, REG_ITMP1);
- M_LST(s2, REG_SP, s1 * 8);
- }
+ s1 = 0;
+ s2 = 0;
}
+ else {
+ lm = iptr->sx.s23.s3.fmiref->p.method;
+ s1 = OFFSET(vftbl_t, interfacetable[0]) -
+ sizeof(methodptr) * lm->clazz->index;
- /* is a patcher function set? */
+ s2 = sizeof(methodptr) * (lm - lm->clazz->methods);
+ }
- if (iptr->val.a == NULL) {
- codegen_addpatchref(cd, cd->mcodeptr,
- PATCHER_builtin_multianewarray,
- (constant_classref *) iptr->target, 0);
+ /* implicit null-pointer check */
+ M_ALD(REG_METHODPTR, REG_A0, OFFSET(java_object_t, vftbl));
+ M_ALD32(REG_METHODPTR, REG_METHODPTR, s1);
+ M_ALD32(REG_ITMP3, REG_METHODPTR, s2);
+ M_CALL(REG_ITMP3);
+ break;
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
+ case ICMD_CHECKCAST: /* ..., objectref ==> ..., objectref */
- a = 0;
+ if (!(iptr->flags.bits & INS_FLAG_ARRAY)) {
+ /* object type cast-check */
- } else {
- a = (ptrint) iptr->val.a;
- }
+ classinfo *super;
+ s4 superindex;
- /* a0 = dimension count */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ super = NULL;
+ superindex = 0;
+ }
+ else {
+ super = iptr->sx.s23.s3.c.cls;
+ superindex = super->index;
+ }
- M_MOV_IMM(iptr->op1, rd->argintregs[0]);
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
- /* a1 = arrayvftbl */
+ /* if class is not resolved, check which code to call */
- M_MOV_IMM(iptr->val.a, rd->argintregs[1]);
+ if (super == NULL) {
+ M_TEST(s1);
+ emit_label_beq(cd, BRANCH_LABEL_1);
- /* a2 = pointer to dimensions = stack pointer */
+ patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
+ iptr->sx.s23.s3.c.ref, 0);
- M_MOV(REG_SP, rd->argintregs[2]);
+ M_IMOV_IMM(0, REG_ITMP2); /* super->flags */
+ M_IAND_IMM(ACC_INTERFACE, REG_ITMP2);
+ emit_label_beq(cd, BRANCH_LABEL_2);
+ }
- M_MOV_IMM(BUILTIN_multianewarray, REG_ITMP1);
- M_CALL(REG_ITMP1);
+ /* interface checkcast code */
- /* check for exception before result assignment */
+ if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
+ if (super != NULL) {
+ M_TEST(s1);
+ emit_label_beq(cd, BRANCH_LABEL_3);
+ }
- M_TEST(REG_RESULT);
- M_BEQ(0);
- codegen_add_fillinstacktrace_ref(cd, cd->mcodeptr);
+ M_ALD(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
- s1 = reg_of_var(rd, iptr->dst, REG_RESULT);
- M_INTMOVE(REG_RESULT, s1);
- store_reg_to_var_int(iptr->dst, s1);
- break;
+ if (super == NULL) {
+ patcher_add_patch_ref(jd, PATCHER_checkcast_interface,
+ iptr->sx.s23.s3.c.ref,
+ 0);
+ }
- default:
- *exceptionptr = new_internalerror("Unknown ICMD %d", iptr->opc);
- return false;
- } /* switch */
+ M_ILD32(REG_ITMP3,
+ REG_ITMP2, OFFSET(vftbl_t, interfacetablelength));
+ M_ICMP_IMM32(superindex, REG_ITMP3);
+ emit_classcast_check(cd, iptr, BRANCH_LE, REG_ITMP3, s1);
- } /* for instruction */
-
- /* copy values to interface registers */
+ M_ALD32(REG_ITMP3, REG_ITMP2,
+ OFFSET(vftbl_t, interfacetable[0]) -
+ superindex * sizeof(methodptr*));
+ M_TEST(REG_ITMP3);
+ emit_classcast_check(cd, iptr, BRANCH_EQ, REG_ITMP3, s1);
- src = bptr->outstack;
- len = bptr->outdepth;
- MCODECHECK(512);
-#if defined(ENABLE_LSRA)
- if (!opt_lsra)
-#endif
- while (src) {
- len--;
- if ((src->varkind != STACKVAR)) {
- s2 = src->type;
- if (IS_FLT_DBL_TYPE(s2)) {
- var_to_reg_flt(s1, src, REG_FTMP1);
- if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
- M_FLTMOVE(s1, rd->interfaces[len][s2].regoff);
-
- } else {
- x86_64_movq_reg_membase(cd, s1, REG_SP, rd->interfaces[len][s2].regoff * 8);
+ if (super == NULL)
+ emit_label_br(cd, BRANCH_LABEL_4);
+ else
+ emit_label(cd, BRANCH_LABEL_3);
}
- } else {
- var_to_reg_int(s1, src, REG_ITMP1);
- if (!(rd->interfaces[len][s2].flags & INMEMORY)) {
- M_INTMOVE(s1, rd->interfaces[len][s2].regoff);
+ /* class checkcast code */
- } else {
- x86_64_mov_reg_membase(cd, s1, REG_SP, rd->interfaces[len][s2].regoff * 8);
- }
- }
- }
- src = src->prev;
- }
+ if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
+ if (super == NULL) {
+ emit_label(cd, BRANCH_LABEL_2);
- /* At the end of a basic block we may have to append some nops,
- because the patcher stub calling code might be longer than the
- actual instruction. So codepatching does not change the
- following block unintentionally. */
+ constant_classref *cr = iptr->sx.s23.s3.c.ref;
+ disp = dseg_add_unique_address(cd, cr);
- if (cd->mcodeptr < cd->lastmcodeptr) {
- while (cd->mcodeptr < cd->lastmcodeptr) {
- M_NOP;
- }
- }
+ patcher_add_patch_ref(jd,
+ PATCHER_resolve_classref_to_vftbl,
+ cr, disp);
+ }
+ else {
+ M_TEST(s1);
+ emit_label_beq(cd, BRANCH_LABEL_5);
- } /* if (bptr -> flags >= BBREACHED) */
- } /* for basic block */
+ disp = dseg_add_address(cd, super->vftbl);
+ }
- dseg_createlinenumbertable(cd);
+ M_ALD(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
+ M_ALD(REG_ITMP3, RIP, disp);
+ if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
+ M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
+ M_LCMP_MEMINDEX(REG_ITMP2, 0, REG_ITMP1, 0, REG_ITMP3);
+ emit_label_beq(cd, BRANCH_LABEL_6); /* good */
- /* generate exception and patcher stubs */
+ if (super == NULL) {
+ M_LCMP_IMM(OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]), REG_ITMP1);
+ emit_label_bne(cd, BRANCH_LABEL_10); /* throw */
+ }
- {
- exceptionref *eref;
- patchref *pref;
- ptrint mcode;
- u1 *savedmcodeptr;
- u1 *tmpmcodeptr;
+ M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
+ M_ICMP_MEMBASE(REG_ITMP2, OFFSET(vftbl_t, subtype_depth), REG_ITMP1);
+ emit_label_bgt(cd, BRANCH_LABEL_9); /* throw */
- savedmcodeptr = NULL;
+ M_ALD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
+ M_LCMP_MEMINDEX(REG_ITMP2, -8*DISPLAY_SIZE, REG_ITMP1, 3, REG_ITMP3);
+ emit_label_beq(cd, BRANCH_LABEL_7); /* good */
- /* generate exception stubs */
-
- for (eref = cd->exceptionrefs; eref != NULL; eref = eref->next) {
- gen_resolvebranch(cd->mcodebase + eref->branchpos,
- eref->branchpos,
- cd->mcodeptr - cd->mcodebase);
+ emit_label(cd, BRANCH_LABEL_9);
+ if (super == NULL)
+ emit_label(cd, BRANCH_LABEL_10);
- MCODECHECK(512);
+ /* reload s1, might have been destroyed */
+ emit_load_s1(jd, iptr, REG_ITMP1);
+ M_ALD_MEM(s1, TRAP_ClassCastException);
- /* Check if the exception is an
- ArrayIndexOutOfBoundsException. If so, move index register
- into REG_ITMP1. */
+ emit_label(cd, BRANCH_LABEL_7);
+ emit_label(cd, BRANCH_LABEL_6);
+ /* reload s1, might have been destroyed */
+ emit_load_s1(jd, iptr, REG_ITMP1);
+ }
+ else {
+ M_LCMP_MEMBASE(REG_ITMP2, super->vftbl->subtype_offset, REG_ITMP3);
+ emit_classcast_check(cd, iptr, BRANCH_NE, REG_ITMP3, s1);
+ }
- if (eref->reg != -1)
- M_MOV(eref->reg, REG_ITMP1);
+ if (super != NULL)
+ emit_label(cd, BRANCH_LABEL_5);
+ }
- /* calcuate exception address */
+ if (super == NULL) {
+ emit_label(cd, BRANCH_LABEL_1);
+ emit_label(cd, BRANCH_LABEL_4);
+ }
- M_MOV_IMM(0, REG_ITMP2_XPC);
- dseg_adddata(cd, cd->mcodeptr);
- M_AADD_IMM32(eref->branchpos - 6, REG_ITMP2_XPC);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP3);
+ }
+ else {
+ /* array type cast-check */
- /* move function to call into REG_ITMP3 */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP2);
+ M_INTMOVE(s1, REG_A0);
- M_MOV_IMM(eref->function, REG_ITMP3);
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ constant_classref *cr = iptr->sx.s23.s3.c.ref;
+ disp = dseg_add_unique_address(cd, cr);
- if (savedmcodeptr != NULL) {
- M_JMP_IMM(savedmcodeptr - cd->mcodeptr - 5);
-
- } else {
- savedmcodeptr = cd->mcodeptr;
+ patcher_add_patch_ref(jd,
+ PATCHER_resolve_classref_to_classinfo,
+ cr, disp);
+ }
+ else {
+ disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
+ }
- x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase), rd->argintregs[0]);
- M_MOV(REG_SP, rd->argintregs[1]);
- M_ALD(rd->argintregs[2], REG_SP, parentargs_base * 8);
- M_MOV(REG_ITMP2_XPC, rd->argintregs[3]);
- M_MOV(REG_ITMP1, rd->argintregs[4]); /* for AIOOBE */
+ M_ALD(REG_A1, RIP, disp);
+ M_MOV_IMM(BUILTIN_arraycheckcast, REG_ITMP1);
+ M_CALL(REG_ITMP1);
- M_ASUB_IMM(2 * 8, REG_SP);
- M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
+ /* s1 may have been destroyed over the function call */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP2);
+ M_TEST(REG_RESULT);
+ emit_classcast_check(cd, iptr, BRANCH_EQ, REG_RESULT, s1);
- M_CALL(REG_ITMP3);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
+ }
- M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
- M_AADD_IMM(2 * 8, REG_SP);
+ M_INTMOVE(s1, d);
+ emit_store_dst(jd, iptr, d);
+ break;
- M_MOV_IMM(asm_handle_exception, REG_ITMP3);
- M_JMP(REG_ITMP3);
- }
- }
+ case ICMD_INSTANCEOF: /* ..., objectref ==> ..., intresult */
+ {
+ classinfo *super;
+ s4 superindex;
- /* generate code patching stub call code */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ super = NULL;
+ superindex = 0;
+ }
+ else {
+ super = iptr->sx.s23.s3.c.cls;
+ superindex = super->index;
+ }
- for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
- /* check size of code segment */
+ s1 = emit_load_s1(jd, iptr, REG_ITMP1);
+ d = codegen_reg_of_dst(jd, iptr, REG_ITMP2);
- MCODECHECK(512);
+ if (s1 == d) {
+ M_INTMOVE(s1, REG_ITMP1);
+ s1 = REG_ITMP1;
+ }
- /* Get machine code which is patched back in later. A
- `call rel32' is 5 bytes long (but read 8 bytes). */
+ M_CLR(d);
- savedmcodeptr = cd->mcodebase + pref->branchpos;
- mcode = *((ptrint *) savedmcodeptr);
+ /* if class is not resolved, check which code to call */
- /* patch in `call rel32' to call the following code */
+ if (super == NULL) {
+ M_TEST(s1);
+ emit_label_beq(cd, BRANCH_LABEL_1);
- tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
- cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
+ patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_flags,
+ iptr->sx.s23.s3.c.ref, 0);
- M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
+ M_IMOV_IMM(0, REG_ITMP3); /* super->flags */
+ M_IAND_IMM(ACC_INTERFACE, REG_ITMP3);
+ emit_label_beq(cd, BRANCH_LABEL_2);
+ }
- cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
+ /* interface instanceof code */
- /* move pointer to java_objectheader onto stack */
+ if ((super == NULL) || (super->flags & ACC_INTERFACE)) {
+ if (super != NULL) {
+ M_TEST(s1);
+ emit_label_beq(cd, BRANCH_LABEL_3);
+ }
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- /* create a virtual java_objectheader */
+ M_ALD(REG_ITMP1, s1, OFFSET(java_object_t, vftbl));
- (void) dseg_addaddress(cd, get_dummyLR()); /* monitorPtr */
- a = dseg_addaddress(cd, NULL); /* vftbl */
+ if (super == NULL) {
+ patcher_add_patch_ref(jd, PATCHER_instanceof_interface,
+ iptr->sx.s23.s3.c.ref, 0);
+ }
- x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + a, REG_ITMP3);
- M_PUSH(REG_ITMP3);
-#else
- M_PUSH_IMM(0);
-#endif
+ M_ILD32(REG_ITMP3,
+ REG_ITMP1, OFFSET(vftbl_t, interfacetablelength));
+ M_ICMP_IMM32(superindex, REG_ITMP3);
- /* move machine code bytes and classinfo pointer into registers */
+ int a = 3 + 4 /* mov_membase32_reg */ + 3 /* test */ + 4 /* setcc */;
- M_MOV_IMM(mcode, REG_ITMP3);
- M_PUSH(REG_ITMP3);
- M_MOV_IMM(pref->ref, REG_ITMP3);
- M_PUSH(REG_ITMP3);
- M_MOV_IMM(pref->disp, REG_ITMP3);
- M_PUSH(REG_ITMP3);
+ M_BLE(a);
+ M_ALD32(REG_ITMP1, REG_ITMP1,
+ OFFSET(vftbl_t, interfacetable[0]) -
+ superindex * sizeof(methodptr*));
+ M_TEST(REG_ITMP1);
+ M_SETNE(d);
- M_MOV_IMM(pref->patcher, REG_ITMP3);
- M_PUSH(REG_ITMP3);
+ if (super == NULL)
+ emit_label_br(cd, BRANCH_LABEL_4);
+ else
+ emit_label(cd, BRANCH_LABEL_3);
+ }
- M_MOV_IMM(asm_wrapper_patcher, REG_ITMP3);
- M_JMP(REG_ITMP3);
- }
- }
+ /* class instanceof code */
- /* generate replacement-out stubs */
+ if ((super == NULL) || !(super->flags & ACC_INTERFACE)) {
+ if (super == NULL) {
+ emit_label(cd, BRANCH_LABEL_2);
- {
- int i;
+ constant_classref *cr = iptr->sx.s23.s3.c.ref;
+ disp = dseg_add_unique_address(cd, cr);
- replacementpoint = cd->code->rplpoints;
- for (i=0; i<cd->code->rplpointcount; ++i, ++replacementpoint) {
- /* check code segment size */
+ patcher_add_patch_ref(jd,
+ PATCHER_resolve_classref_to_vftbl,
+ cr, disp);
+ }
+ else {
+ M_TEST(s1);
+ emit_label_beq(cd, BRANCH_LABEL_5);
- MCODECHECK(512);
+ disp = dseg_add_address(cd, super->vftbl);
+ }
- /* note start of stub code */
+ M_ALD(REG_ITMP2, s1, OFFSET(java_object_t, vftbl));
+ M_ALD(REG_ITMP3, RIP, disp);
- replacementpoint->outcode = (u1*) (ptrint)(cd->mcodeptr - cd->mcodebase);
+ if (super == NULL || super->vftbl->subtype_depth >= DISPLAY_SIZE) {
+ M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_offset));
+ M_LCMP_MEMINDEX(REG_ITMP2, 0, REG_ITMP1, 0, REG_ITMP3);
+ emit_label_bne(cd, BRANCH_LABEL_8); /* jump over INC/SETE */
+ if (d == REG_ITMP2) {
+ M_SETE(d);
+ M_BSEXT(d, d);
+ } else
+ M_LINC(d);
+ emit_label_br(cd, BRANCH_LABEL_6); /* true */
+ emit_label(cd, BRANCH_LABEL_8);
- /* make machine code for patching */
+ if (super == NULL) {
+ M_LCMP_IMM(OFFSET(vftbl_t, subtype_display[DISPLAY_SIZE]), REG_ITMP1);
+ emit_label_bne(cd, BRANCH_LABEL_10); /* false */
+ }
- disp = (ptrint)(replacementpoint->outcode - replacementpoint->pc) - 5;
- replacementpoint->mcode = 0xe9 | ((u8)disp << 8);
+ M_ILD(REG_ITMP1, REG_ITMP3, OFFSET(vftbl_t, subtype_depth));
+ M_ICMP_MEMBASE(REG_ITMP2, OFFSET(vftbl_t, subtype_depth), REG_ITMP1);
+ emit_label_bgt(cd, BRANCH_LABEL_9); /* false */
- /* push address of `rplpoint` struct */
-
- M_MOV_IMM(replacementpoint, REG_ITMP3);
- M_PUSH(REG_ITMP3);
+ M_ALD(REG_ITMP2, REG_ITMP2, OFFSET(vftbl_t, subtype_overflow));
+ M_LCMP_MEMINDEX(REG_ITMP2, -8*DISPLAY_SIZE, REG_ITMP1, 3, REG_ITMP3);
+ M_SETE(d);
+ if (d == REG_ITMP2) {
+ M_BSEXT(d, d);
- /* jump to replacement function */
+ emit_label_br(cd, BRANCH_LABEL_7); /* jump over M_CLR */
+ }
- M_MOV_IMM(asm_replacement_out, REG_ITMP3);
- M_JMP(REG_ITMP3);
- }
- }
-
- codegen_finish(m, cd, (s4) ((u1 *) cd->mcodeptr - cd->mcodebase));
+ emit_label(cd, BRANCH_LABEL_9);
+ if (super == NULL)
+ emit_label(cd, BRANCH_LABEL_10);
+ if (d == REG_ITMP2) {
+ M_CLR(d);
- /* everything's ok */
+ emit_label(cd, BRANCH_LABEL_7);
+ }
+ emit_label(cd, BRANCH_LABEL_6);
+ }
+ else {
+ M_LCMP_MEMBASE(REG_ITMP2, super->vftbl->subtype_offset, REG_ITMP3);
+ M_SETE(d);
+ if (d == REG_ITMP2)
+ M_BSEXT(d, d);
+ }
- return true;
-}
+ if (super != NULL)
+ emit_label(cd, BRANCH_LABEL_5);
+ }
+ if (super == NULL) {
+ emit_label(cd, BRANCH_LABEL_1);
+ emit_label(cd, BRANCH_LABEL_4);
+ }
-/* createcompilerstub **********************************************************
+ emit_store_dst(jd, iptr, d);
+ }
+ break;
- Creates a stub routine which calls the compiler.
-
-*******************************************************************************/
+ case ICMD_MULTIANEWARRAY:/* ..., cnt1, [cnt2, ...] ==> ..., arrayref */
-#define COMPILERSTUB_DATASIZE 2 * SIZEOF_VOID_P
-#define COMPILERSTUB_CODESIZE 7 + 7 + 3
+ /* check for negative sizes and copy sizes to stack if necessary */
-#define COMPILERSTUB_SIZE COMPILERSTUB_DATASIZE + COMPILERSTUB_CODESIZE
+ MCODECHECK((10 * 4 * iptr->s1.argcount) + 5 + 10 * 8);
+ for (s1 = iptr->s1.argcount; --s1 >= 0; ) {
-u1 *createcompilerstub(methodinfo *m)
-{
- u1 *s; /* memory to hold the stub */
- ptrint *d;
- codegendata *cd;
- s4 dumpsize;
+ /* copy SAVEDVAR sizes to stack */
+ var = VAR(iptr->sx.s23.s2.args[s1]);
+
+ /* Already Preallocated? */
+ if (!(var->flags & PREALLOC)) {
+ s2 = emit_load(jd, iptr, var, REG_ITMP1);
+ M_LST(s2, REG_SP, s1 * 8);
+ }
+ }
- s = CNEW(u1, COMPILERSTUB_SIZE);
+ /* a0 = dimension count */
- /* set data pointer and code pointer */
+ M_MOV_IMM(iptr->s1.argcount, REG_A0);
- d = (ptrint *) s;
- s = s + COMPILERSTUB_DATASIZE;
+ /* is a patcher function set? */
- /* mark start of dump memory area */
+ if (INSTRUCTION_IS_UNRESOLVED(iptr)) {
+ constant_classref *cr = iptr->sx.s23.s3.c.ref;
+ disp = dseg_add_unique_address(cd, cr);
- dumpsize = dump_size();
+ patcher_add_patch_ref(jd, PATCHER_resolve_classref_to_classinfo,
+ cr, disp);
+ }
+ else {
+ disp = dseg_add_address(cd, iptr->sx.s23.s3.c.cls);
+ }
- cd = DNEW(codegendata);
- cd->mcodeptr = s;
+ /* a1 = classinfo */
- /* Store the methodinfo* in the same place as in the methodheader
- for compiled methods. */
+ M_ALD(REG_A1, RIP, disp);
- d[0] = (ptrint) asm_call_jit_compiler;
- d[1] = (ptrint) m;
+ /* a2 = pointer to dimensions = stack pointer */
- /* code for the stub */
+ M_MOV(REG_SP, REG_A2);
- M_ALD(REG_ITMP1, RIP, -(7 * 1 + 1 * SIZEOF_VOID_P)); /* methodinfo */
- M_ALD(REG_ITMP3, RIP, -(7 * 2 + 2 * SIZEOF_VOID_P)); /* compiler pointer */
- M_JMP(REG_ITMP3);
+ M_MOV_IMM(BUILTIN_multianewarray, REG_ITMP1);
+ M_CALL(REG_ITMP1);
-#if defined(ENABLE_STATISTICS)
- if (opt_stat)
- count_cstub_len += COMPILERSTUB_SIZE;
-#endif
+ /* check for exception before result assignment */
- /* release dump area */
+ emit_exception_check(cd, iptr);
- dump_release(dumpsize);
+ s1 = codegen_reg_of_dst(jd, iptr, REG_RESULT);
+ M_INTMOVE(REG_RESULT, s1);
+ emit_store_dst(jd, iptr, s1);
+ break;
- return s;
+ default:
+ vm_abort("Unknown ICMD %d during code generation", iptr->opc);
+ } /* switch */
}
-/* createnativestub ************************************************************
+/* codegen_emit_stub_native ****************************************************
- Creates a stub routine which calls a native method.
+ Emits a stub routine which calls a native method.
*******************************************************************************/
-u1 *createnativestub(functionptr f, methodinfo *m, codegendata *cd,
- registerdata *rd, methoddesc *nmd)
+void codegen_emit_stub_native(jitdata *jd, methoddesc *nmd, functionptr f, int skipparams)
{
- methoddesc *md;
- s4 stackframesize; /* size of stackframe if needed */
- s4 nativeparams;
- s4 i, j; /* count variables */
- s4 t;
- s4 s1, s2;
+ methodinfo *m;
+ codeinfo *code;
+ codegendata *cd;
+ methoddesc *md;
+ int i, j;
+ int s1, s2;
+ int disp;
+
+ /* Sanity check. */
+
+ assert(f != NULL);
+
+ /* Get required compiler data. */
+
+ m = jd->m;
+ code = jd->code;
+ cd = jd->cd;
/* initialize variables */
md = m->parseddesc;
- nativeparams = (m->flags & ACC_STATIC) ? 2 : 1;
/* calculate stack frame size */
- stackframesize =
- sizeof(stackframeinfo) / SIZEOF_VOID_P +
+ cd->stackframesize =
+ sizeof(stackframeinfo_t) / SIZEOF_VOID_P +
sizeof(localref_table) / SIZEOF_VOID_P +
- INT_ARG_CNT + FLT_ARG_CNT + 1 + /* + 1 for function address */
+ md->paramcount +
+ (md->returntype.type == TYPE_VOID ? 0 : 1) +
nmd->memuse;
- if (!(stackframesize & 0x1)) /* keep stack 16-byte aligned */
- stackframesize++;
+ ALIGN_ODD(cd->stackframesize); /* keep stack 16-byte aligned */
/* create method header */
- (void) dseg_addaddress(cd, m); /* MethodPointer */
- (void) dseg_adds4(cd, stackframesize * 8); /* FrameSize */
- (void) dseg_adds4(cd, 0); /* IsSync */
- (void) dseg_adds4(cd, 0); /* IsLeaf */
- (void) dseg_adds4(cd, 0); /* IntSave */
- (void) dseg_adds4(cd, 0); /* FltSave */
- (void) dseg_addlinenumbertablesize(cd);
- (void) dseg_adds4(cd, 0); /* ExTableSize */
-
- /* initialize mcode variables */
-
- cd->mcodeptr = (u1 *) cd->mcodebase;
- cd->mcodeend = (s4 *) (cd->mcodebase + cd->mcodesize);
+ (void) dseg_add_unique_address(cd, code); /* CodeinfoPointer */
+ (void) dseg_add_unique_s4(cd, cd->stackframesize * 8); /* FrameSize */
+ (void) dseg_add_unique_s4(cd, 0); /* IsLeaf */
+ (void) dseg_add_unique_s4(cd, 0); /* IntSave */
+ (void) dseg_add_unique_s4(cd, 0); /* FltSave */
+#if defined(ENABLE_PROFILING)
/* generate native method profiling code */
- if (opt_prof) {
+ if (JITDATA_HAS_FLAG_INSTRUMENT(jd)) {
/* count frequency */
- M_MOV_IMM(m, REG_ITMP2);
- M_IINC_MEMBASE(REG_ITMP2, OFFSET(methodinfo, frequency));
+ M_MOV_IMM(code, REG_ITMP3);
+ M_IINC_MEMBASE(REG_ITMP3, OFFSET(codeinfo, frequency));
}
+#endif
/* generate stub code */
- M_ASUB_IMM(stackframesize * 8, REG_SP);
-
-#if !defined(NDEBUG)
- /* generate call trace */
+ M_ASUB_IMM(cd->stackframesize * 8, REG_SP);
- if (opt_verbosecall) {
- /* save integer and float argument registers */
+#if defined(ENABLE_GC_CACAO)
+ /* Save callee saved integer registers in stackframeinfo (GC may
+ need to recover them during a collection). */
- for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++)
- if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
- M_LST(rd->argintregs[j++], REG_SP, (1 + i) * 8);
+ disp = cd->stackframesize * 8 - sizeof(stackframeinfo_t) +
+ OFFSET(stackframeinfo_t, intregs);
- for (i = 0, j = 0; i < md->paramcount && j < FLT_ARG_CNT; i++)
- if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
- M_DST(rd->argfltregs[j++], REG_SP, (1 + INT_ARG_CNT + i) * 8);
-
- /* show integer hex code for float arguments */
+ for (i = 0; i < INT_SAV_CNT; i++)
+ M_AST(abi_registers_integer_saved[i], REG_SP, disp + i * 8);
+#endif
- for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++) {
- /* if the paramtype is a float, we have to right shift all
- following integer registers */
+ /* save integer and float argument registers */
- if (IS_FLT_DBL_TYPE(md->paramtypes[i].type)) {
- for (s1 = INT_ARG_CNT - 2; s1 >= i; s1--)
- M_MOV(rd->argintregs[s1], rd->argintregs[s1 + 1]);
+ for (i = 0; i < md->paramcount; i++) {
+ if (!md->params[i].inmemory) {
+ s1 = md->params[i].regoff;
- x86_64_movd_freg_reg(cd, rd->argfltregs[j], rd->argintregs[i]);
- j++;
+ switch (md->paramtypes[i].type) {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
+ M_LST(s1, REG_SP, i * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DST(s1, REG_SP, i * 8);
+ break;
}
}
-
- M_MOV_IMM(m, REG_ITMP1);
- M_AST(REG_ITMP1, REG_SP, 0 * 8);
- M_MOV_IMM(builtin_trace_args, REG_ITMP1);
- M_CALL(REG_ITMP1);
-
- /* restore integer and float argument registers */
-
- for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++)
- if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
- M_LLD(rd->argintregs[j++], REG_SP, (1 + i) * 8);
-
- for (i = 0, j = 0; i < md->paramcount && j < FLT_ARG_CNT; i++)
- if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
- M_DLD(rd->argfltregs[j++], REG_SP, (1 + INT_ARG_CNT + i) * 8);
- }
-#endif /* !defined(NDEBUG) */
-
- /* get function address (this must happen before the stackframeinfo) */
-
-#if !defined(WITH_STATIC_CLASSPATH)
- if (f == NULL) {
- codegen_addpatchref(cd, cd->mcodeptr, PATCHER_resolve_native, m, 0);
-
- if (opt_showdisassemble) {
- M_NOP; M_NOP; M_NOP; M_NOP; M_NOP;
- }
}
-#endif
-
- M_MOV_IMM(f, REG_ITMP3);
-
-
- /* save integer and float argument registers */
-
- for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++)
- if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
- M_LST(rd->argintregs[j++], REG_SP, i * 8);
-
- for (i = 0, j = 0; i < md->paramcount && j < FLT_ARG_CNT; i++)
- if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
- M_DST(rd->argfltregs[j++], REG_SP, (INT_ARG_CNT + i) * 8);
-
- M_AST(REG_ITMP3, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
/* create dynamic stack info */
- M_ALEA(REG_SP, stackframesize * 8, rd->argintregs[0]);
- x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase), rd->argintregs[1]);
- M_ALEA(REG_SP, stackframesize * 8 + SIZEOF_VOID_P, rd->argintregs[2]);
- M_ALD(rd->argintregs[3], REG_SP, stackframesize * 8);
+ M_MOV(REG_SP, REG_A0);
+ emit_lea_membase_reg(cd, RIP, -((cd->mcodeptr + 7) - cd->mcodebase), REG_A1);
M_MOV_IMM(codegen_start_native_call, REG_ITMP1);
M_CALL(REG_ITMP1);
- /* restore integer and float argument registers */
+ /* remember class argument */
- for (i = 0, j = 0; i < md->paramcount && j < INT_ARG_CNT; i++)
- if (IS_INT_LNG_TYPE(md->paramtypes[i].type))
- M_LLD(rd->argintregs[j++], REG_SP, i * 8);
+ if (m->flags & ACC_STATIC)
+ M_MOV(REG_RESULT, REG_ITMP2);
- for (i = 0, j = 0; i < md->paramcount && j < FLT_ARG_CNT; i++)
- if (IS_FLT_DBL_TYPE(md->paramtypes[i].type))
- M_DLD(rd->argfltregs[j++], REG_SP, (INT_ARG_CNT + i) * 8);
+ /* restore integer and float argument registers */
- M_ALD(REG_ITMP3, REG_SP, (INT_ARG_CNT + FLT_ARG_CNT) * 8);
+ for (i = 0; i < md->paramcount; i++) {
+ if (!md->params[i].inmemory) {
+ s1 = md->params[i].regoff;
+ switch (md->paramtypes[i].type) {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
+ M_LLD(s1, REG_SP, i * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DLD(s1, REG_SP, i * 8);
+ break;
+ }
+ }
+ }
- /* copy or spill arguments to new locations */
+ /* Copy or spill arguments to new locations. */
- for (i = md->paramcount - 1, j = i + nativeparams; i >= 0; i--, j--) {
- t = md->paramtypes[i].type;
+ for (i = md->paramcount - 1, j = i + skipparams; i >= 0; i--, j--) {
+ s2 = nmd->params[j].regoff;
- if (IS_INT_LNG_TYPE(t)) {
+ switch (md->paramtypes[i].type) {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
if (!md->params[i].inmemory) {
- s1 = rd->argintregs[md->params[i].regoff];
+ s1 = md->params[i].regoff;
- if (!nmd->params[j].inmemory) {
- s2 = rd->argintregs[nmd->params[j].regoff];
+ if (!nmd->params[j].inmemory)
M_INTMOVE(s1, s2);
-
- } else {
- s2 = nmd->params[j].regoff;
- M_LST(s1, REG_SP, s2 * 8);
- }
-
- } else {
- s1 = md->params[i].regoff + stackframesize + 1; /* + 1 (RA) */
- s2 = nmd->params[j].regoff;
- M_LLD(REG_ITMP1, REG_SP, s1 * 8);
- M_LST(REG_ITMP1, REG_SP, s2 * 8);
+ else
+ M_LST(s1, REG_SP, s2);
+ }
+ else {
+ s1 = md->params[i].regoff + cd->stackframesize * 8 + 8;/* +1 (RA) */
+ M_LLD(REG_ITMP1, REG_SP, s1);
+ M_LST(REG_ITMP1, REG_SP, s2);
}
+ break;
+ case TYPE_FLT:
+ /* We only copy spilled float arguments, as the float
+ argument registers keep unchanged. */
- } else {
- /* We only copy spilled float arguments, as the float argument */
- /* registers keep unchanged. */
+ if (md->params[i].inmemory) {
+ s1 = md->params[i].regoff + cd->stackframesize * 8 + 8;/* +1 (RA) */
+ M_FLD(REG_FTMP1, REG_SP, s1);
+ M_FST(REG_FTMP1, REG_SP, s2);
+ }
+ break;
+ case TYPE_DBL:
if (md->params[i].inmemory) {
- s1 = md->params[i].regoff + stackframesize + 1; /* + 1 (RA) */
- s2 = nmd->params[j].regoff;
- M_DLD(REG_FTMP1, REG_SP, s1 * 8);
- M_DST(REG_FTMP1, REG_SP, s2 * 8);
+ s1 = md->params[i].regoff + cd->stackframesize * 8 + 8;/* +1 (RA) */
+ M_DLD(REG_FTMP1, REG_SP, s1);
+ M_DST(REG_FTMP1, REG_SP, s2);
}
+ break;
}
}
- /* put class into second argument register */
+ /* Handle native Java methods. */
- if (m->flags & ACC_STATIC)
- M_MOV_IMM(m->class, rd->argintregs[1]);
+ if (m->flags & ACC_NATIVE) {
+ /* put class into second argument register */
- /* put env into first argument register */
+ if (m->flags & ACC_STATIC)
+ M_MOV(REG_ITMP2, REG_A1);
- M_MOV_IMM(_Jv_env, rd->argintregs[0]);
+ /* put env into first argument register */
- /* do the native function call */
+ M_MOV_IMM(VM_get_jnienv(), REG_A0);
+ }
+
+ /* Call the native function. */
- M_CALL(REG_ITMP3);
+ disp = dseg_add_functionptr(cd, f);
+ M_ALD(REG_ITMP1, RIP, disp);
+ M_CALL(REG_ITMP1);
/* save return value */
- if (md->returntype.type != TYPE_VOID) {
- if (IS_INT_LNG_TYPE(md->returntype.type))
- M_LST(REG_RESULT, REG_SP, 0 * 8);
- else
- M_DST(REG_FRESULT, REG_SP, 0 * 8);
+ switch (md->returntype.type) {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
+ switch (md->returntype.primitivetype) {
+ case PRIMITIVETYPE_BOOLEAN:
+ M_BZEXT(REG_RESULT, REG_RESULT);
+ break;
+ case PRIMITIVETYPE_BYTE:
+ M_BSEXT(REG_RESULT, REG_RESULT);
+ break;
+ case PRIMITIVETYPE_CHAR:
+ M_CZEXT(REG_RESULT, REG_RESULT);
+ break;
+ case PRIMITIVETYPE_SHORT:
+ M_SSEXT(REG_RESULT, REG_RESULT);
+ break;
+ }
+ M_LST(REG_RESULT, REG_SP, 0 * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DST(REG_FRESULT, REG_SP, 0 * 8);
+ break;
+ case TYPE_VOID:
+ break;
}
/* remove native stackframe info */
- M_ALEA(REG_SP, stackframesize * 8, rd->argintregs[0]);
+ M_MOV(REG_SP, REG_A0);
+ emit_lea_membase_reg(cd, RIP, -((cd->mcodeptr + 7) - cd->mcodebase), REG_A1);
M_MOV_IMM(codegen_finish_native_call, REG_ITMP1);
M_CALL(REG_ITMP1);
+ M_MOV(REG_RESULT, REG_ITMP3);
-#if !defined(NDEBUG)
- /* generate call trace */
-
- if (opt_verbosecall) {
- /* just restore the value we need, don't care about the other */
-
- if (md->returntype.type != TYPE_VOID) {
- if (IS_INT_LNG_TYPE(md->returntype.type))
- M_LLD(REG_RESULT, REG_SP, 0 * 8);
- else
- M_DLD(REG_FRESULT, REG_SP, 0 * 8);
- }
-
- M_MOV_IMM(m, rd->argintregs[0]);
- M_MOV(REG_RESULT, rd->argintregs[1]);
- M_FLTMOVE(REG_FRESULT, rd->argfltregs[0]);
- M_FLTMOVE(REG_FRESULT, rd->argfltregs[1]);
+ /* restore return value */
- M_MOV_IMM(builtin_displaymethodstop, REG_ITMP1);
- M_CALL(REG_ITMP1);
+ switch (md->returntype.type) {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
+ M_LLD(REG_RESULT, REG_SP, 0 * 8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DLD(REG_FRESULT, REG_SP, 0 * 8);
+ break;
+ case TYPE_VOID:
+ break;
}
-#endif /* !defined(NDEBUG) */
- /* check for exception */
+#if defined(ENABLE_GC_CACAO)
+ /* Restore callee saved integer registers from stackframeinfo (GC
+ might have modified them during a collection). */
+
+ disp = cd->stackframesize * 8 - sizeof(stackframeinfo_t) +
+ OFFSET(stackframeinfo_t, intregs);
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- M_MOV_IMM(builtin_get_exceptionptrptr, REG_ITMP3);
- M_CALL(REG_ITMP3);
-#else
- M_MOV_IMM(&_no_threads_exceptionptr, REG_RESULT);
+ for (i = 0; i < INT_SAV_CNT; i++)
+ M_ALD(abi_registers_integer_saved[i], REG_SP, disp + i * 8);
#endif
- M_ALD(REG_ITMP2, REG_RESULT, 0);
- /* restore return value */
+ /* remove stackframe */
- if (md->returntype.type != TYPE_VOID) {
- if (IS_INT_LNG_TYPE(md->returntype.type))
- M_LLD(REG_RESULT, REG_SP, 0 * 8);
- else
- M_DLD(REG_FRESULT, REG_SP, 0 * 8);
- }
+ M_AADD_IMM(cd->stackframesize * 8, REG_SP);
/* test for exception */
- M_TEST(REG_ITMP2);
- M_BNE(7 + 1);
-
- /* remove stackframe */
-
- M_AADD_IMM(stackframesize * 8, REG_SP);
+ M_TEST(REG_ITMP3);
+ M_BNE(1);
M_RET;
-
/* handle exception */
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- M_LST(REG_ITMP2, REG_SP, 0 * 8);
- M_MOV_IMM(builtin_get_exceptionptrptr, REG_ITMP3);
- M_CALL(REG_ITMP3);
- M_AST_IMM32(0, REG_RESULT, 0); /* clear exception pointer */
- M_LLD(REG_ITMP1_XPTR, REG_SP, 0 * 8);
-#else
M_MOV(REG_ITMP3, REG_ITMP1_XPTR);
- M_MOV_IMM(&_no_threads_exceptionptr, REG_ITMP3);
- M_AST_IMM32(0, REG_ITMP3, 0); /* clear exception pointer */
-#endif
-
- /* remove stackframe */
-
- M_AADD_IMM(stackframesize * 8, REG_SP);
-
- M_LLD(REG_ITMP2_XPC, REG_SP, 0 * 8); /* get return address from stack */
+ M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8); /* get return address from stack */
M_ASUB_IMM(3, REG_ITMP2_XPC); /* callq */
M_MOV_IMM(asm_handle_nat_exception, REG_ITMP3);
M_JMP(REG_ITMP3);
-
-
- /* process patcher calls **************************************************/
-
- {
- patchref *pref;
- ptrint mcode;
- u1 *savedmcodeptr;
- u1 *tmpmcodeptr;
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- s4 disp;
-#endif
-
- for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
- /* Get machine code which is patched back in later. A
- `call rel32' is 5 bytes long (but read 8 bytes). */
-
- savedmcodeptr = cd->mcodebase + pref->branchpos;
- mcode = *((ptrint *) savedmcodeptr);
-
- /* patch in `call rel32' to call the following code */
-
- tmpmcodeptr = cd->mcodeptr; /* save current mcodeptr */
- cd->mcodeptr = savedmcodeptr; /* set mcodeptr to patch position */
-
- M_CALL_IMM(tmpmcodeptr - (savedmcodeptr + PATCHER_CALL_SIZE));
-
- cd->mcodeptr = tmpmcodeptr; /* restore the current mcodeptr */
-
- /* move pointer to java_objectheader onto stack */
-
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
- /* create a virtual java_objectheader */
-
- (void) dseg_addaddress(cd, get_dummyLR()); /* monitorPtr */
- disp = dseg_addaddress(cd, NULL); /* vftbl */
-
- x86_64_lea_membase_reg(cd, RIP, -(((ptrint) cd->mcodeptr + 7) - (ptrint) cd->mcodebase) + disp, REG_ITMP3);
- M_PUSH(REG_ITMP3);
-#else
- M_PUSH_IMM(0);
-#endif
-
- /* move machine code bytes and classinfo pointer into registers */
-
- M_MOV_IMM(mcode, REG_ITMP3);
- M_PUSH(REG_ITMP3);
- M_MOV_IMM(pref->ref, REG_ITMP3);
- M_PUSH(REG_ITMP3);
- M_MOV_IMM(pref->disp, REG_ITMP3);
- M_PUSH(REG_ITMP3);
-
- M_MOV_IMM(pref->patcher, REG_ITMP3);
- M_PUSH(REG_ITMP3);
-
- M_MOV_IMM(asm_wrapper_patcher, REG_ITMP3);
- M_JMP(REG_ITMP3);
- }
- }
-
- codegen_finish(m, cd, (s4) ((u1 *) cd->mcodeptr - cd->mcodebase));
-
- return cd->code->entrypoint;
}