-/* src/vm/jit/sparc64/emit.c - Sparc code emitter functions
+/* src/vm/jit/sparc64/emit.c - SPARC code emitter functions
Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
-
*/
#include "config.h"
+
+#include <assert.h>
+
#include "vm/types.h"
#include "vm/jit/sparc64/codegen.h"
#include "vm/jit/sparc64/md-abi.h"
+#include "vm/jit/sparc64/emit.h"
#include "mm/memory.h"
+#include "vm/exceptions.h"
#include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
+#include "vm/jit/abi.h"
#include "vm/jit/abi-asm.h"
#include "vm/jit/asmpart.h"
#include "vm/builtin.h"
#include "vmcore/options.h"
+#include "vm/jit/sparc64/solaris/macro_rename.h"
+
/* how to leaf optimization in the emitted stubs?? */
#define REG_PV REG_PV_CALLEE
cd = jd->cd;
if (src->flags & INMEMORY) {
- COUNT_SPILLS;
+ COUNT_READ_SPILLS(src)
- disp = JITSTACK + src->vv.regoff * 8;
+ disp = JITSTACK + src->vv.regoff;
- if (IS_FLT_DBL_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
+ switch(src->type)
+ {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
M_LDX(tempreg, REG_SP, disp);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DLD(tempreg, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_load: unknown type %d", src->type);
+ break;
+ }
reg = tempreg;
}
cd = jd->cd;
if (dst->flags & INMEMORY) {
- COUNT_SPILLS;
+ COUNT_WRITE_SPILLS(dst)
- disp = JITSTACK + dst->vv.regoff * 8;
-
- if (IS_FLT_DBL_TYPE(dst->type))
- M_DST(d, REG_SP, disp);
- else
+ disp = JITSTACK + dst->vv.regoff;
+
+ switch(dst->type)
+ {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
M_STX(d, REG_SP, disp);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DST(d, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_store: unknown type %d", dst->type);
+ break;
+ }
}
}
*******************************************************************************/
-void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
+void emit_copy(jitdata *jd, instruction *iptr)
{
- codegendata *cd;
- registerdata *rd;
- s4 s1, d;
+ codegendata *cd;
+ varinfo *src;
+ varinfo *dst;
+ s4 s1, d;
/* get required compiler data */
cd = jd->cd;
- rd = jd->rd;
+
+ /* get source and destination variables */
+
+ src = VAROP(iptr->s1);
+ dst = VAROP(iptr->dst);
if ((src->vv.regoff != dst->vv.regoff) ||
((src->flags ^ dst->flags) & INMEMORY)) {
+ if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
+ /* emit nothing, as the value won't be used anyway */
+ return;
+ }
+
/* If one of the variables resides in memory, we can eliminate
the register move from/to the temporary register with the
order of getting the destination register and the load. */
if (IS_INMEMORY(src->flags)) {
- d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
+ d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
s1 = emit_load(jd, iptr, src, d);
}
else {
s1 = emit_load(jd, iptr, src, REG_IFTMP);
- d = codegen_reg_of_var(iptr->opc, dst, s1);
+ d = codegen_reg_of_var(iptr->opc, dst, s1);
}
- if (s1 != d) {
- if (IS_FLT_DBL_TYPE(src->type))
- M_DMOV(s1, d);
- else
+ if (s1 != d) {
+ switch(src->type) {
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
M_MOV(s1, d);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DMOV(s1, d);
+ break;
+ default:
+ vm_abort("emit_copy: unknown type %d", src->type);
+ break;
+ }
}
emit_store(jd, iptr, dst, d);
}
}
+/* emit_branch *****************************************************************
+
+ Emits the code for conditional and unconditional branchs.
+
+*******************************************************************************/
+
+void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
+{
+ s4 branchdisp;
+
+ /* calculate the different displacements */
+
+ branchdisp = disp >> 2;
+
+ /* check which branch to generate */
+
+ if (condition == BRANCH_UNCONDITIONAL) {
+ /* check displacement for overflow (19-bit)*/
+
+ if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
+ /* if the long-branches flag isn't set yet, do it */
+
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
+
+ vm_abort("emit_branch: emit unconditional long-branch code");
+ }
+ else {
+ M_BR(branchdisp);
+ M_NOP;
+ }
+ }
+ else if (reg == -1) {
+ /* branch on condition codes */
+
+ /* check displacement for overflow (19-bit)*/
+
+ if ((branchdisp < (s4) 0xfffc0000) || (branchdisp > (s4) 0x003ffff)) {
+ /* if the long-branches flag isn't set yet, do it */
+
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ log_println("setting error");
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
+
+ vm_abort("emit_branch: emit long-branch on cc code");
+ }
+ else {
+ /* check whether to branch on 64-bit condition code */
+ if (BRANCH_CHECKS_XCC(opt)) {
+ switch (condition) {
+ case BRANCH_EQ:
+ M_XBEQ(branchdisp);
+ break;
+ case BRANCH_NE:
+ M_XBNE(branchdisp);
+ break;
+ case BRANCH_LT:
+ M_XBLT(branchdisp);
+ break;
+ case BRANCH_GE:
+ M_XBGE(branchdisp);
+ break;
+ case BRANCH_GT:
+ M_XBGT(branchdisp);
+ break;
+ case BRANCH_LE:
+ M_XBLE(branchdisp);
+ break;
+ case BRANCH_UGT:
+ M_XBUGT(branchdisp);
+ break;
+ case BRANCH_ULT:
+ M_XBULT(branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
+
+ /* branch delay */
+ M_NOP;
+ }
+ else {
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BEQ(branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BNE(branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BLT(branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BGE(branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BGT(branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BLE(branchdisp);
+ break;
+ case BRANCH_UGT:
+ M_BUGT(branchdisp);
+ break;
+ case BRANCH_ULT:
+ M_BULT(branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
+
+ /* branch delay */
+ M_NOP;
+ }
+ }
+ }
+ else {
+ /* branch on register */
+
+ /* check displacement for overflow (16-bit) */
+
+ if ((branchdisp < (s4) 0xffff8000) || (branchdisp > (s4) 0x0007fff)) {
+ /* if the long-branches flag isn't set yet, do it */
+
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ log_println("setting error");
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
+
+ vm_abort("emit_branch: emit long-branch on reg code");
+ }
+ else {
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BEQZ(reg, branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BNEZ(reg, branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BLTZ(reg, branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BGEZ(reg, branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BGTZ(reg, branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BLEZ(reg, branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
+
+ /* branch delay */
+ M_NOP;
+ }
+ }
+}
+
+
+/* emit_bxx_xcc*****************************************************************
+
+ Wrappers for branches on 64-bit condition codes (SPARC specific).
+
+*******************************************************************************/
+
+void emit_beq_xcc(codegendata *cd, basicblock *target)
+{
+ emit_bcc(cd, target, BRANCH_EQ, BRANCH_OPT_XCC);
+}
+
+void emit_bne_xcc(codegendata *cd, basicblock *target)
+{
+ emit_bcc(cd, target, BRANCH_NE, BRANCH_OPT_XCC);
+}
+
+void emit_blt_xcc(codegendata *cd, basicblock *target)
+{
+ emit_bcc(cd, target, BRANCH_LT, BRANCH_OPT_XCC);
+}
+
+void emit_bge_xcc(codegendata *cd, basicblock *target)
+{
+ emit_bcc(cd, target, BRANCH_GE, BRANCH_OPT_XCC);
+}
+
+void emit_bgt_xcc(codegendata *cd, basicblock *target)
+{
+ emit_bcc(cd, target, BRANCH_GT, BRANCH_OPT_XCC);
+}
+
+void emit_ble_xcc(codegendata *cd, basicblock *target)
+{
+ emit_bcc(cd, target, BRANCH_LE, BRANCH_OPT_XCC);
+}
+
+
+
+
/* emit_arithmetic_check *******************************************************
void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
{
if (INSTRUCTION_MUST_CHECK(iptr)) {
- M_BEQZ(reg, 0);
- codegen_add_arithmeticexception_ref(cd);
+ M_BNEZ(reg, 3);
M_NOP;
+ M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_ARITHMETIC);
}
}
void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
{
if (INSTRUCTION_MUST_CHECK(iptr)) {
- M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
+ M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
M_CMP(s2, REG_ITMP3);
- M_XBUGE(0);
- codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
+ M_XBULT(3);
M_NOP;
+ M_ALD_INTERN(s2, REG_ZERO, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
}
}
+
+/* emit_classcast_check ********************************************************
+
+ Emit a ClassCastException check.
+
+*******************************************************************************/
+
+void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
+{
+/* XXX: use 64-bit or 32-bit compares??? */
+
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ switch (condition) {
+ case ICMD_IFEQ:
+ M_BNEZ(reg, 3);
+ break;
+
+ case ICMD_IFLE:
+ M_BGTZ(reg, 3);
+ break;
+
+ case BRANCH_ULT:
+ M_XBUGE(3);
+ break;
+
+ default:
+ vm_abort("emit_classcast_check: unknown condition %d", condition);
+ }
+
+ M_NOP;
+ M_ALD_INTERN(s1, REG_ZERO, EXCEPTION_HARDWARE_CLASSCAST);
+ }
+}
+
+
/* emit_nullpointer_check ******************************************************
Emit a NullPointerException check.
void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
{
if (INSTRUCTION_MUST_CHECK(iptr)) {
- M_BEQZ(reg, 0);
- codegen_add_nullpointerexception_ref(cd);
+ M_BNEZ(reg, 3);
+ M_NOP;
+ M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_NULLPOINTER);
+ }
+}
+
+
+/* emit_exception_check ********************************************************
+
+ Emit an Exception check.
+
+*******************************************************************************/
+
+void emit_exception_check(codegendata *cd, instruction *iptr)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_BNEZ(REG_RESULT_CALLER, 3);
M_NOP;
+ M_ALD_INTERN(REG_RESULT_CALLER, REG_ZERO, EXCEPTION_HARDWARE_EXCEPTION);
}
}
-/* emit_exception_stubs ********************************************************
- Generates the code for the exception stubs.
+/* emit_trap *******************************************************************
+
+ Emit a trap instruction and return the original machine code.
*******************************************************************************/
-void emit_exception_stubs(jitdata *jd)
+uint32_t emit_trap(codegendata *cd)
{
+ uint32_t mcode;
+
+ /* Get machine code which is patched back in later. The
+ trap is 1 instruction word long. */
+
+ mcode = *((u4 *) cd->mcodeptr);
+
+ M_ALD_INTERN(REG_ZERO, REG_ZERO, EXCEPTION_HARDWARE_PATCHER);
+
+ return mcode;
}
+
/* emit_patcher_stubs **********************************************************
Generates the code for the patcher stubs.
}
-/* emit_replacement_stubs ******************************************************
-
- Generates the code for the replacement stubs.
-
-*******************************************************************************/
-
-#if defined(ENABLE_REPLACEMENT)
-void emit_replacement_stubs(jitdata *jd)
-{
-}
-#endif /* defined(ENABLE_REPLACEMENT) */
-
/* emit_verbosecall_enter ******************************************************
Generates the code for the call trace.
methoddesc *md;
s4 disp;
s4 i, t;
+ s4 stackslots;
/* get required compiler data */
M_NOP;
/* XXX jit-c-call */
- M_LDA(REG_SP, REG_SP, -(1 + FLT_ARG_CNT) * 8);
+ stackslots = 1 + FLT_ARG_CNT;
+ ALIGN_STACK_SLOTS(stackslots);
+
+ M_LDA(REG_SP, REG_SP, -(stackslots * 8));
/* save float argument registers */
for (i = 0; i < FLT_ARG_CNT; i++)
- M_DST(rd->argfltregs[i], REG_SP, JITSTACK + (1 + i) * 8);
+ M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
/* save temporary registers for leaf methods */
/* XXX no leaf optimization yet
for (i = 0; i < md->paramcount && i < INT_NATARG_CNT; i++) {
t = md->paramtypes[i].type;
- /* using all available argument registers, this adds complexity */
+ /* all available argument registers used, which adds a little complexity */
if (IS_INT_LNG_TYPE(t)) {
if (i < INT_ARG_CNT) {
- M_INTMOVE(REG_WINDOW_TRANSPOSE(rd->argintregs[i]), rd->argintregs[i]);
+ M_INTMOVE(REG_WINDOW_TRANSPOSE(abi_registers_integer_argument[i]),
+ abi_registers_integer_argument[i]);
}
else {
assert(i == 5);
}
}
else {
- assert(i < 4); /* XXX only 4 float reg args right now! */
- if (IS_2_WORD_TYPE(t)) {
- M_DST(rd->argfltregs[i], REG_SP, JITSTACK);
- M_LDX(rd->argintregs[i], REG_SP, JITSTACK);
+ if (i < FLT_ARG_CNT) {
+
+ /* reg -> mem -> reg */
+
+ if (IS_2_WORD_TYPE(t)) {
+ M_DST(abi_registers_float_argument[i], REG_SP, JITSTACK);
+ M_LDX(abi_registers_integer_argument[i], REG_SP, JITSTACK);
+ }
+ else {
+ M_FST(abi_registers_float_argument[i], REG_SP, JITSTACK);
+ M_ILD(abi_registers_integer_argument[i], REG_SP, JITSTACK);
+ }
}
else {
- M_FST(rd->argfltregs[i], REG_SP, JITSTACK);
- M_ILD(rd->argintregs[i], REG_SP, JITSTACK);
+
+ /* mem -> reg */
+
+ assert(i == 5);
+ if (IS_2_WORD_TYPE(t)) {
+ M_LDX(REG_OUT5, REG_FP, JITSTACK);
+ }
+ else {
+ M_ILD(REG_OUT5, REG_FP, JITSTACK);
+ }
}
}
}
- /* method info pointer is passed in argument register 5 */
+ /* method info pointer is passed via stack */
disp = dseg_add_address(cd, m);
M_ALD(REG_ITMP1, REG_PV_CALLEE, disp);
M_AST(REG_ITMP1, REG_SP, CSTACK);
/* restore float argument registers */
for (i = 0; i < FLT_ARG_CNT; i++)
- M_DLD(rd->argfltregs[i], REG_SP, JITSTACK + (1 + i) * 8);
+ M_DLD(abi_registers_float_argument[i], REG_SP, JITSTACK + (1 + i) * 8);
/* restore temporary registers for leaf methods */
/* XXX no leaf optimization yet
M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
}
*/
- M_LDA(REG_SP, REG_SP, (1 + FLT_ARG_CNT) * 8);
+ M_LDA(REG_SP, REG_SP, stackslots * 8);
/* mark trace code */
M_NOP;
- /* XXX jit-c-call */
- M_LDA(REG_SP, REG_SP, -(1 * 8));
+ /* XXX jit-c-call (keep stack aligned)*/
+ M_LDA(REG_SP, REG_SP, -(2 * 8));
M_DST(REG_FRESULT, REG_SP, JITSTACK);
- M_MOV(REG_RESULT_CALLEE, rd->argintregs[0]);
+ M_MOV(REG_RESULT_CALLEE, REG_OUT0);
M_DMOV(REG_FRESULT, 1); /* logical dreg 1 => f2 */
M_FMOV(REG_FRESULT, 2); /* logical freg 2 => f5 */
disp = dseg_add_functionptr(cd, m);
- M_ALD(rd->argintregs[3], REG_PV_CALLEE, disp);
+ M_ALD(REG_OUT3, REG_PV_CALLEE, disp);
disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
M_ALD(REG_ITMP3, REG_PV_CALLEE, disp);
M_DLD(REG_FRESULT, REG_SP, JITSTACK);
- M_LDA(REG_SP, REG_SP, 1 * 8);
+ M_LDA(REG_SP, REG_SP, 2 * 8);
/* mark trace code */
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