* Removed all Id tags.

[cacao.git] / src / vm / jit / sparc64 / codegen.h

diff --git a/src/vm/jit/sparc64/codegen.h b/src/vm/jit/sparc64/codegen.h
index 9233b2f81418b0de7d10ef6e040a2b7bd8ff602d..ade165128a665165191011b905ce4d3424039e77 100644 (file)
--- a/src/vm/jit/sparc64/codegen.h
+++ b/src/vm/jit/sparc64/codegen.h
@@ -23,8 +23,6 @@
    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    02110-1301, USA.
 
-   $Id: codegen.h 4722 2006-04-03 15:36:00Z twisti $
-
 */
 
 #ifndef _CODEGEN_H
@@ -39,6 +37,14 @@
 
 #include <assert.h>
 
+/* debug defines **************************************************************/
+#ifndef NDEBUG
+# define PASS13BIT(imm) ((((s4)(imm)&0x1fff)<<19)>>19)
+#else
+# define PASS13BIT(imm) imm
+#endif
+
+
 /* from md-abi.c */
 s4 nat_argintregs[INT_NATARG_CNT];
 
@@ -88,6 +94,10 @@ s4 nat_argintregs[INT_NATARG_CNT];
         M_NOP; \
     }
 
+#define ALIGN_STACK_SLOTS(slots) \
+       if (slots & 1) \
+               slots++;
+
 
 /* M_INTMOVE:
      generates an integer-move from register rs to rd.
@@ -138,6 +148,7 @@ s4 nat_argintregs[INT_NATARG_CNT];
  */
 #define M_OP3(op,op3,rd,rs1,rs2,imm) \
        do { \
+               assert(check_13bit_imm(rs2)); \
                *((u4 *) cd->mcodeptr) =  ((((s4) (op)) << 30) | ((rd) << 25) | ((op3) << 19) | ((rs1) << 14) | ((imm)<<13) | (imm?((rs2)&0x1fff):(rs2)) ); \
                cd->mcodeptr += 4; \
        } while (0)
@@ -411,7 +422,7 @@ s4   get_lopart_disp(s4 disp);
                } \
                else { \
                        M_SETHI(sethi_part(~c), rd); \
-                       M_XOR_IMM(rd, setlo_part(c) | 0xffffffffffff1c00, rd); \
+                       M_XOR_IMM(rd, PASS13BIT(setlo_part(c) | 0xffffffffffff1c00), rd); \
                } \
        } while (0)
        
@@ -457,7 +468,7 @@ s4   get_lopart_disp(s4 disp);
         } \
         else { \
                DO_SETHI_PART(disp,rs,rd); \
-               M_LDX_INTERN(rd,rd,get_lopart_disp(disp)); \
+               M_LDX_INTERN(rd,rd,PASS13BIT(get_lopart_disp(disp))); \
         } \
     } while (0)
 
@@ -469,7 +480,7 @@ s4   get_lopart_disp(s4 disp);
        } \
         else { \
             DO_SETHI_PART(disp,rs,rd); \
-            M_ILD_INTERN(rd,rd,get_lopart_disp(disp)); \
+            M_ILD_INTERN(rd,rd,PASS13BIT(get_lopart_disp(disp))); \
         } \
     } while (0)
 
@@ -490,8 +501,7 @@ s4   get_lopart_disp(s4 disp);
         } \
         else { \
             DO_SETHI_PART(disp,rs,REG_ITMP3); \
-            M_STX_INTERN(rd,REG_ITMP3,setlo_part(disp)); \
-                       assert(0); \
+            M_STX_INTERN(rd,REG_ITMP3,PASS13BIT(get_lopart_disp(disp))); \
         } \
     } while (0)
 
@@ -504,8 +514,7 @@ s4   get_lopart_disp(s4 disp);
        } \
         else { \
             DO_SETHI_PART(disp,rs,REG_ITMP3); \
-            M_IST_INTERN(rd,REG_ITMP3,setlo_part(disp)); \
-                       assert(0); \
+            M_IST_INTERN(rd,REG_ITMP3,PASS13BIT(get_lopart_disp(disp))); \
         } \
     } while (0)
 
@@ -559,6 +568,7 @@ s4   get_lopart_disp(s4 disp);
 
 
 #define M_SAVE(rs1,rs2,rd)      M_OP3(0x02,0x3c,rd,rs1,rs2,IMM)
+#define M_SAVE_REG(rs1,rs2,rd)  M_OP3(0x02,0x3c,rd,rs1,rs2,REG)
 #define M_RESTORE(rs1,rs2,rd)   M_OP3(0x02,0x3d,rd,rs1,rs2,IMM)
 
 
@@ -623,7 +633,7 @@ s4   get_lopart_disp(s4 disp);
         } else { \
             M_SETHI(hi&0x3ffff8,rd); \
             M_AADD(rs,rd,rd); \
-            M_DLD_INTERN(rd,rd,lo); \
+            M_DLD_INTERN(rd,rd,PASS13BIT(lo)); \
         } \
     } while (0)
 /* Note for SETHI: sethi has a 22bit imm, only set upper 19 bits */ 
@@ -638,7 +648,7 @@ s4   get_lopart_disp(s4 disp);
         } else { \
             M_SETHI(hi&0x3ffff8,rd); \
             M_AADD(rs,rd,rd); \
-            M_FLD_INTERN(rd,rd,lo); \
+            M_FLD_INTERN(rd,rd,PASS13BIT(lo)); \
         } \
     } while (0)
 
@@ -653,7 +663,7 @@ s4   get_lopart_disp(s4 disp);
         } else { \
             M_SETHI(hi&0x3ffff8,REG_ITMP3); \
             M_AADD(rs,REG_ITMP3,REG_ITMP3); \
-            M_FST_INTERN(rd,REG_ITMP3,lo); \
+            M_FST_INTERN(rd,REG_ITMP3,PASS13BIT(lo)); \
         } \
     } while (0)
     
@@ -668,7 +678,7 @@ s4   get_lopart_disp(s4 disp);
         } else { \
             M_SETHI(hi&0x3ffff8,REG_ITMP3); \
             M_AADD(rs,REG_ITMP3,REG_ITMP3); \
-            M_DST_INTERN(rd,REG_ITMP3,lo); \
+            M_DST_INTERN(rd,REG_ITMP3,PASS13BIT(lo)); \
         } \
     } while (0)
     
@@ -689,38 +699,6 @@ s4   get_lopart_disp(s4 disp);
 #define M_AADD_IMM(a,b,c)       M_ADD_IMM(a,b,c)
 #define M_ASUB_IMM(a,b,c)       M_SUB_IMM(a,b,c)
 #define M_ASLL_IMM(a,b,c)       M_SLLX_IMM(a,b,c)
-
-
-
-
-/* var_to_reg_xxx **************************************************************
-
-   This function generates code to fetch data from a pseudo-register
-   into a real register. If the pseudo-register has actually been
-   assigned to a real register, no code will be emitted, since
-   following operations can use this register directly.
-    
-   v: pseudoregister to be fetched from
-   tempregnum: temporary register to be used if v is actually spilled to ram
-
-   return: the register number, where the operand can be found after 
-           fetching (this wil be either tempregnum or the register
-           number allready given to v)
-
-*******************************************************************************/
-
-#define var_to_reg_int(regnr,v,tempnr) \
-    do { \
-        if ((v)->flags & INMEMORY) { \
-            COUNT_SPILLS; \
-            M_LDX(tempnr, REG_SP, (v)->regoff * 8); \
-            regnr = tempnr; \
-        } else { \
-            regnr = (v)->regoff; \
-        } \
-    } while (0)
-                                                                                                                                 
-
-                                                                                                                                 
        
+
 #endif /* _CODEGEN_H */