Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: emit.c 7966 2007-05-25 12:41:03Z pm $
-
*/
-
#include "config.h"
#include <assert.h>
+#include <stdint.h>
-#include "vm/types.h"
-
-#include "md-abi.h"
-
-#include "vm/jit/s390/codegen.h"
-#include "vm/jit/s390/emit.h"
-
+#include "mm/memory.h"
#if defined(ENABLE_THREADS)
# include "threads/native/lock.h"
#endif
-
#include "vm/builtin.h"
+#include "vm/exceptions.h"
+#include "vm/global.h"
+#include "vm/jit/abi.h"
#include "vm/jit/abi-asm.h"
#include "vm/jit/asmpart.h"
#include "vm/jit/codegen-common.h"
#include "vm/jit/emit-common.h"
#include "vm/jit/jit.h"
+#include "vm/jit/patcher-common.h"
#include "vm/jit/replace.h"
-#include "vm/jit/abi.h"
-#include "vm/global.h"
-#include "mm/memory.h"
-#include "vm/exceptions.h"
-
-#define __PORTED__
+#include "vm/jit/s390/codegen.h"
+#include "vm/jit/s390/emit.h"
+#include "vm/jit/s390/md-abi.h"
+#include "vm/types.h"
+#include "vmcore/options.h"
/* emit_load *******************************************************************
*******************************************************************************/
-__PORTED__ s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
+s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
{
codegendata *cd;
s4 disp;
if (IS_INMEMORY(src->flags)) {
COUNT_SPILLS;
- disp = src->vv.regoff * 4;
+ disp = src->vv.regoff;
if (IS_FLT_DBL_TYPE(src->type)) {
if (IS_2_WORD_TYPE(src->type))
*******************************************************************************/
-__PORTED__ inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
+void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
{
codegendata *cd;
if (IS_FLT_DBL_TYPE(dst->type)) {
if (IS_2_WORD_TYPE(dst->type))
- M_DST(d, REG_SP, dst->vv.regoff * 4);
+ M_DST(d, REG_SP, dst->vv.regoff);
else
- M_FST(d, REG_SP, dst->vv.regoff * 4);
+ M_FST(d, REG_SP, dst->vv.regoff);
}
else {
if (IS_2_WORD_TYPE(dst->type))
- M_LST(d, REG_SP, dst->vv.regoff * 4);
+ M_LST(d, REG_SP, dst->vv.regoff);
else
- M_IST(d, REG_SP, dst->vv.regoff * 4);
+ M_IST(d, REG_SP, dst->vv.regoff);
}
}
}
*******************************************************************************/
-__PORTED__ void emit_copy(jitdata *jd, instruction *iptr)
+void emit_copy(jitdata *jd, instruction *iptr)
{
codegendata *cd;
varinfo *src;
return;
}
- /* If one of the variables resides in memory, we can eliminate
- the register move from/to the temporary register with the
- order of getting the destination register and the load. */
-
- if (IS_INMEMORY(src->flags)) {
- if (IS_FLT_DBL_TYPE(dst->type)) {
- d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
+ if (IS_INMEMORY(src->flags) && IS_INMEMORY(dst->flags)) {
+ if (IS_2_WORD_TYPE(src->type)) {
+ N_MVC(dst->vv.regoff, 8, REG_SP, src->vv.regoff, REG_SP);
} else {
- if (IS_2_WORD_TYPE(dst->type)) {
- d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
+ N_MVC(dst->vv.regoff, 4, REG_SP, src->vv.regoff, REG_SP);
+ }
+ } else {
+
+ /* If one of the variables resides in memory, we can eliminate
+ the register move from/to the temporary register with the
+ order of getting the destination register and the load. */
+
+ if (IS_INMEMORY(src->flags)) {
+ if (IS_FLT_DBL_TYPE(dst->type)) {
+ d = codegen_reg_of_var(iptr->opc, dst, REG_FTMP1);
} else {
- d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
+ if (IS_2_WORD_TYPE(dst->type)) {
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
+ } else {
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
+ }
}
+ s1 = emit_load(jd, iptr, src, d);
}
- s1 = emit_load(jd, iptr, src, d);
- }
- else {
- if (IS_FLT_DBL_TYPE(src->type)) {
- s1 = emit_load(jd, iptr, src, REG_FTMP1);
- } else {
- if (IS_2_WORD_TYPE(src->type)) {
- s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
+ else {
+ if (IS_FLT_DBL_TYPE(src->type)) {
+ s1 = emit_load(jd, iptr, src, REG_FTMP1);
} else {
- s1 = emit_load(jd, iptr, src, REG_ITMP1);
+ if (IS_2_WORD_TYPE(src->type)) {
+ s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
+ } else {
+ s1 = emit_load(jd, iptr, src, REG_ITMP1);
+ }
}
+ d = codegen_reg_of_var(iptr->opc, dst, s1);
}
- d = codegen_reg_of_var(iptr->opc, dst, s1);
- }
- if (s1 != d) {
- if (IS_FLT_DBL_TYPE(src->type)) {
- M_FMOV(s1, d);
- } else {
- if (IS_2_WORD_TYPE(src->type)) {
- M_LNGMOVE(s1, d);
+ if (s1 != d) {
+ if (IS_FLT_DBL_TYPE(src->type)) {
+ M_FMOV(s1, d);
} else {
- M_MOV(s1, d);
+ if (IS_2_WORD_TYPE(src->type)) {
+ M_LNGMOVE(s1, d);
+ } else {
+ M_MOV(s1, d);
+ }
}
}
- }
- emit_store(jd, iptr, dst, d);
+ emit_store(jd, iptr, dst, d);
+ }
}
}
+/* emit_trap****************************************************************
-/* emit_patcher_stubs **********************************************************
-
- Generates the code for the patcher stubs.
+ Emit a trap instruction and return the original machine code.
*******************************************************************************/
-__PORTED__ void emit_patcher_stubs(jitdata *jd)
+uint32_t emit_trap(codegendata *cd)
{
-
- codegendata *cd;
- patchref *pref;
- u4 mcode;
- u1 *savedmcodeptr;
- u1 *tmpmcodeptr;
- s4 targetdisp;
- s4 disp;
- u1 *ref;
+ uint32_t mcode;
- /* get required compiler data */
+ /* Get machine code which is patched back in later. The
+ trap is 2 bytes long. */
- cd = jd->cd;
-
- /* generate code patching stub call code */
+ mcode = *((u2 *) cd->mcodeptr);
- targetdisp = 0;
+ M_ILL(EXCEPTION_HARDWARE_PATCHER);
- for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
- /* check code segment size */
+ return mcode;
+}
- MCODECHECK(100);
- /* Get machine code which is patched back in later. The
- call is 1 instruction word long. */
+/* emit_verbosecall_enter ******************************************************
- tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
+ Generates the code for the call trace.
- mcode = *((u4 *) tmpmcodeptr);
+*******************************************************************************/
- /* Patch in the call to call the following code (done at
- compile time). */
+#if !defined(NDEBUG)
+#include "vm/jit/trace.h"
+void emit_verbosecall_enter(jitdata *jd)
+{
+#if 1
+ methodinfo *m;
+ codegendata *cd;
+ s4 stackframesize;
+ s4 i, off, disp;
- savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
- cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
+ m = jd->m;
+ cd = jd->cd;
- disp = (savedmcodeptr) - (tmpmcodeptr);
+ /* mark trace code */
- if (! N_VALID_BRANCH(disp)) {
- /* Displacement overflow */
+ M_NOP;
- /* If LONGBRANCHES is not set, the flag and the error flag */
-
- if (! CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
- cd->flags |= (CODEGENDATA_FLAG_ERROR |
- CODEGENDATA_FLAG_LONGBRANCHES);
- }
+ /* allocate stack frame */
- /* If error flag is set, do nothing. The method has to be recompiled. */
+ stackframesize = 96 + (ARG_CNT * 8) + (TMP_CNT * 8);
+ M_ASUB_IMM(stackframesize, REG_SP);
- if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd) && CODEGENDATA_HAS_FLAG_ERROR(cd)) {
- return;
- }
- }
+ /* store argument registers in array */
- if (CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ off = 96;
- /* Generating long branches */
+ for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
+ M_IST(abi_registers_integer_argument[i], REG_SP, off + 4);
+ /* high bytes are sign extension */
+ M_SRA_IMM(31, abi_registers_integer_argument[i]);
+ M_IST(abi_registers_integer_argument[i], REG_SP, off);
+ }
- disp = dseg_add_s4(cd, savedmcodeptr - cd->mcodebase);
+ for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
+ M_DST(abi_registers_float_argument[i], REG_SP, off);
+ }
- M_ILD(REG_ITMP3, REG_PV, disp);
- M_AADD(REG_PV, REG_ITMP3);
-
- /* Do the branch at the end of NOP sequence.
- * This way the patch position is at a *fixed* offset
- * (PATCHER_LONGBRANCHES_NOPS_SKIP) of the return address.
- */
-
- cd->mcodeptr = tmpmcodeptr + PATCHER_LONGBRANCHES_NOPS_SKIP - SZ_BASR;
- M_JMP(REG_ITMP3, REG_ITMP3);
- } else {
-
- /* Generating short branches */
+ /* save temporary registers for leaf methods */
- M_BSR(REG_ITMP3, disp);
+ if (jd->isleafmethod) {
+ for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
+ M_IST(abi_registers_integer_temporary[i], REG_SP, off);
}
- cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
-
- /* create stack frame */
-
- M_ASUB_IMM(6 * 4, REG_SP);
-
- /* move return address onto stack */
-
- M_AST(REG_ITMP3, REG_SP, 5 * 4);
-
- /* move pointer to java_objectheader onto stack */
-
-#if defined(ENABLE_THREADS)
- /* create a virtual java_objectheader */
-
- (void) dseg_add_unique_address(cd, NULL); /* flcword */
- (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
- disp = dseg_add_unique_address(cd, NULL); /* vftbl */
-
- M_LDA(REG_ITMP3, REG_PV, disp);
- M_AST(REG_ITMP3, REG_SP, 4 * 4);
-#else
- /* nothing to do */
-#endif
+ for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
+ M_DST(abi_registers_float_temporary[i], REG_SP, off);
+ }
+ }
- /* move machine code onto stack */
+ /* load arguments for trace_java_call_enter */
- disp = dseg_add_s4(cd, mcode);
- M_ILD(REG_ITMP3, REG_PV, disp);
- M_IST(REG_ITMP3, REG_SP, 3 * 4);
+ /* methodinfo */
+ disp = dseg_add_address(cd, m);
+ M_ALD_DSEG(REG_A0, disp);
+ /* pointer to argument registers array */
+ M_LDA(REG_A1, REG_SP, 96);
+ /* pointer to on stack arguments */
+ M_LDA(REG_A2, REG_SP, stackframesize + (cd->stackframesize * 8));
- /* move class/method/field reference onto stack */
+ /* call trace_java_call_enter */
- disp = dseg_add_address(cd, pref->ref);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_AST(REG_ITMP3, REG_SP, 2 * 4);
+ disp = dseg_add_functionptr(cd, trace_java_call_enter);
+ M_ALD_DSEG(REG_ITMP3, disp);
+ M_CALL(REG_ITMP3);
- /* move data segment displacement onto stack */
+ /* restore argument registers */
- disp = dseg_add_s4(cd, pref->disp);
- M_ILD(REG_ITMP3, REG_PV, disp);
- M_IST(REG_ITMP3, REG_SP, 1 * 4);
+ off = 96;
- /* move patcher function pointer onto stack */
+ for (i = 0; i < INT_ARG_CNT; ++i, off += 8) {
+ M_ILD(abi_registers_integer_argument[i], REG_SP, off + 4);
+ }
- disp = dseg_add_functionptr(cd, pref->patcher);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_AST(REG_ITMP3, REG_SP, 0 * 4);
+ for (i = 0; i < FLT_ARG_CNT; ++i, off += 8) {
+ M_DLD(abi_registers_float_argument[i], REG_SP, off);
+ }
- if (targetdisp == 0) {
- targetdisp = (cd->mcodeptr) - (cd->mcodebase);
+ /* restore temporary registers for leaf methods */
- disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_JMP(RN, REG_ITMP3);
+ if (jd->isleafmethod) {
+ for (i = 0; i < INT_TMP_CNT; ++i, off += 8) {
+ M_ILD(abi_registers_integer_temporary[i], REG_SP, off);
}
- else {
- disp = ((cd->mcodebase) + targetdisp) -
- (( cd->mcodeptr) );
- emit_branch(cd, disp, BRANCH_UNCONDITIONAL, RN, 0);
+ for (i = 0; i < FLT_TMP_CNT; ++i, off += 8) {
+ M_DLD(abi_registers_float_temporary[i], REG_SP, off);
}
}
-}
-
-
-/* emit_replacement_stubs ******************************************************
-
- Generates the code for the replacement stubs.
-
-*******************************************************************************/
-
-void emit_replacement_stubs(jitdata *jd)
-{
-#if 0
- codegendata *cd;
- codeinfo *code;
- rplpoint *rplp;
- s4 disp;
- s4 i;
-
- /* get required compiler data */
-
- cd = jd->cd;
- code = jd->code;
-
- rplp = code->rplpoints;
-
- for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
- /* check code segment size */
-
- MCODECHECK(512);
-
- /* note start of stub code */
-
- rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
- /* make machine code for patching */
+ /* remove stack frame */
- disp = (ptrint) (rplp->outcode - rplp->pc) - 5;
-
- rplp->mcode = 0xe9 | ((u8) disp << 8);
-
- /* push address of `rplpoint` struct */
-
- M_MOV_IMM(rplp, REG_ITMP3);
- M_PUSH(REG_ITMP3);
-
- /* jump to replacement function */
-
- M_MOV_IMM(asm_replacement_out, REG_ITMP3);
- M_JMP(REG_ITMP3);
- }
-#endif
-}
-
-
-/* emit_verbosecall_enter ******************************************************
+ M_AADD_IMM(stackframesize, REG_SP);
- Generates the code for the call trace.
+ /* mark trace code */
-*******************************************************************************/
+ M_NOP;
-#if !defined(NDEBUG)
-void emit_verbosecall_enter(jitdata *jd)
-{
-
+#else
methodinfo *m;
codegendata *cd;
methoddesc *md;
/* offset to where first float arg is saved on stack */
foff = off + (INT_ARG_CNT * 8);
/* offset to where first argument is passed on stack */
- aoff = (2 * 8) + stackframesize + (cd->stackframesize * 4);
+ aoff = (2 * 8) + stackframesize + (cd->stackframesize * 8);
/* offset to destination on stack */
doff = 0;
if (IS_FLT_DBL_TYPE(t)) {
if (fargctr < 2) { /* passed in register */
- N_STD(REG_FA0 + fargctr, doff, RN, REG_SP);
+ N_STD(abi_registers_float_argument[fargctr], doff, RN, REG_SP);
fargctr += 1;
} else { /* passed on stack */
+ /*
if (IS_2_WORD_TYPE(t)) {
N_MVC(doff, 8, REG_SP, aoff, REG_SP);
- aoff += 8;
} else {
N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
- aoff += 4;
}
+ */
+ N_MVC(doff, 8, REG_SP, aoff, REG_SP);
+ aoff += 8;
}
} else {
if (IS_2_WORD_TYPE(t)) {
iargctr += 1;
} else { /* passed on stack */
N_MVC(doff + 4, 4, REG_SP, aoff, REG_SP);
- aoff += 4;
+ aoff += 8;
}
}
}
/* Finally load methodinfo argument */
disp = dseg_add_address(cd, m);
- M_ALD(REG_ITMP2, REG_PV, disp);
+ M_ALD_DSEG(REG_ITMP2, disp);
M_AST(REG_ITMP2, REG_SP, 6 * 8);
/* Call builtin_verbosecall_enter */
disp = dseg_add_address(cd, builtin_verbosecall_enter);
- M_ALD(REG_ITMP2, REG_PV, disp);
+ M_ALD_DSEG(REG_ITMP2, disp);
M_ASUB_IMM(96, REG_SP);
M_CALL(REG_ITMP2);
M_AADD_IMM(96, REG_SP);
/* mark trace code */
M_NOP;
+#endif
}
#endif /* !defined(NDEBUG) */
#if !defined(NDEBUG)
void emit_verbosecall_exit(jitdata *jd)
{
+#if 1
+ methodinfo *m;
+ codegendata *cd;
+ s4 disp;
+ s4 stackframesize;
+
+ m = jd->m;
+ cd = jd->cd;
+
+ /* mark trace code */
+
+ M_NOP;
+
+ /* allocate stackframe */
+
+ stackframesize = 96 + (3 * 8);
+ M_ASUB_IMM(stackframesize, REG_SP);
+
+ /* store return values in array and sign extend them */
+
+ M_IST(REG_RESULT, REG_SP, 96 + (0 * 8) + 4);
+ M_SRA_IMM(31, REG_RESULT);
+ M_IST(REG_RESULT, REG_SP, 96 + (0 * 8));
+
+ M_IST(REG_RESULT2, REG_SP, 96 + (1 * 8) + 4);
+ M_SRA_IMM(31, REG_RESULT2);
+ M_IST(REG_RESULT2, REG_SP, 96 + (1 * 8));
+
+ M_DST(REG_FRESULT, REG_SP, 96 + (2 * 8));
+
+ /* call trace_java_call_exit */
+
+ disp = dseg_add_address(cd, m);
+ M_ALD_DSEG(REG_A0, disp);
+ M_LDA(REG_A1, REG_SP, 96);
+ disp = dseg_add_functionptr(cd, trace_java_call_exit);
+ M_ALD_DSEG(REG_ITMP3, disp);
+ M_CALL(REG_ITMP3);
+
+ /* restore return values */
+
+ M_ILD(REG_RESULT, REG_SP, 96 + (0 * 8) + 4);
+ M_ILD(REG_RESULT2, REG_SP, 96 + (1 * 8) + 4);
+ M_DLD(REG_FRESULT, REG_SP, 96 + (2 * 8));
+
+ /* remove stackframe */
+
+ M_AADD_IMM(stackframesize, REG_SP);
+
+ /* mark trace code */
+
+ M_NOP;
+
+#else
+
methodinfo *m;
codegendata *cd;
registerdata *rd;
}
disp = dseg_add_address(cd, m);
- M_ALD(REG_A2, REG_PV, disp);
+ M_ALD_DSEG(REG_A2, disp);
/* REG_FRESULT is REG_FA0, so no need to move */
M_FLTMOVE(REG_FRESULT, REG_FA1);
disp = dseg_add_address(cd, builtin_verbosecall_exit);
- M_ALD(REG_ITMP1, REG_PV, disp);
+ M_ALD_DSEG(REG_ITMP1, disp);
M_ASUB_IMM(96, REG_SP);
M_CALL(REG_ITMP1);
M_AADD_IMM(96, REG_SP);
/* mark trace code */
M_NOP;
+#endif
}
#endif /* !defined(NDEBUG) */
*******************************************************************************/
-__PORTED__ s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
+s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
{
codegendata *cd;
s4 disp;
if (IS_INMEMORY(src->flags)) {
COUNT_SPILLS;
- disp = src->vv.regoff * 4;
+ disp = src->vv.regoff;
M_ILD(tempreg, REG_SP, disp);
*******************************************************************************/
-__PORTED__ s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
+s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
{
codegendata *cd;
s4 disp;
if (IS_INMEMORY(src->flags)) {
COUNT_SPILLS;
- disp = src->vv.regoff * 4;
+ disp = src->vv.regoff;
M_ILD(tempreg, REG_SP, disp + 4);
codegendata *cd = jd->cd;
s4 reg = emit_load_s2(jd, iptr, tempreg);
if (reg == 0) {
- M_MOV(reg, tempreg);
+ if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
+ M_FMOV(reg, tempreg);
+ } else {
+ M_MOV(reg, tempreg);
+ }
return tempreg;
} else {
return reg;
codegendata *cd = jd->cd;
s4 reg = emit_load_s1(jd, iptr, tempreg);
if (reg == notreg) {
- M_MOV(reg, tempreg);
+ if (IS_FLT_DBL_TYPE(VAROP(iptr->s1)->type)) {
+ M_FMOV(reg, tempreg);
+ } else {
+ M_MOV(reg, tempreg);
+ }
return tempreg;
} else {
return reg;
codegendata *cd = jd->cd;
s4 reg = emit_load_s2(jd, iptr, tempreg);
if (reg == notreg) {
- M_MOV(reg, tempreg);
+ if (IS_FLT_DBL_TYPE(VAROP(iptr->sx.s23.s2)->type)) {
+ M_FMOV(reg, tempreg);
+ } else {
+ M_MOV(reg, tempreg);
+ }
return tempreg;
} else {
return reg;
/* The actual long branch */
- disp = dseg_add_s4(cd, branchmpc + disp);
- M_ILD(REG_ITMP3, REG_PV, disp);
+ disp = dseg_add_s4(cd, branchmpc + disp - N_PV_OFFSET);
+ M_ILD_DSEG(REG_ITMP3, disp);
M_AADD(REG_PV, REG_ITMP3);
M_JMP(RN, REG_ITMP3);
/* Size is s4, >= 0
* Do unsigned comparison to catch negative indexes.
*/
- N_CL(s2, OFFSET(java_arrayheader, size), RN, s1);
+ N_CL(s2, OFFSET(java_array_t, size), RN, s1);
M_BLT(SZ_BRC + SZ_ILL);
M_ILL2(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
}
}
void emit_restore_pv(codegendata *cd) {
- s4 offset;
+ s4 offset, offset_imm;
/*
N_BASR(REG_PV, RN);
/* Displacement from start of method to here */
offset = (s4) (cd->mcodeptr - cd->mcodebase);
+ offset_imm = -offset - SZ_BASR + N_PV_OFFSET;
- if (N_VALID_IMM(-(offset + SZ_BASR))) {
+ if (N_VALID_IMM(offset_imm)) {
/* Get program counter */
N_BASR(REG_PV, RN);
/* Substract displacement */
- M_ASUB_IMM(offset + SZ_BASR, REG_PV);
+ M_AADD_IMM(offset_imm, REG_PV);
} else {
/* Save program counter and jump over displacement in instruction flow */
N_BRAS(REG_PV, SZ_BRAS + SZ_LONG);
/* Place displacement here */
/* REG_PV points now exactly to this position */
- N_LONG(offset + SZ_BRAS);
+ N_LONG(-offset - SZ_BRAS + N_PV_OFFSET);
/* Substract *(REG_PV) from REG_PV */
- N_S(REG_PV, 0, RN, REG_PV);
+ N_A(REG_PV, 0, RN, REG_PV);
}
}
projects / cacao.git / blobdiff