* src/mm/memory.cpp,

[cacao.git] / src / vm / jit / reg.c

diff --git a/src/vm/jit/reg.c b/src/vm/jit/reg.c
index 53898c09189c73f859af8c3536f0e392027c40e6..8dff2425134056e04f727d2b2641da7edee7dede 100644 (file)
--- a/src/vm/jit/reg.c
+++ b/src/vm/jit/reg.c
@@ -1,6 +1,6 @@
 /* src/vm/jit/reg.c - register allocator setup
 
-   Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
+   Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
    J. Wenninger, Institut f. Computersprachen - TU Wien
@@ -22,18 +22,6 @@
    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    02110-1301, USA.
 
-   Contact: cacao@cacaojvm.org
-
-   Authors: Andreas Krall
-
-   Changes: Stefan Ring
-            Christian Thalinger
-            Christian Ullrich
-            Michael Starzinger
-            Edwin Steiner
-
-   $Id: reg.c 5231 2006-08-11 10:13:28Z twisti $
-
 */
 
 
@@ -46,7 +34,7 @@
 #include "arch.h"
 #include "md-abi.h"
 
-#include "mm/memory.h"
+#include "mm/memory.hpp"
 #include "vm/jit/abi.h"
 #include "vm/jit/reg.h"
 
@@ -62,7 +50,6 @@ void reg_setup(jitdata *jd)
        methodinfo   *m;
        registerdata *rd;
        s4            i;
-       varinfo5     *v;
 
        /* get required compiler data */
 
@@ -71,15 +58,6 @@ void reg_setup(jitdata *jd)
 
        /* setup the integer register table */
 
-#if defined(__ARM__)
-       /* On ARM longs can be split across argument regs and stack. This is
-        * signed by setting the HIGH_REG to INT_ARG_CNT in md_param_alloc().
-        * Here we make sure it resolves to a special dummy reg (REG_SPLIT). */
-       rd->argintregs = DMNEW(s4, INT_ARG_CNT + 1);
-       rd->argintregs[INT_ARG_CNT] = REG_SPLIT;
-#else
-       rd->argintregs = DMNEW(s4, INT_ARG_CNT);
-#endif
        rd->tmpintregs = DMNEW(s4, INT_TMP_CNT);
        rd->savintregs = DMNEW(s4, INT_SAV_CNT);
        rd->freeargintregs = DMNEW(s4, INT_ARG_CNT);
@@ -101,29 +79,11 @@ void reg_setup(jitdata *jd)
                case REG_TMP:
                        rd->tmpintregs[rd->tmpintreguse++] = i; 
                        break;
-               case REG_ARG:
-                       rd->argintregs[rd->argintreguse++] = i;
-                       break;
                }
        }
        assert(rd->savintreguse == INT_SAV_CNT);
        assert(rd->tmpintreguse == INT_TMP_CNT);
-       assert(rd->argintreguse == INT_ARG_CNT);
-
-#if defined(__X86_64__)
-       /* 
-        * on x86_64 the argument registers are not in ascending order 
-        * a00 (%rdi) <-> a03 (%rcx) and a01 (%rsi) <-> a02 (%rdx)
-        */
-       i = rd->argintregs[3];
-       rd->argintregs[3] = rd->argintregs[0];
-       rd->argintregs[0] = i;
-
-       i = rd->argintregs[2];
-       rd->argintregs[2] = rd->argintregs[1];
-       rd->argintregs[1] = i;
-#endif
-               
+
 #ifdef HAS_ADDRESS_REGISTER_FILE
        /* setup the address register table */
 
@@ -134,7 +94,7 @@ void reg_setup(jitdata *jd)
        rd->freetmpadrregs = DMNEW(s4, ADR_TMP_CNT);
        rd->freesavadrregs = DMNEW(s4, ADR_SAV_CNT);
 
-       rd->adrreg_argnum = 0;
+       /*rd->adrreg_argnum = 0; XXX ask twisti */
        rd->argadrreguse = 0;
        rd->tmpadrreguse = 0;
        rd->savadrreguse = 0;
@@ -159,10 +119,9 @@ void reg_setup(jitdata *jd)
        assert(rd->tmpadrreguse == ADR_TMP_CNT);
        assert(rd->argadrreguse == ADR_ARG_CNT);
 #endif
-               
+
        /* setup the float register table */
 
-       rd->argfltregs = DMNEW(s4, FLT_ARG_CNT);
        rd->tmpfltregs = DMNEW(s4, FLT_TMP_CNT);
        rd->savfltregs = DMNEW(s4, FLT_SAV_CNT);
        rd->freeargfltregs = DMNEW(s4, FLT_ARG_CNT);
@@ -184,54 +143,12 @@ void reg_setup(jitdata *jd)
                case REG_TMP:
                        rd->tmpfltregs[rd->tmpfltreguse++] = i;
                        break;
-               case REG_ARG:
-                       rd->argfltregs[rd->argfltreguse++] = i;
-                       break;
                }
        }
        assert(rd->savfltreguse == FLT_SAV_CNT);
        assert(rd->tmpfltreguse == FLT_TMP_CNT);
-       assert(rd->argfltreguse == FLT_ARG_CNT);
-
 
        rd->freemem    = DMNEW(s4, m->maxstack);
-#if defined(HAS_4BYTE_STACKSLOT)
-       rd->freemem_2  = DMNEW(s4, m->maxstack);
-#endif
-       rd->locals     = DMNEW(varinfo5, m->maxlocals);
-       rd->interfaces = DMNEW(varinfo5, m->maxstack);
-       for (v = rd->locals, i = m->maxlocals; i > 0; v++, i--) {
-               v[0][TYPE_INT].type = -1;
-               v[0][TYPE_LNG].type = -1;
-               v[0][TYPE_FLT].type = -1;
-               v[0][TYPE_DBL].type = -1;
-               v[0][TYPE_ADR].type = -1;
-
-               v[0][TYPE_INT].regoff = 0;
-               v[0][TYPE_LNG].regoff = 0;
-               v[0][TYPE_FLT].regoff = 0;
-               v[0][TYPE_DBL].regoff = 0;
-               v[0][TYPE_ADR].regoff = 0;
-       }
-
-       for (v = rd->interfaces, i = m->maxstack; i > 0; v++, i--) {
-               v[0][TYPE_INT].type = -1;
-               v[0][TYPE_INT].flags = 0;
-               v[0][TYPE_LNG].type = -1;
-               v[0][TYPE_LNG].flags = 0;
-               v[0][TYPE_FLT].type = -1;
-               v[0][TYPE_FLT].flags = 0;
-               v[0][TYPE_DBL].type = -1;
-               v[0][TYPE_DBL].flags = 0;
-               v[0][TYPE_ADR].type = -1;
-               v[0][TYPE_ADR].flags = 0;
-
-               v[0][TYPE_INT].regoff = 0;
-               v[0][TYPE_LNG].regoff = 0;
-               v[0][TYPE_FLT].regoff = 0;
-               v[0][TYPE_DBL].regoff = 0;
-               v[0][TYPE_ADR].regoff = 0;
-       }
 
 #if defined(SPECIALMEMUSE)
 # if defined(__DARWIN__)