/* src/vm/jit/powerpc64/linux/md-os.c - machine dependent PowerPC64 Linux functions
- Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: md-os.c 7582 2007-03-26 09:27:10Z tbfg $
-
*/
#include "config.h"
#include <assert.h>
+#include <stdint.h>
#include <ucontext.h>
#include "vm/types.h"
#include "vm/jit/powerpc64/codegen.h"
+#include "vm/jit/powerpc64/md.h"
#include "vm/jit/powerpc64/linux/md-abi.h"
-#if defined(ENABLE_THREADS)
-# include "threads/native/threads.h"
-#endif
+#include "threads/thread.h"
+#include "vm/builtin.h"
#include "vm/exceptions.h"
#include "vm/signallocal.h"
#endif
#include "vm/jit/stacktrace.h"
+#include "vm/jit/trap.h"
/* md_signal_handler_sigsegv ***************************************************
void md_signal_handler_sigsegv(int sig, siginfo_t *siginfo, void *_p)
{
- ucontext_t *_uc;
- mcontext_t *_mc;
- u1 *pv;
- u1 *sp;
- u1 *ra;
- u1 *xpc;
- u4 mcode;
- s4 s1;
- s4 disp;
- s4 d;
- s4 type;
- ptrint addr;
- ptrint val;
- java_objectheader *e;
+ ucontext_t *_uc;
+ mcontext_t *_mc;
+ u1 *pv;
+ u1 *sp;
+ u1 *ra;
+ u1 *xpc;
+ u4 mcode;
+ int s1;
+ int16_t disp;
+ int d;
+ int type;
+ intptr_t addr;
+ intptr_t val;
+ void *p;
_uc = (ucontext_t *) _p;
_mc = &(_uc->uc_mcontext);
/* get register values */
+
pv = (u1*) _mc->gp_regs[REG_PV];
sp = (u1*) _mc->gp_regs[REG_SP];
ra = (u1*) _mc->gp_regs[PT_LNK]; /* correct for leafs */
xpc =(u1*) _mc->gp_regs[PT_NIP];
/* get the throwing instruction */
+
mcode = *((u4*)xpc);
s1 = M_INSTR_OP2_IMM_A(mcode);
val = _mc->gp_regs[d];
- if (s1 == REG_ZERO) {
- /* we use the exception type as load displacement */
+ if (s1 == REG_ZERO) {
+ /* We use the exception type as load displacement. */
type = disp;
- } else {
- /* normal NPE */
+
+ if (type == TRAP_COMPILER) {
+ /* The XPC is the RA minus 1, because the RA points to the
+ instruction after the call. */
+
+ xpc = ra - 4;
+ }
+ }
+ else {
+ /* Normal NPE. */
addr = _mc->gp_regs[s1];
- type = (s4) addr;
+ type = (int) addr;
}
- e = exceptions_new_hardware_exception(pv, sp, ra, xpc, type, val);
- _mc->gp_regs[REG_ITMP1] = (ptrint) e;
- _mc->gp_regs[REG_ITMP2_XPC] = (ptrint) xpc;
- _mc->gp_regs[PT_NIP] = (ptrint) asm_handle_exception;
+ /* Handle the trap. */
+
+ p = trap_handle(type, val, pv, sp, ra, xpc, _p);
+
+ /* Set registers. */
+
+ switch (type) {
+ case TRAP_COMPILER:
+ if (p != NULL) {
+ _mc->gp_regs[REG_PV] = (uintptr_t) p;
+ _mc->gp_regs[PT_NIP] = (uintptr_t) p;
+ break;
+ }
+
+ /* Get and set the PV from the parent Java method. */
+
+ pv = md_codegen_get_pv_from_pc(ra);
+
+ _mc->gp_regs[REG_PV] = (uintptr_t) pv;
+
+ /* Get the exception object. */
+
+ p = builtin_retrieve_exception();
+
+ assert(p != NULL);
+
+ /* fall-through */
+
+ case TRAP_PATCHER:
+ if (p == NULL)
+ break;
+
+ /* fall-through */
+
+ default:
+ _mc->gp_regs[REG_ITMP1_XPTR] = (uintptr_t) p;
+ _mc->gp_regs[REG_ITMP2_XPC] = (uintptr_t) xpc;
+ _mc->gp_regs[PT_NIP] = (uintptr_t) asm_handle_exception;
+ }
}
tobj->pc = pc;
}
-
-
-void thread_restartcriticalsection(ucontext_t *_uc)
-{
- mcontext_t *_mc;
- u1 *pc;
- void *critical;
-
- _mc = &(_uc->uc_mcontext);
-
- pc = (u1 *) _mc->gp_regs[PT_NIP];
-
- critical = critical_find_restart_point(pc);
-
- if (critical != NULL)
- _mc->gp_regs[PT_NIP] = (ptrint) critical;
-}
#endif