-/* src/vm/jit/powerpc64/emit.c - PowerPC code emitter functions
+/* src/vm/jit/powerpc64/emit.c - PowerPC64 code emitter functions
- Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- Contact: cacao@cacaojvm.org
-
- Authors: Christian Thalinger
-
- Changes:
-
- $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
-
*/
#include "vm/types.h"
-#include "md-abi.h"
+#include "mm/memory.h"
-#include "vm/jit/emit.h"
-#include "vm/jit/jit.h"
+#include "md-abi.h"
#include "vm/jit/powerpc64/codegen.h"
-#include "vm/builtin.h"
+#include "threads/lock-common.h"
-/* code generation functions **************************************************/
+#include "vm/options.h"
+#include "vm/vm.hpp"
-/* emit_load_s1 ****************************************************************
+#include "vm/jit/abi.h"
+#include "vm/jit/asmpart.h"
+#include "vm/jit/emit-common.h"
+#include "vm/jit/jit.hpp"
+#include "vm/jit/trace.hpp"
+#include "vm/jit/trap.h"
- Emits a possible load of the first source operand.
+
+/* emit_load *******************************************************************
+
+ Emits a possible load of an operand.
*******************************************************************************/
-s4 emit_load_s1(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
{
codegendata *cd;
s4 disp;
if (src->flags & INMEMORY) {
COUNT_SPILLS;
- disp = src->regoff * 4;
+ disp = src->vv.regoff;
if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
-
- } else {
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
+ M_DLD(tempreg, REG_SP, disp);
+ }
+ else {
+ M_LLD(tempreg, REG_SP, disp);
}
reg = tempreg;
- } else
- reg = src->regoff;
+ }
+ else
+ reg = src->vv.regoff;
return reg;
}
-/* emit_load_s2 ****************************************************************
+/* emit_store ******************************************************************
- Emits a possible load of the second source operand.
+ Emits a possible store to a variable.
*******************************************************************************/
-s4 emit_load_s2(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
{
codegendata *cd;
- s4 disp;
- s4 reg;
/* get required compiler data */
cd = jd->cd;
- if (src->flags & INMEMORY) {
+ if (dst->flags & INMEMORY) {
COUNT_SPILLS;
- disp = src->regoff * 4;
-
- if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
-
- } else {
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
+ if (IS_FLT_DBL_TYPE(dst->type)) {
+ M_DST(d, REG_SP, dst->vv.regoff);
}
-
- reg = tempreg;
- } else
- reg = src->regoff;
-
- return reg;
+ else {
+ M_LST(d, REG_SP, dst->vv.regoff);
+ }
+ }
}
-/* emit_load_s3 ****************************************************************
+/* emit_copy *******************************************************************
- Emits a possible load of the third source operand.
+ Generates a register/memory to register/memory copy.
*******************************************************************************/
-s4 emit_load_s3(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+void emit_copy(jitdata *jd, instruction *iptr)
{
- codegendata *cd;
- s4 disp;
- s4 reg;
+ codegendata *cd;
+ varinfo *src;
+ varinfo *dst;
+ s4 s1, d;
/* get required compiler data */
cd = jd->cd;
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
+ /* get source and destination variables */
- disp = src->regoff * 4;
+ src = VAROP(iptr->s1);
+ dst = VAROP(iptr->dst);
- if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
+ if ((src->vv.regoff != dst->vv.regoff) ||
+ ((src->flags ^ dst->flags) & INMEMORY)) {
- } else {
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
+ if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
+ /* emit nothing, as the value won't be used anyway */
+ return;
}
- reg = tempreg;
- } else
- reg = src->regoff;
+ /* If one of the variables resides in memory, we can eliminate
+ the register move from/to the temporary register with the
+ order of getting the destination register and the load. */
- return reg;
+ if (IS_INMEMORY(src->flags)) {
+ d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
+ s1 = emit_load(jd, iptr, src, d);
+ }
+ else {
+ s1 = emit_load(jd, iptr, src, REG_IFTMP);
+ d = codegen_reg_of_var(iptr->opc, dst, s1);
+ }
+
+ if (s1 != d) {
+ if (IS_FLT_DBL_TYPE(src->type))
+ M_FMOV(s1, d);
+ else
+ M_MOV(s1, d);
+ }
+
+ emit_store(jd, iptr, dst, d);
+ }
}
-/* emit_load_s1_low ************************************************************
+/* emit_iconst *****************************************************************
- Emits a possible load of the low 32-bits of the first long source
- operand.
+ XXX
*******************************************************************************/
-s4 emit_load_s1_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+void emit_iconst(codegendata *cd, s4 d, s4 value)
{
- codegendata *cd;
- s4 disp;
- s4 reg;
-
- assert(src->type == TYPE_LNG);
-
- /* get required compiler data */
-
- cd = jd->cd;
-
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
-
- disp = src->regoff * 4;
-
- M_ILD(tempreg, REG_SP, disp + 4);
+ s4 disp;
- reg = tempreg;
- } else
- reg = GET_LOW_REG(src->regoff);
+ if ((value >= -32768) && (value <= 32767)) {
+ M_LDA_INTERN(d, REG_ZERO, value);
+ } else {
+ disp = dseg_add_s4(cd, value);
+ M_ILD(d, REG_PV, disp);
+ }
+}
- return reg;
+void emit_lconst(codegendata *cd, s4 d, s8 value)
+{
+ s4 disp;
+ if ((value >= -32768) && (value <= 32767)) {
+ M_LDA_INTERN(d, REG_ZERO, value);
+ } else {
+ disp = dseg_add_s8(cd, value);
+ M_LLD(d, REG_PV, disp);
+ }
}
-/* emit_load_s2_low ************************************************************
+/* emit_verbosecall_enter ******************************************************
- Emits a possible load of the low 32-bits of the second long source
- operand.
+ Generates the code for the call trace.
*******************************************************************************/
-s4 emit_load_s2_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+#if !defined(NDEBUG)
+void emit_verbosecall_enter(jitdata *jd)
{
+ methodinfo *m;
codegendata *cd;
+ methoddesc *md;
+ int32_t paramcount;
+ int32_t stackframesize;
s4 disp;
- s4 reg;
-
- assert(src->type == TYPE_LNG);
+ s4 i, s;
/* get required compiler data */
+ m = jd->m;
cd = jd->cd;
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
-
- disp = src->regoff * 4;
-
- M_ILD(tempreg, REG_SP, disp + 4);
-
- reg = tempreg;
- } else
- reg = GET_LOW_REG(src->regoff);
-
- return reg;
-}
-
-
-/* emit_load_s3_low ************************************************************
-
- Emits a possible load of the low 32-bits of the third long source
- operand.
+ md = m->parseddesc;
+
+ /* mark trace code */
-*******************************************************************************/
+ M_NOP;
-s4 emit_load_s3_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
-{
- codegendata *cd;
- s4 disp;
- s4 reg;
+ /* align stack to 16-bytes */
- assert(src->type == TYPE_LNG);
+ paramcount = md->paramcount;
+ ALIGN_2(paramcount);
+ stackframesize = LA_SIZE + PA_SIZE + md->paramcount * 8;
- /* get required compiler data */
+ M_MFLR(REG_ZERO);
+ M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
+ M_STDU(REG_SP, REG_SP, -stackframesize);
- cd = jd->cd;
+#if defined(__DARWIN__)
+ #warning "emit_verbosecall_enter not implemented"
+#else
+ /* save argument registers */
+
+ for (i = 0; i < md->paramcount; i++) {
+ if (!md->params[i].inmemory) {
+ s = md->params[i].regoff;
+
+ switch (md->paramtypes[i].type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LST(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DST(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
+ break;
+ }
+ }
+ }
+#endif
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
+ disp = dseg_add_address(cd, m);
+ M_ALD(REG_A0, REG_PV, disp);
+ M_AADD_IMM(REG_SP, LA_SIZE+PA_SIZE, REG_A1);
+ M_AADD_IMM(REG_SP, stackframesize + cd->stackframesize * 8, REG_A2);
+ /* call via function descriptor, XXX: what about TOC? */
+ disp = dseg_add_functionptr(cd, trace_java_call_enter);
+ M_ALD(REG_ITMP2, REG_PV, disp);
+ M_ALD(REG_ITMP1, REG_ITMP2, 0);
+ M_MTCTR(REG_ITMP1);
+ M_JSR;
- disp = src->regoff * 4;
+#if defined(__DARWIN__)
+ #warning "emit_verbosecall_enter not implemented"
+#else
+ /* restore argument registers */
+
+ for (i = 0; i < md->paramcount; i++) {
+ if (!md->params[i].inmemory) {
+ s = md->params[i].regoff;
+
+ switch (md->paramtypes[i].type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LLD(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DLD(s, REG_SP, LA_SIZE+PA_SIZE+i*8);
+ break;
+ }
+ }
+ }
+#endif
- M_ILD(tempreg, REG_SP, disp + 4);
+ M_ALD(REG_ZERO, REG_SP, stackframesize + LA_LR_OFFSET);
+ M_MTLR(REG_ZERO);
+ M_LDA(REG_SP, REG_SP, stackframesize);
- reg = tempreg;
- } else
- reg = GET_LOW_REG(src->regoff);
+ /* mark trace code */
- return reg;
+ M_NOP;
}
+#endif
-/* emit_load_s1_high ***********************************************************
+/* emit_verbosecall_exit ******************************************************
- Emits a possible load of the high 32-bits of the first long source
- operand.
+ Generates the code for the call trace.
*******************************************************************************/
-s4 emit_load_s1_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+#if !defined(NDEBUG)
+void emit_verbosecall_exit(jitdata *jd)
{
+ methodinfo *m;
codegendata *cd;
+ methoddesc *md;
s4 disp;
- s4 reg;
-
- assert(src->type == TYPE_LNG);
/* get required compiler data */
+ m = jd->m;
cd = jd->cd;
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
-
- disp = src->regoff * 4;
-
- M_ILD(tempreg, REG_SP, disp);
-
- reg = tempreg;
- } else
- reg = GET_HIGH_REG(src->regoff);
-
- return reg;
-}
-
-
-/* emit_load_s2_high ***********************************************************
-
- Emits a possible load of the high 32-bits of the second long source
- operand.
-
-*******************************************************************************/
+ md = m->parseddesc;
-s4 emit_load_s2_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
-{
- codegendata *cd;
- s4 disp;
- s4 reg;
+ /* mark trace code */
- assert(src->type == TYPE_LNG);
+ M_NOP;
- /* get required compiler data */
+ M_MFLR(REG_ZERO);
+ M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
+ M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+1*8);
+
+ /* save return value */
+
+ switch (md->returntype.type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
+ break;
+ }
- cd = jd->cd;
+ disp = dseg_add_address(cd, m);
+ M_ALD(REG_A0, REG_PV, disp);
+ M_AADD_IMM(REG_SP, LA_SIZE+PA_SIZE, REG_A1);
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
+ disp = dseg_add_functionptr(cd, trace_java_call_exit);
+ /* call via function descriptor, XXX: what about TOC ? */
+ M_ALD(REG_ITMP2, REG_PV, disp);
+ M_ALD(REG_ITMP2, REG_ITMP2, 0);
+ M_MTCTR(REG_ITMP2);
+ M_JSR;
- disp = src->regoff * 4;
+ /* restore return value */
+
+ switch (md->returntype.type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ case TYPE_LNG:
+ M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+ M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
+ break;
+ }
- M_ILD(tempreg, REG_SP, disp);
+ M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+1*8);
+ M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
+ M_MTLR(REG_ZERO);
- reg = tempreg;
- } else
- reg = GET_HIGH_REG(src->regoff);
+ /* mark trace code */
- return reg;
+ M_NOP;
}
+#endif
-/* emit_load_s3_high ***********************************************************
+/* emit_branch *****************************************************************
- Emits a possible load of the high 32-bits of the third long source
- operand.
+ Emits the code for conditional and unconditional branchs.
*******************************************************************************/
-s4 emit_load_s3_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
{
- codegendata *cd;
- s4 disp;
- s4 reg;
+ s4 checkdisp;
+ s4 branchdisp;
- assert(src->type == TYPE_LNG);
+ /* calculate the different displacements */
- /* get required compiler data */
+ checkdisp = disp + 4;
+ branchdisp = (disp - 4) >> 2;
- cd = jd->cd;
+ /* check which branch to generate */
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
+ if (condition == BRANCH_UNCONDITIONAL) {
+ /* check displacement for overflow */
- disp = src->regoff * 4;
+ if ((checkdisp < (s4) 0xfe000000) || (checkdisp > (s4) 0x01fffffc)) {
+ /* if the long-branches flag isn't set yet, do it */
- M_ILD(tempreg, REG_SP, disp);
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
- reg = tempreg;
- } else
- reg = GET_HIGH_REG(src->regoff);
+ vm_abort("emit_branch: emit unconditional long-branch code");
+ }
+ else {
+ M_BR(branchdisp);
+ }
+ }
+ else {
+ /* and displacement for overflow */
- return reg;
-}
+ if ((checkdisp < (s4) 0xffff8000) || (checkdisp > (s4) 0x00007fff)) {
+ /* if the long-branches flag isn't set yet, do it */
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
-/* emit_store ******************************************************************
+ branchdisp --; /* we jump from the second instruction */
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BNE(1);
+ M_BR(branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BEQ(1);
+ M_BR(branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BGE(1);
+ M_BR(branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BLT(1);
+ M_BR(branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BLE(1);
+ M_BR(branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BGT(1);
+ M_BR(branchdisp);
+ break;
+ case BRANCH_NAN:
+ vm_abort("emit_branch: long BRANCH_NAN");
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
- XXX
+ }
+ else {
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BEQ(branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BNE(branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BLT(branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BGE(branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BGT(branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BLE(branchdisp);
+ break;
+ case BRANCH_NAN:
+ M_BNAN(branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
+ }
+ }
+}
+
+/* emit_arrayindexoutofbounds_check ********************************************
+
+ Emit a ArrayIndexOutOfBoundsException check.
*******************************************************************************/
-void emit_store(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
+void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
{
- codegendata *cd;
+ if (checkbounds) {
+ M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
+ M_CMPU(s2, REG_ITMP3);
+ M_BLT(1);
+ /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
+ M_LWZ(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
+ }
+}
- /* get required compiler data */
- cd = jd->cd;
+/* emit_arraystore_check *******************************************************
- if (dst->flags & INMEMORY) {
- COUNT_SPILLS;
+ Emit an ArrayStoreException check.
- if (IS_FLT_DBL_TYPE(dst->type)) {
- if (IS_2_WORD_TYPE(dst->type))
- M_DST(d, REG_SP, dst->regoff * 4);
- else
- M_FST(d, REG_SP, dst->regoff * 4);
+*******************************************************************************/
- } else {
- if (IS_2_WORD_TYPE(dst->type))
- M_LST(d, REG_SP, dst->regoff * 4);
- else
- M_IST(d, REG_SP, dst->regoff * 4);
- }
+void emit_arraystore_check(codegendata *cd, instruction *iptr)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TST(REG_RESULT);
+ M_BNE(1);
+ /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
+ M_LWZ(REG_ZERO, REG_ZERO, TRAP_ArrayStoreException);
}
}
-/* emit_copy *******************************************************************
+/* emit_arithmetic_check *******************************************************
- XXX
+ Emit an ArithmeticException check.
*******************************************************************************/
-void emit_copy(jitdata *jd, instruction *iptr, stackptr src, stackptr dst)
+void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
{
- codegendata *cd;
- registerdata *rd;
- s4 s1, d;
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TST(reg);
+ M_BNE(1);
+ /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
+ M_LWZ(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
+ }
+}
- /* get required compiler data */
- cd = jd->cd;
- rd = jd->rd;
+/* emit_classcast_check ********************************************************
- if (src->type == TYPE_LNG)
- d = codegen_reg_of_var(rd, iptr->opc, dst, PACK_REGS(REG_ITMP2, REG_ITMP1));
- else
- d = codegen_reg_of_var(rd, iptr->opc, dst, REG_IFTMP);
+ Emit a ClassCastException check.
- if ((src->regoff != dst->regoff) ||
- ((src->flags ^ dst->flags) & INMEMORY)) {
- s1 = emit_load_s1(jd, iptr, src, d);
+*******************************************************************************/
- if (s1 != d) {
- if (IS_FLT_DBL_TYPE(src->type))
- M_FMOV(s1, d);
- else {
- if (IS_2_WORD_TYPE(src->type)) {
- M_MOV(GET_LOW_REG(s1), GET_LOW_REG(d));
- M_MOV(GET_HIGH_REG(s1), GET_HIGH_REG(d));
- } else
- M_MOV(s1, d);
- }
+void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ switch(condition) {
+ case BRANCH_LE:
+ M_BGT(1);
+ break;
+ case BRANCH_EQ:
+ M_BNE(1);
+ break;
+ case BRANCH_GT:
+ M_BLE(1);
+ break;
+ default:
+ vm_abort("emit_classcast_check: unknown condition %d", condition);
}
- emit_store(jd, iptr, dst, d);
+ /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
+ M_LWZ(s1, REG_ZERO, TRAP_ClassCastException);
}
}
-/* emit_iconst *****************************************************************
+/* emit_nullpointer_check ******************************************************
- XXX
+ Emit a NullPointerException check.
*******************************************************************************/
-void emit_iconst(codegendata *cd, s4 d, s4 value)
+void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
{
- s4 disp;
-
- if ((value >= -32768) && (value <= 32767))
- M_LDA_INTERN(d, REG_ZERO, value);
- else {
- disp = dseg_adds4(cd, value);
- M_ILD(d, REG_PV, disp);
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TST(reg);
+ M_BNE(1);
+ /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
+ M_LWZ(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
}
}
-/* emit_verbosecall_enter ******************************************************
- *
- * Generates the code for the call trace.
- *
- ********************************************************************************/
-void emit_verbosecall_enter (jitdata *jd)
-{
- methodinfo *m;
- codegendata *cd;
- registerdata *rd;
- s4 s1, p, t, d;
-/* int stack_off; */
- int stack_size;
- methoddesc *md;
+/* emit_exception_check ********************************************************
- /* get required compiler data */
-
- m = jd->m;
- cd = jd->cd;
- rd = jd->rd;
-
- md = m->parseddesc;
-
- /* Build up Stackframe for builtin_trace_args call (a multiple of 16) */
- /* For Darwin: */
- /* TODO */
- /* For Linux: */
- /* setup stack for TRACE_ARGS_NUM registers */
- /* == LA_SIZE + PA_SIZE + 8 (methodinfo argument) + TRACE_ARGS_NUM*8 + 8 (itmp1) */
-
- /* in nativestubs no Place to save the LR (Link Register) would be needed */
- /* but since the stack frame has to be aligned the 4 Bytes would have to */
- /* be padded again */
+ Emit an Exception check.
-#if defined(__DARWIN__)
- stack_size = LA_SIZE + (TRACE_ARGS_NUM + 1) * 8;
-#else
- stack_size = LA_SIZE + PA_SIZE + 8 + TRACE_ARGS_NUM * 8 + 8;
-#endif
-
- /* mark trace code */
- M_NOP;
-
- /* save up to TRACE_ARGS_NUM arguments into the reserved stack space */
-#if 0
-#if defined(__DARWIN__)
- /* Copy Params starting from first to Stack */
- /* since TRACE_ARGS == INT_ARG_CNT all used integer argument regs */
- /* are saved */
- p = 0;
-#else
- /* Copy Params starting from fifth to Stack (INT_ARG_CNT/2) are in */
- /* integer argument regs */
- /* all integer argument registers have to be saved */
- for (p = 0; p < 8; p++) {
- d = rd->argintregs[p];
- /* save integer argument registers */
- M_LST(d, REG_SP, LA_SIZE + PA_SIZE + 4 * 8 + 8 + p * 8);
- }
- p = 4;
-#endif
-#endif
- M_MFLR(REG_ZERO);
- M_AST(REG_ZERO, REG_SP, LA_LR_OFFSET);
- M_STDU(REG_SP, REG_SP, -stack_size);
-
- for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
- t = md->paramtypes[p].type;
- if (IS_INT_LNG_TYPE(t)) {
- if (!md->params[p].inmemory) { /* Param in Arg Reg */
- M_LST(rd->argintregs[md->params[p].regoff], REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
- } else { /* Param on Stack */
- s1 = (md->params[p].regoff + cd->stackframesize) * 8 + stack_size;
- M_LLD(REG_ITMP2, REG_SP, s1);
- M_LST(REG_ITMP2, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
- }
- } else { /* IS_FLT_DBL_TYPE(t) */
- if (!md->params[p].inmemory) { /* in Arg Reg */
- s1 = rd->argfltregs[md->params[p].regoff];
- M_DST(s1, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
- } else { /* on Stack */
- /* this should not happen */
- assert(0);
- }
- }
- }
+*******************************************************************************/
- /* load first 4 (==INT_ARG_CNT/2) arguments into integer registers */
-#if defined(__DARWIN__)
- for (p = 0; p < 8; p++) {
- d = rd->argintregs[p];
- M_ILD(d, REG_SP, LA_SIZE + p * 4);
- }
-#else
- /* LINUX */
- /* Set integer and float argument registers for trace_args call */
- /* offset to saved integer argument registers */
- for (p = 0; (p < TRACE_ARGS_NUM) && (p < md->paramcount); p++) {
- t = md->paramtypes[p].type;
- if (IS_INT_LNG_TYPE(t)) {
- M_LLD(rd->argintregs[p], REG_SP,LA_SIZE + PA_SIZE + 8 + p * 8);
- } else { /* Float/Dbl */
- if (!md->params[p].inmemory) { /* Param in Arg Reg */
- /* use reserved Place on Stack (sp + 5 * 16) to copy */
- /* float/double arg reg to int reg */
- s1 = rd->argfltregs[md->params[p].regoff];
- M_MOV(s1, rd->argintregs[p]);
- } else {
- assert(0);
- }
- }
+void emit_exception_check(codegendata *cd, instruction *iptr)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TST(REG_RESULT);
+ M_BNE(1);
+ /* ALD is 4 byte aligned, ILD 2, onyl LWZ is byte aligned */
+ M_LWZ(REG_ZERO, REG_ZERO, TRAP_CHECK_EXCEPTION);
}
-#endif
+}
- /* put methodinfo pointer on Stackframe */
- p = dseg_addaddress(cd, m);
- M_ALD(REG_ITMP1, REG_PV, p);
-#if defined(__DARWIN__)
- M_AST(REG_ITMP1, REG_SP, LA_SIZE + TRACE_ARGS_NUM * 8);
-#else
- if (TRACE_ARGS_NUM == 8) {
- /* need to pass via stack */
- M_AST(REG_ITMP1, REG_SP, LA_SIZE + PA_SIZE);
- } else {
- /* pass via register, reg 3 is the first */
- M_MOV(REG_ITMP1, 3 + TRACE_ARGS_NUM);
- }
-#endif
- /* call via function descriptor */
- /* XXX: what about TOC? */
- p = dseg_addaddress(cd, builtin_trace_args);
- M_ALD(REG_ITMP2, REG_PV, p);
- M_ALD(REG_ITMP1, REG_ITMP2, 0);
- M_MTCTR(REG_ITMP1);
- M_JSR;
-#if defined(__DARWIN__)
- /* restore integer argument registers from the reserved stack space */
+/* emit_trap_compiler **********************************************************
- stack_off = LA_SIZE;
- for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++, stack_off += 8) {
- t = md->paramtypes[p].type;
+ Emit a trap instruction which calls the JIT compiler.
- if (IS_INT_LNG_TYPE(t)) {
- if (!md->params[p].inmemory) {
- M_LLD(rd->argintregs[md->params[p].regoff], REG_SP, stack_off);
- } else {
- assert(0);
- }
- }
- }
-#else
- /* LINUX */
- for (p = 0; p < md->paramcount && p < TRACE_ARGS_NUM; p++) {
- d = rd->argintregs[p];
- /* restore integer argument registers */
- M_LLD(d, REG_SP, LA_SIZE + PA_SIZE + 8 + p * 8);
- }
-#endif
- M_ALD(REG_ZERO, REG_SP, stack_size + LA_LR_OFFSET);
- M_MTLR(REG_ZERO);
- M_LDA(REG_SP, REG_SP, stack_size);
+*******************************************************************************/
- /* mark trace code */
- M_NOP;
+void emit_trap_compiler(codegendata *cd)
+{
+ M_LWZ(REG_METHODPTR, REG_ZERO, TRAP_COMPILER);
}
-/* emit_verbosecall_exit ******************************************************
- *
- * Generates the code for the call trace.
- *
- ********************************************************************************/
-void emit_verbosecall_exit(jitdata *jd)
-{
- codegendata *cd = jd->cd;
- s4 disp;
- /* mark trace code */
- M_NOP;
+/* emit_trap *******************************************************************
- M_MFLR(REG_ZERO);
- M_LDA(REG_SP, REG_SP, -(LA_SIZE+PA_SIZE+10*8));
- M_DST(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
- M_LST(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
- M_AST(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
+ Emit a trap instruction and return the original machine code.
-#if defined(__DARWIN__)
- M_MOV(REG_RESULT, jd->rd->argintregs[1]);
-#else
- M_MOV(REG_RESULT, jd->rd->argintregs[1]);
-#endif
+*******************************************************************************/
- disp = dseg_addaddress(cd, jd->m);
- M_ALD(jd->rd->argintregs[0], REG_PV, disp);
+uint32_t emit_trap(codegendata *cd)
+{
+ uint32_t mcode;
- M_FLTMOVE(REG_FRESULT, jd->rd->argfltregs[0]);
- M_FLTMOVE(REG_FRESULT, jd->rd->argfltregs[1]);
- disp = dseg_addaddress(cd, builtin_displaymethodstop);
- /* call via function descriptor, XXX: what about TOC ? */
- M_ALD(REG_ITMP2, REG_PV, disp);
- M_ALD(REG_ITMP2, REG_ITMP2, 0);
- M_MTCTR(REG_ITMP2);
- M_JSR;
+ /* Get machine code which is patched back in later. The
+ trap is 1 instruction word long. */
- M_DLD(REG_FRESULT, REG_SP, LA_SIZE+PA_SIZE+0*8);
- M_LLD(REG_RESULT, REG_SP, LA_SIZE+PA_SIZE+1*8);
- M_ALD(REG_ZERO, REG_SP, LA_SIZE+PA_SIZE+2*8);
- M_LDA(REG_SP, REG_SP, LA_SIZE+PA_SIZE+10*8);
- M_MTLR(REG_ZERO);
+ mcode = *((uint32_t *) cd->mcodeptr);
- /* mark trace code */
- M_NOP;
-}
+ /* ALD is 4 byte aligned, ILD 2, only LWZ is byte aligned */
+ M_LWZ(REG_ZERO, REG_ZERO, TRAP_PATCHER);
+ return mcode;
+}
/*
projects / cacao.git / blobdiff