Proper x86_64 mnemonics

[cacao.git] / src / vm / jit / powerpc / machine-instr.h

diff --git a/src/vm/jit/powerpc/machine-instr.h b/src/vm/jit/powerpc/machine-instr.h
index c7720501a3ce9d4862168e27317c917163a8ee47..8c7ba6ea41c975433a55d1edf673a9d4993c804d 100644 (file)
--- a/src/vm/jit/powerpc/machine-instr.h
+++ b/src/vm/jit/powerpc/machine-instr.h
@@ -3,23 +3,24 @@
 
 static inline long compare_and_swap(long *p, long oldval, long newval)
 {
-    if (*p == oldval) {
-        *p = newval;
-        return oldval;
-    } else
-        return *p;
-}
+  long ret, temp;
 
-static inline void
-atomic_add(int *mem, int val)
-{
-       *mem += val;
+  __asm__ __volatile__ ("\n\
+1:  lwarx  %0,0,%4 \n\
+    subf.  %1,%0,%2 \n\
+    bne-   2f \n\
+    or     %1,%3,%3 \n\
+    stwcx. %1,0,%4 \n\
+    bne-   1b \n\
+2: \n\
+"   : "=&r"(ret), "=&r"(temp)
+    : "r"(oldval), "r"(newval), "r"(p) : "cr0", "memory");
+
+  return ret;
 }
 
 #define STORE_ORDER_BARRIER() __asm__ __volatile__ ("" : : : "memory");
-#define MEMORY_BARRIER_BEFORE_ATOMIC() __asm__ __volatile__ ("sync" : : : "memory");
-#define MEMORY_BARRIER_AFTER_ATOMIC() __asm__ __volatile__ ("" : : : "memory");
+#define MEMORY_BARRIER_AFTER_ATOMIC() __asm__ __volatile__ ("isync" : : : "memory");
 #define MEMORY_BARRIER() __asm__ __volatile__ ( "sync" : : : "memory" );
 
 #endif
-#endif