* Merged in twisti-branch.
[cacao.git] / src / vm / jit / powerpc / asmpart.S
index 222d27ca1c5686d09ea68e18b43db7e7ecf5c5d1..6b4dd2d6d777910d417a7ba6275c4b4a00eeaf09 100644 (file)
@@ -1,6 +1,6 @@
 /* src/vm/jit/powerpc/asmpart.S - Java-C interface functions for PowerPC
                
-   Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
+   Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
    C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
    E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
    J. Wenninger, Institut f. Computersprachen - TU Wien
    Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
    02110-1301, USA.
 
-   Contact: cacao@cacaojvm.org
-
-   Authors: Andreas Krall
-            Reinhard Grafl
-            Stefan Ring
-
-   Changes: Christian Thalinger
-            Edwin Steiner
-
-   $Id: asmpart.S 5578 2006-09-29 11:35:04Z twisti $
+   $Id: asmpart.S 7454 2007-03-05 15:40:48Z tbfg $
 
 */
 
@@ -60,6 +51,7 @@
        .globl asm_vm_call_method_double
 
        .globl asm_vm_call_method_exception_handler
+       .globl asm_vm_call_method_end
 
        .globl asm_call_jit_compiler
 
 
        .globl asm_patcher_wrapper
 
+#if defined(ENABLE_REPLACEMENT)
        .globl asm_replacement_out
        .globl asm_replacement_in
+#endif
 
        .globl asm_cacheflush
+
+       .globl asm_compare_and_swap
+       .globl asm_memory_barrier
+
        .globl asm_criticalsections
        .globl asm_getclassvalues_atomic
 
@@ -682,6 +680,8 @@ L_handle_fda12:
        b       L_register_copy
 #endif
 
+asm_vm_call_method_end:
+       nop
 
 /* asm_call_jit_compiler *******************************************************
 
@@ -1124,6 +1124,7 @@ L_asm_patcher_wrapper_exception:
        addi    sp,sp,8*4+LA_SIZE+(5+58)*4
        b       L_asm_handle_exception
 
+#if defined(ENABLE_REPLACEMENT)
 
 /* asm_replacement_out *********************************************************
 
@@ -1146,46 +1147,48 @@ L_asm_patcher_wrapper_exception:
        /* XXX we should find a cleaner solution here */
 #define REPLACEMENT_ROOM  512
 
+#define sizeexecutionstate_ALIGNED  ((sizeexecutionstate + 15) & ~15)
+
 asm_replacement_out:
     /* create stack frame */
-       addi    sp,sp,-(sizeexecutionstate + REPLACEMENT_ROOM) /* XXX align */
+       addi    sp,sp,-(sizeexecutionstate_ALIGNED + REPLACEMENT_ROOM)
 
        /* save link register */
        mflr    itmp3
 
        /* save registers in execution state */
-       stw     r0 ,( 0*8+offes_intregs)(sp)
-       stw     r1 ,( 1*8+offes_intregs)(sp)
-       stw     r2 ,( 2*8+offes_intregs)(sp)
-       stw     r3 ,( 3*8+offes_intregs)(sp)
-       stw     r4 ,( 4*8+offes_intregs)(sp)
-       stw     r5 ,( 5*8+offes_intregs)(sp)
-       stw     r6 ,( 6*8+offes_intregs)(sp)
-       stw     r7 ,( 7*8+offes_intregs)(sp)
-       stw     r8 ,( 8*8+offes_intregs)(sp)
-       stw     r9 ,( 9*8+offes_intregs)(sp)
-       stw     r10,(10*8+offes_intregs)(sp)
-       stw     r11,(11*8+offes_intregs)(sp)
-       stw     r12,(12*8+offes_intregs)(sp)
-       stw     r13,(13*8+offes_intregs)(sp)
-       stw     r14,(14*8+offes_intregs)(sp)
-       stw     r15,(15*8+offes_intregs)(sp)
-       stw     r16,(16*8+offes_intregs)(sp) /* link register */
-       stw     r17,(17*8+offes_intregs)(sp)
-       stw     r18,(18*8+offes_intregs)(sp)
-       stw     r19,(19*8+offes_intregs)(sp)
-       stw     r20,(20*8+offes_intregs)(sp)
-       stw     r21,(21*8+offes_intregs)(sp)
-       stw     r22,(22*8+offes_intregs)(sp)
-       stw     r23,(23*8+offes_intregs)(sp)
-       stw     r24,(24*8+offes_intregs)(sp)
-       stw     r25,(25*8+offes_intregs)(sp)
-       stw     r26,(26*8+offes_intregs)(sp)
-       stw     r27,(27*8+offes_intregs)(sp)
-       stw     r28,(28*8+offes_intregs)(sp)
-       stw     r29,(29*8+offes_intregs)(sp)
-       stw     r30,(30*8+offes_intregs)(sp)
-       stw     r31,(31*8+offes_intregs)(sp)
+       stw     r0 ,( 0*4+offes_intregs)(sp)
+       stw     r1 ,( 1*4+offes_intregs)(sp)
+       stw     r2 ,( 2*4+offes_intregs)(sp)
+       stw     r3 ,( 3*4+offes_intregs)(sp)
+       stw     r4 ,( 4*4+offes_intregs)(sp)
+       stw     r5 ,( 5*4+offes_intregs)(sp)
+       stw     r6 ,( 6*4+offes_intregs)(sp)
+       stw     r7 ,( 7*4+offes_intregs)(sp)
+       stw     r8 ,( 8*4+offes_intregs)(sp)
+       stw     r9 ,( 9*4+offes_intregs)(sp)
+       stw     r10,(10*4+offes_intregs)(sp)
+       stw     r11,(11*4+offes_intregs)(sp)
+       stw     r12,(12*4+offes_intregs)(sp)
+       stw     r13,(13*4+offes_intregs)(sp)
+       stw     r14,(14*4+offes_intregs)(sp)
+       stw     r15,(15*4+offes_intregs)(sp)
+       stw     r16,(16*4+offes_intregs)(sp) /* link register stored as itmp3 */
+       stw     r17,(17*4+offes_intregs)(sp)
+       stw     r18,(18*4+offes_intregs)(sp)
+       stw     r19,(19*4+offes_intregs)(sp)
+       stw     r20,(20*4+offes_intregs)(sp)
+       stw     r21,(21*4+offes_intregs)(sp)
+       stw     r22,(22*4+offes_intregs)(sp)
+       stw     r23,(23*4+offes_intregs)(sp)
+       stw     r24,(24*4+offes_intregs)(sp)
+       stw     r25,(25*4+offes_intregs)(sp)
+       stw     r26,(26*4+offes_intregs)(sp)
+       stw     r27,(27*4+offes_intregs)(sp)
+       stw     r28,(28*4+offes_intregs)(sp)
+       stw     r29,(29*4+offes_intregs)(sp)
+       stw     r30,(30*4+offes_intregs)(sp)
+       stw     r31,(31*4+offes_intregs)(sp)
        
        stfd    fr0 ,( 0*8+offes_fltregs)(sp)
        stfd    fr1 ,( 1*8+offes_fltregs)(sp)
@@ -1221,7 +1224,7 @@ asm_replacement_out:
        stfd    fr31,(31*8+offes_fltregs)(sp)
        
        /* calculate sp of method */
-       addi    itmp1,sp,(sizeexecutionstate + REPLACEMENT_ROOM + 4*4)
+       addi    itmp1,sp,(sizeexecutionstate_ALIGNED + REPLACEMENT_ROOM + 4*4)
        stw     itmp1,(offes_sp)(sp)
 
        /* store pv */
@@ -1243,83 +1246,110 @@ asm_replacement_out:
    NOTE: itmp3 is not restored!
 
    C prototype:
-      void asm_replacement_in(executionstate *es);
+      void asm_replacement_in(executionstate *es, replace_safestack_t *st);
 
 *******************************************************************************/
 
 asm_replacement_in:
-       /* a0 == executionstate *es */
+       /* a0 == executionstate *es      */
+       /* a1 == replace_safestack_t *st */
+
+       /* get arguments */
+       mr              s1,a1                       /* replace_safestack_t *st            */
+       mr              s2,a0                       /* executionstate *es == safe stack   */
 
-       /* set new sp and pv */
-       lwz     sp,(offes_sp)(a0)
-       lwz     pv,(offes_pv)(a0)
+       /* switch to the safe stack */
+       mr              sp,s2
+
+       /* reserve linkage area */
+       addi    sp,sp,-(LA_SIZE_ALIGNED)
+
+       /* call replace_build_execution_state(st) */
+       mr              a0,s1
+       bl              replace_build_execution_state
+
+       /* set new sp */
+       lwz             sp,(offes_sp)(s2)
+
+       /* build stack frame */
+       addi    sp,sp,-(sizeexecutionstate_ALIGNED)
+
+       /* call replace_free_safestack(st,& of allocated executionstate_t) */
+       mr              a1,sp /* tmpes */
+       mr              a0,s1 /* st    */
+       addi    sp,sp,-(LA_SIZE_ALIGNED)  /* reserve linkage area */
+       bl              replace_free_safestack
+       addi    sp,sp,+(LA_SIZE_ALIGNED)  /* tear down linkage area */
+
+       /* set new pv */
+       lwz     pv,(offes_pv)(sp)
        
        /* copy registers from execution state */
-       lwz     r0 ,( 0*8+offes_intregs)(a0)
+       lwz     r0 ,( 0*4+offes_intregs)(sp)
        /* r1 is sp                       */
        /* r2 is reserved                 */
-       /* a0 is loaded below             */
-       lwz     r4 ,( 4*8+offes_intregs)(a0)
-       lwz     r5 ,( 5*8+offes_intregs)(a0)
-       lwz     r6 ,( 6*8+offes_intregs)(a0)
-       lwz     r7 ,( 7*8+offes_intregs)(a0)
-       lwz     r8 ,( 8*8+offes_intregs)(a0)
-       lwz     r9 ,( 9*8+offes_intregs)(a0)
-       lwz     r10,(10*8+offes_intregs)(a0)
-       lwz     r11,(11*8+offes_intregs)(a0)
-       lwz     r12,(12*8+offes_intregs)(a0)
+       lwz     a0 ,( 3*4+offes_intregs)(sp)
+       lwz     r4 ,( 4*4+offes_intregs)(sp)
+       lwz     r5 ,( 5*4+offes_intregs)(sp)
+       lwz     r6 ,( 6*4+offes_intregs)(sp)
+       lwz     r7 ,( 7*4+offes_intregs)(sp)
+       lwz     r8 ,( 8*4+offes_intregs)(sp)
+       lwz     r9 ,( 9*4+offes_intregs)(sp)
+       lwz     r10,(10*4+offes_intregs)(sp)
+       lwz     r11,(11*4+offes_intregs)(sp)
+       lwz     r12,(12*4+offes_intregs)(sp)
        /* r13 is pv                      */
-       lwz     r14,(14*8+offes_intregs)(a0)
-       lwz     r15,(15*8+offes_intregs)(a0)
-       lwz     r16,(16*8+offes_intregs)(a0) /* link register */
-       lwz     r17,(17*8+offes_intregs)(a0)
-       lwz     r18,(18*8+offes_intregs)(a0)
-       lwz     r19,(19*8+offes_intregs)(a0)
-       lwz     r20,(20*8+offes_intregs)(a0)
-       lwz     r21,(21*8+offes_intregs)(a0)
-       lwz     r22,(22*8+offes_intregs)(a0)
-       lwz     r23,(23*8+offes_intregs)(a0)
-       lwz     r24,(24*8+offes_intregs)(a0)
-       lwz     r25,(25*8+offes_intregs)(a0)
-       lwz     r26,(26*8+offes_intregs)(a0)
-       lwz     r27,(27*8+offes_intregs)(a0)
-       lwz     r28,(28*8+offes_intregs)(a0)
-       lwz     r29,(29*8+offes_intregs)(a0)
-       lwz     r30,(30*8+offes_intregs)(a0)
-       lwz     r31,(31*8+offes_intregs)(a0)
+       lwz     r14,(14*4+offes_intregs)(sp)
+       lwz     r15,(15*4+offes_intregs)(sp)
+       lwz     r16,(16*4+offes_intregs)(sp) /* itmp3, later to link register */
+       lwz     r17,(17*4+offes_intregs)(sp)
+       lwz     r18,(18*4+offes_intregs)(sp)
+       lwz     r19,(19*4+offes_intregs)(sp)
+       lwz     r20,(20*4+offes_intregs)(sp)
+       lwz     r21,(21*4+offes_intregs)(sp)
+       lwz     r22,(22*4+offes_intregs)(sp)
+       lwz     r23,(23*4+offes_intregs)(sp)
+       lwz     r24,(24*4+offes_intregs)(sp)
+       lwz     r25,(25*4+offes_intregs)(sp)
+       lwz     r26,(26*4+offes_intregs)(sp)
+       lwz     r27,(27*4+offes_intregs)(sp)
+       lwz     r28,(28*4+offes_intregs)(sp)
+       lwz     r29,(29*4+offes_intregs)(sp)
+       lwz     r30,(30*4+offes_intregs)(sp)
+       lwz     r31,(31*4+offes_intregs)(sp)
        
-       lfd     fr0 ,( 0*8+offes_fltregs)(a0)
-       lfd     fr1 ,( 1*8+offes_fltregs)(a0)
-       lfd     fr2 ,( 2*8+offes_fltregs)(a0)
-       lfd     fr3 ,( 3*8+offes_fltregs)(a0)
-       lfd     fr4 ,( 4*8+offes_fltregs)(a0)
-       lfd     fr5 ,( 5*8+offes_fltregs)(a0)
-       lfd     fr6 ,( 6*8+offes_fltregs)(a0)
-       lfd     fr7 ,( 7*8+offes_fltregs)(a0)
-       lfd     fr8 ,( 8*8+offes_fltregs)(a0)
-       lfd     fr9 ,( 9*8+offes_fltregs)(a0)
-       lfd     fr10,(10*8+offes_fltregs)(a0)
-       lfd     fr11,(11*8+offes_fltregs)(a0)
-       lfd     fr12,(12*8+offes_fltregs)(a0)
-       lfd     fr13,(13*8+offes_fltregs)(a0)
-       lfd     fr14,(14*8+offes_fltregs)(a0)
-       lfd     fr15,(15*8+offes_fltregs)(a0)
-       lfd     fr16,(16*8+offes_fltregs)(a0)
-       lfd     fr17,(17*8+offes_fltregs)(a0)
-       lfd     fr18,(18*8+offes_fltregs)(a0)
-       lfd     fr19,(19*8+offes_fltregs)(a0)
-       lfd     fr20,(20*8+offes_fltregs)(a0)
-       lfd     fr21,(21*8+offes_fltregs)(a0)
-       lfd     fr22,(22*8+offes_fltregs)(a0)
-       lfd     fr23,(23*8+offes_fltregs)(a0)
-       lfd     fr24,(24*8+offes_fltregs)(a0)
-       lfd     fr25,(25*8+offes_fltregs)(a0)
-       lfd     fr26,(26*8+offes_fltregs)(a0)
-       lfd     fr27,(27*8+offes_fltregs)(a0)
-       lfd     fr28,(28*8+offes_fltregs)(a0)
-       lfd     fr29,(29*8+offes_fltregs)(a0)
-       lfd     fr30,(30*8+offes_fltregs)(a0)
-       lfd     fr31,(31*8+offes_fltregs)(a0)
+       lfd     fr0 ,( 0*8+offes_fltregs)(sp)
+       lfd     fr1 ,( 1*8+offes_fltregs)(sp)
+       lfd     fr2 ,( 2*8+offes_fltregs)(sp)
+       lfd     fr3 ,( 3*8+offes_fltregs)(sp)
+       lfd     fr4 ,( 4*8+offes_fltregs)(sp)
+       lfd     fr5 ,( 5*8+offes_fltregs)(sp)
+       lfd     fr6 ,( 6*8+offes_fltregs)(sp)
+       lfd     fr7 ,( 7*8+offes_fltregs)(sp)
+       lfd     fr8 ,( 8*8+offes_fltregs)(sp)
+       lfd     fr9 ,( 9*8+offes_fltregs)(sp)
+       lfd     fr10,(10*8+offes_fltregs)(sp)
+       lfd     fr11,(11*8+offes_fltregs)(sp)
+       lfd     fr12,(12*8+offes_fltregs)(sp)
+       lfd     fr13,(13*8+offes_fltregs)(sp)
+       lfd     fr14,(14*8+offes_fltregs)(sp)
+       lfd     fr15,(15*8+offes_fltregs)(sp)
+       lfd     fr16,(16*8+offes_fltregs)(sp)
+       lfd     fr17,(17*8+offes_fltregs)(sp)
+       lfd     fr18,(18*8+offes_fltregs)(sp)
+       lfd     fr19,(19*8+offes_fltregs)(sp)
+       lfd     fr20,(20*8+offes_fltregs)(sp)
+       lfd     fr21,(21*8+offes_fltregs)(sp)
+       lfd     fr22,(22*8+offes_fltregs)(sp)
+       lfd     fr23,(23*8+offes_fltregs)(sp)
+       lfd     fr24,(24*8+offes_fltregs)(sp)
+       lfd     fr25,(25*8+offes_fltregs)(sp)
+       lfd     fr26,(26*8+offes_fltregs)(sp)
+       lfd     fr27,(27*8+offes_fltregs)(sp)
+       lfd     fr28,(28*8+offes_fltregs)(sp)
+       lfd     fr29,(29*8+offes_fltregs)(sp)
+       lfd     fr30,(30*8+offes_fltregs)(sp)
+       lfd     fr31,(31*8+offes_fltregs)(sp)
 
        /* restore link register */
 
@@ -1327,17 +1357,19 @@ asm_replacement_in:
        
        /* load new pc */
 
-       lwz     itmp3,offes_pc(a0)
+       lwz     itmp3,offes_pc(sp)
 
-       /* load a0 */
-       
-       lwz     a0,(3*8+offes_intregs)(a0)
+       /* remove stack frame */
+
+       addi    sp,sp,+(sizeexecutionstate_ALIGNED)
 
        /* jump to new code */
 
        mtctr   itmp3
        bctr
 
+#endif /* defined(ENABLE_REPLACEMENT) */
+
 /*********************************************************************/
 
 asm_cacheflush:
@@ -1366,6 +1398,35 @@ asm_cacheflush:
        blr
 
 
+/* asm_compare_and_swap ********************************************************
+
+   XXX
+
+*******************************************************************************/
+
+asm_compare_and_swap:
+1:  lwarx   a6,r0,a0 
+       subf.   r0,a6,a1 
+       bne-    2f 
+       or      r0,a2,a2 
+       stwcx.  r0,r0,a0 
+       bne-    1b 
+2: 
+       mr      a0,a6
+       blr
+
+
+/* asm_memory_barrier **********************************************************
+
+   XXX
+
+*******************************************************************************/
+
+asm_memory_barrier:
+       sync
+       blr
+
+
 asm_getclassvalues_atomic:
 _crit_restart:
 _crit_begin:
@@ -1590,6 +1651,46 @@ L_replace_me$lazy_ptr:
        .indirect_symbol _replace_me
        .long dyld_stub_binding_helper
 
+
+.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
+       .align 2
+L_replace_build_execution_state$stub:
+       .indirect_symbol _replace_build_execution_state
+       mflr r0
+       bcl 20,31,L00$_replace_build_execution_state
+L00$_replace_build_execution_state:
+       mflr r11
+       addis r11,r11,ha16(L_replace_build_execution_state$lazy_ptr - L00$_replace_build_execution_state)
+       mtlr r0
+       lwzu r12,lo16(L_replace_build_execution_state$lazy_ptr - L00$_replace_build_execution_state)(r11)
+       mtctr r12
+       bctr
+.data
+.lazy_symbol_pointer
+L_replace_build_execution_state$lazy_ptr:
+       .indirect_symbol _replace_build_execution_state
+       .long dyld_stub_binding_helper
+
+
+.section __TEXT,__picsymbolstub1,symbol_stubs,pure_instructions,32
+       .align 2
+L_replace_free_safestack$stub:
+       .indirect_symbol _replace_free_safestack
+       mflr r0
+       bcl 20,31,L00$_replace_free_safestack
+L00$_replace_free_safestack:
+       mflr r11
+       addis r11,r11,ha16(L_replace_free_safestack$lazy_ptr - L00$_replace_free_safestack)
+       mtlr r0
+       lwzu r12,lo16(L_replace_free_safestack$lazy_ptr - L00$_replace_free_safestack)(r11)
+       mtctr r12
+       bctr
+.data
+.lazy_symbol_pointer
+L_replace_free_safestack$lazy_ptr:
+       .indirect_symbol _replace_free_safestack
+       .long dyld_stub_binding_helper
+
 #endif /* defined(__DARWIN__) */