/* src/vm/jit/powerpc/arch.h - architecture defines for PowerPC
- Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
+ Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
J. Wenninger, Institut f. Computersprachen - TU Wien
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- Contact: cacao@cacaojvm.org
-
- Authors: Christian Thalinger
-
- $Id: arch.h 6172 2006-12-11 19:43:41Z twisti $
-
*/
#ifndef _ARCH_H
#define _ARCH_H
+#include "config.h"
+
+
/* define architecture features ***********************************************/
#define U8_AVAILABLE 1
-#define USEBUILTINTABLE
-
#define SUPPORT_DIVISION 1
#define SUPPORT_LONG 1
-#define SUPPORT_FLOAT 1
-#define SUPPORT_DOUBLE 1
#define SUPPORT_I2F 0
#define SUPPORT_I2D 0
#define SUPPORT_CONST_STORE_ZERO_ONLY 0 /* on some risc machines we can */
/* only store REG_ZERO */
+
+/* float **********************************************************************/
+
+#define SUPPORT_FLOAT 1
+
+#if defined(ENABLE_SOFT_FLOAT_CMP)
+# define SUPPORT_FLOAT_CMP 0
+#else
+# define SUPPORT_FLOAT_CMP 1
+#endif
+
+
+/* double *********************************************************************/
+
+#define SUPPORT_DOUBLE 1
+
+#if defined(ENABLE_SOFT_FLOAT_CMP)
+# define SUPPORT_DOUBLE_CMP 0
+#else
+# define SUPPORT_DOUBLE_CMP 1
+#endif
+
+
#define SPECIALMEMUSE
-#define HAS_4BYTE_STACKSLOT
-#define ALIGN_LONGS_IN_MEMORY /* Align Longs and/or Doubles at */
-#define ALIGN_DOUBLES_IN_MEMORY /* 2*Stackslotsize relativ to stackframe */
+
/* Memory Positions for not Interface Stackslots (allocate_scratch_registers)*/
/* are not properly aligned in case HAS_4_BYTE_STACKSLOT is not defined! */
/* For HAS_4_BYTE_STACKSLOT archs no distinction is made between long and dbl*/
#define SUPPORT_COMBINE_INTEGER_REGISTERS
+/* branches *******************************************************************/
+
+#define SUPPORT_BRANCH_CONDITIONAL_CONDITION_REGISTER 1
+#define SUPPORT_BRANCH_CONDITIONAL_ONE_INTEGER_REGISTER 0
+#define SUPPORT_BRANCH_CONDITIONAL_TWO_INTEGER_REGISTERS 0
+
+
/* exceptions *****************************************************************/
#define SUPPORT_HARDWARE_DIVIDE_BY_ZERO 0
/* replacement ****************************************************************/
#define REPLACEMENT_PATCH_SIZE 4 /* bytes */
-#define REPLACEMENT_STUB_SIZE 6 /* words */
#endif /* _ARCH_H */