/* src/vm/jit/mips/linux/md-os.c - machine dependent MIPS Linux functions
- Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: md-os.c 8245 2007-07-31 09:55:04Z michi $
-
*/
#include <assert.h>
#include <sgidefs.h> /* required for _MIPS_SIM_ABI* defines (before signal.h) */
#include <signal.h>
+#include <stdint.h>
#include <ucontext.h>
#include "vm/types.h"
#include "vm/jit/mips/codegen.h"
+#include "vm/jit/mips/md.h"
#include "vm/jit/mips/md-abi.h"
-#include "mm/gc-common.h"
+#include "mm/gc.hpp"
+#include "mm/memory.hpp"
-#include "vm/exceptions.h"
-#include "vm/stringlocal.h"
+#include "vm/signallocal.hpp"
+#include "vm/os.hpp"
#include "vm/jit/asmpart.h"
-#include "vm/jit/stacktrace.h"
+#include "vm/jit/executionstate.h"
+#include "vm/jit/trap.hpp"
/* md_init *********************************************************************
void md_init(void)
{
- /* The Boehm GC initialization blocks the SIGSEGV signal. So we do a */
- /* dummy allocation here to ensure that the GC is initialized. */
+ /* The Boehm GC initialization blocks the SIGSEGV signal. So we do
+ a dummy allocation here to ensure that the GC is
+ initialized. */
#if defined(ENABLE_GC_BOEHM)
- (void) GCNEW(u1);
+ (void) GCNEW(int);
#endif
#if 0
void md_signal_handler_sigsegv(int sig, siginfo_t *siginfo, void *_p)
{
- stackframeinfo sfi;
- ucontext_t *_uc;
- mcontext_t *_mc;
- greg_t *_gregs;
- u1 *pv;
- u1 *sp;
- u1 *ra;
- u1 *xpc;
- unsigned int cause;
- u4 mcode;
- s4 d;
- s4 s1;
- s4 disp;
- ptrint val;
- ptrint addr;
- s4 type;
- java_objectheader *e;
+ ucontext_t *_uc;
+ mcontext_t *_mc;
+ greg_t *_gregs;
+ u1 *pv;
+ u1 *sp;
+ u1 *ra;
+ u1 *xpc;
+ unsigned int cause;
+ u4 mcode;
+ int d;
+ int s1;
+ int16_t disp;
+ intptr_t val;
+ intptr_t addr;
+ int type;
_uc = (struct ucontext *) _p;
_mc = &_uc->uc_mcontext;
sp = (u1 *) (ptrint) _gregs[REG_SP];
ra = (u1 *) (ptrint) _gregs[REG_RA]; /* this is correct for leafs */
-#if !defined(__UCLIBC__) && ((__GLIBC__ == 2) && (__GLIBC_MINOR__ < 5))
+#if !defined(__UCLIBC__)
+# if ((__GLIBC__ == 2) && (__GLIBC_MINOR__ < 5))
/* NOTE: We only need this for pre glibc-2.5. */
xpc = (u1 *) (ptrint) _mc->pc;
xpc = xpc - 4;
break;
}
+# else
+ xpc = (u1 *) (ptrint) _mc->pc;
+# endif
#else
xpc = (u1 *) (ptrint) _gregs[CTX_EPC];
#endif
type = disp;
val = _gregs[d];
+
+ if (type == TRAP_COMPILER) {
+ /* The XPC is the RA minus 4, because the RA points to the
+ instruction after the call. */
+
+ xpc = ra - 4;
+ }
}
else {
/* This is a normal NPE: addr must be NULL and the NPE-type
define is 0. */
addr = _gregs[s1];
- type = (s4) addr;
+ type = (int) addr;
val = 0;
}
- /* create stackframeinfo */
+ /* Handle the trap. */
- stacktrace_create_extern_stackframeinfo(&sfi, pv, sp, ra, xpc);
+ trap_handle(type, val, pv, sp, ra, xpc, _p);
+}
- /* generate appropriate exception */
- e = exceptions_new_hardware_exception(xpc, type, val);
+/**
+ * Signal handler for patcher calls.
+ */
+void md_signal_handler_sigill(int sig, siginfo_t* siginfo, void* _p)
+{
+ ucontext_t* _uc = (struct ucontext *) _p;
+ mcontext_t* _mc = &_uc->uc_mcontext;
+ greg_t* _gregs;
- /* remove stackframeinfo */
+#if defined(__UCLIBC__)
+ _gregs = _mc->gpregs;
+#else
+ _gregs = _mc->gregs;
+#endif
- stacktrace_remove_stackframeinfo(&sfi);
+ // In glibc's ucontext.h the registers are defined as long long
+ // int, even for MIPS32, so we cast them. This is not the case
+ // for uClibc.
+ void* pv = (void*) (uintptr_t) _gregs[REG_PV];
+ void* sp = (void*) (uintptr_t) _gregs[REG_SP];
+ void* ra = (void*) (uintptr_t) _gregs[REG_RA]; // The RA is correct for leaf methods.
- /* set registers */
+#if defined(__UCLIBC__)
+ void* xpc = (void*) (uintptr_t) _gregs[CTX_EPC];
+#else
+ void* xpc = (void*) (uintptr_t) _mc->pc;
+#endif
+
+ // This signal is always a patcher.
+ int type = TRAP_PATCHER;
+ intptr_t val = 0;
- _gregs[REG_ITMP1_XPTR] = (ptrint) e;
- _gregs[REG_ITMP2_XPC] = (ptrint) xpc;
+ // Handle the trap.
+ void* p = trap_handle(type, val, pv, sp, ra, xpc, _p);
+ // Set registers
+ if (p == NULL) {
+ // We set the PC again because the cause may have changed the
+ // XPC.
#if defined(__UCLIBC__)
- _gregs[CTX_EPC] = (ptrint) asm_handle_exception;
+ _gregs[CTX_EPC] = (uintptr_t) xpc;
#else
- _mc->pc = (ptrint) asm_handle_exception;
+ _mc->pc = (uintptr_t) xpc;
#endif
+ }
}
}
-/* md_critical_section_restart *************************************************
+/**
+ * Read the given context into an executionstate.
+ *
+ * @param es execution state
+ * @param context machine context
+ */
+void md_executionstate_read(executionstate_t* es, void* context)
+{
+ ucontext_t* _uc;
+ mcontext_t* _mc;
+ greg_t* _gregs;
+ int i;
- Search the critical sections tree for a matching section and set
- the PC to the restart point, if necessary.
+ vm_abort("md_executionstate_read: PLEASE REVISE ME!");
-*******************************************************************************/
+ _uc = (ucontext_t*) context;
+ _mc = &_uc->uc_mcontext;
-#if defined(ENABLE_THREADS)
-void md_critical_section_restart(ucontext_t *_uc)
-{
- mcontext_t *_mc;
- u1 *pc;
- u1 *npc;
+#if defined(__UCLIBC__)
+ _gregs = _mc->gpregs;
+#else
+ _gregs = _mc->gregs;
+#endif
- _mc = &_uc->uc_mcontext;
+ /* Read special registers. */
+
+ /* In glibc's ucontext.h the registers are defined as long long,
+ even for MIPS32, so we cast them. This is not the case for
+ uClibc. */
#if defined(__UCLIBC__)
- pc = (u1 *) (ptrint) _mc->gpregs[CTX_EPC];
+ es->pc = _gregs[CTX_EPC];
#else
- pc = (u1 *) (ptrint) _mc->pc;
+ es->pc = (void*) (uintptr_t) _mc->pc;
#endif
- npc = critical_find_restart_point(pc);
+ es->sp = (void*) (uintptr_t) _gregs[REG_SP];
+ es->pv = (void*) (uintptr_t) _gregs[REG_PV];
+ es->ra = (void*) (uintptr_t) _gregs[REG_RA];
+
+ /* Read integer registers. */
+
+ for (i = 0; i < INT_REG_CNT; i++)
+ es->intregs[i] = _gregs[i];
+
+ /* Read float registers. */
+
+ /* Do not use the assignment operator '=', as the type of the
+ _mc->fpregs[i] can cause invalid conversions. */
+
+ assert(sizeof(_mc->fpregs.fp_r) == sizeof(es->fltregs));
+ os_memcpy(&es->fltregs, &_mc->fpregs.fp_r, sizeof(_mc->fpregs.fp_r));
+}
+
+
+/**
+ * Write the given executionstate back to the context.
+ *
+ * @param es execution state
+ * @param context machine context
+ */
+void md_executionstate_write(executionstate_t* es, void* context)
+{
+ ucontext_t* _uc;
+ mcontext_t* _mc;
+ greg_t* _gregs;
+ int i;
+
+ vm_abort("md_executionstate_write: PLEASE REVISE ME!");
+
+ _uc = (ucontext_t *) context;
+ _mc = &_uc->uc_mcontext;
+
+ /* Write integer registers. */
+
+ for (i = 0; i < INT_REG_CNT; i++)
+ _gregs[i] = es->intregs[i];
+
+ /* Write float registers. */
+
+ /* Do not use the assignment operator '=', as the type of the
+ _mc->fpregs[i] can cause invalid conversions. */
+
+ assert(sizeof(_mc->fpregs.fp_r) == sizeof(es->fltregs));
+ os_memcpy(&_mc->fpregs.fp_r, &es->fltregs, sizeof(_mc->fpregs.fp_r));
+
+ /* Write special registers. */
- if (npc != NULL) {
#if defined(__UCLIBC__)
- _mc->gpregs[CTX_EPC] = (ptrint) npc;
+ _gregs[CTX_EPC] = es->pc;
#else
- _mc->pc = (ptrint) npc;
+ _mc->pc = (uintptr_t) es->pc;
#endif
- }
+
+ _gregs[REG_SP] = (uintptr_t) es->sp;
+ _gregs[REG_PV] = (uintptr_t) es->pv;
+ _gregs[REG_RA] = (uintptr_t) es->ra;
}
-#endif
/*
projects / cacao.git / blobdiff