/* src/vm/jit/mips/irix/md-os.c - machine dependent MIPS IRIX functions
- Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
- R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
- C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
- Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
+ C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
+ E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
+ J. Wenninger, Institut f. Computersprachen - TU Wien
This file is part of CACAO.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA.
-
- Contact: cacao@complang.tuwien.ac.at
-
- Authors: Andreas Krall
- Reinhard Grafl
-
- Changes: Christian Thalinger
-
- $Id: md-os.c 3756 2005-11-23 00:21:56Z twisti $
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
*/
+#include "config.h"
+
#include <assert.h>
#include <signal.h>
+#include <stdint.h>
#include <sys/fpu.h>
-#include <sys/mman.h>
-#include <unistd.h>
-#include "config.h"
#include "vm/types.h"
+#include "vm/jit/mips/codegen.h"
#include "vm/jit/mips/md-abi.h"
-#include "mm/boehm.h"
-#include "vm/exceptions.h"
+#include "mm/gc-common.h"
+
+#include "vm/global.h"
+#include "vm/signallocal.h"
#include "vm/stringlocal.h"
+
#include "vm/jit/asmpart.h"
+#include "vm/jit/codegen-common.h"
#include "vm/jit/stacktrace.h"
/* The Boehm GC initialization blocks the SIGSEGV signal. So we do a */
/* dummy allocation here to ensure that the GC is initialized. */
+#if defined(ENABLE_GC_BOEHM)
heap_allocate(1, 0, NULL);
+#endif
/* Turn off flush-to-zero */
}
-/* signal_handler_sigsegv ******************************************************
+/* md_signal_handler_sigsegv ***************************************************
- NullPointerException signal handler for hardware null pointer check.
+ Signal handler for hardware-exceptions.
*******************************************************************************/
-void signal_handler_sigsegv(int sig, siginfo_t *siginfo, void *_p)
+void md_signal_handler_sigsegv(int sig, siginfo_t *siginfo, void *_p)
{
- ucontext_t *_uc;
- mcontext_t *_mc;
- u4 instr;
- ptrint addr;
- u1 *pv;
- u1 *sp;
- u1 *ra;
- u1 *xpc;
+ stackframeinfo sfi;
+ ucontext_t *_uc;
+ mcontext_t *_mc;
+ u1 *pv;
+ u1 *sp;
+ u1 *ra;
+ u1 *xpc;
+ u4 mcode;
+ int d;
+ int s1;
+ int16_t disp;
+ intptr_t val;
+ intptr_t addr;
+ int type;
+ void *p;
_uc = (struct ucontext *) _p;
_mc = &_uc->uc_mcontext;
- instr = *((u4 *) (_mc->gregs[CTX_EPC]));
- addr = _mc->gregs[(instr >> 21) & 0x1f];
+ pv = (u1 *) _mc->gregs[REG_PV];
+ sp = (u1 *) _mc->gregs[REG_SP];
+ ra = (u1 *) _mc->gregs[REG_RA]; /* this is correct for leafs */
+ xpc = (u1 *) _mc->gregs[CTX_EPC];
+
+ /* get exception-throwing instruction */
+
+ mcode = *((u4 *) xpc);
+
+ d = M_ITYPE_GET_RT(mcode);
+ s1 = M_ITYPE_GET_RS(mcode);
+ disp = M_ITYPE_GET_IMM(mcode);
+
+ /* check for special-load */
+
+ if (s1 == REG_ZERO) {
+ /* we use the exception type as load displacement */
- if (addr == 0) {
- pv = (u1 *) _mc->gregs[REG_PV];
- sp = (u1 *) _mc->gregs[REG_SP];
- ra = (u1 *) _mc->gregs[REG_RA]; /* this is correct for leafs */
- xpc = (u1 *) _mc->gregs[CTX_EPC];
+ type = disp;
+ val = _mc->gregs[d];
+ }
+ else {
+ /* This is a normal NPE: addr must be NULL and the NPE-type
+ define is 0. */
+
+ addr = _mc->gregs[s1];
+ type = (int) addr;
+ val = 0;
+ }
+
+ /* create stackframeinfo */
- _mc->gregs[REG_ITMP1_XPTR] =
- (ptrint) stacktrace_hardware_nullpointerexception(pv, sp, ra, xpc);
+ stacktrace_create_extern_stackframeinfo(&sfi, pv, sp, ra, xpc);
- _mc->gregs[REG_ITMP2_XPC] = (ptrint) xpc;
- _mc->gregs[CTX_EPC] = (ptrint) asm_handle_exception;
+ /* Handle the type. */
- } else {
- addr += (long) ((instr << 16) >> 16);
+ p = signal_handle(xpc, type, val);
- throw_cacao_exception_exit(string_java_lang_InternalError,
- "faulting address: 0x%lx at 0x%lx\n",
- addr, _mc->gregs[CTX_EPC]);
+ /* remove stackframeinfo */
+
+ stacktrace_remove_stackframeinfo(&sfi);
+
+ /* set registers (only if exception object ready) */
+
+ if (p != NULL) {
+ _mc->gregs[REG_ITMP1_XPTR] = (intptr_t) p;
+ _mc->gregs[REG_ITMP2_XPC] = (intptr_t) xpc;
+ _mc->gregs[CTX_EPC] = (intptr_t) asm_handle_exception;
}
}
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
-void thread_restartcriticalsection(ucontext_t *uc)
+/* md_critical_section_restart *************************************************
+
+ Search the critical sections tree for a matching section and set
+ the PC to the restart point, if necessary.
+
+*******************************************************************************/
+
+#if defined(ENABLE_THREADS)
+void md_critical_section_restart(ucontext_t *_uc)
{
- void *critical;
+ mcontext_t *_mc;
+ u1 *pc;
+ u1 *npc;
- critical = thread_checkcritical((void*) uc->uc_mcontext.gregs[CTX_EPC]);
+ _mc = &_uc->uc_mcontext;
- if (critical)
- uc->uc_mcontext.gregs[CTX_EPC] = (ptrint) critical;
+ pc = (u1 *) _mc->gregs[CTX_EPC];
+
+ npc = critical_find_restart_point(pc);
+
+ if (npc != NULL) {
+ log_println("md_critical_section_restart: pc=%p, npc=%p", pc, npc);
+ _mc->gregs[CTX_EPC] = (ptrint) npc;
+ }
}
#endif
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