/* src/vm/jit/mips/emit.c - MIPS code emitter functions
- Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- Contact: cacao@cacaojvm.org
-
- Authors: Christian Thalinger
-
- Changes:
-
- $Id: emitfuncs.c 4398 2006-01-31 23:43:08Z twisti $
-
*/
#include "config.h"
-#include "vm/types.h"
+#include <assert.h>
-#include "md-abi.h"
+#include "vm/types.h"
#include "vm/jit/mips/codegen.h"
+#include "vm/jit/mips/md-abi.h"
-#if defined(ENABLE_THREADS)
-# include "threads/native/lock.h"
-#endif
+#include "mm/memory.hpp"
+
+#include "threads/lock.hpp"
-#include "vm/exceptions.h"
+#include "vm/jit/builtin.hpp"
#include "vm/options.h"
-#include "vm/stringlocal.h" /* XXX for gen_resolvebranch */
+
+#include "vm/jit/abi.h"
#include "vm/jit/abi-asm.h"
#include "vm/jit/asmpart.h"
#include "vm/jit/dseg.h"
-#include "vm/jit/emit-common.h"
-#include "vm/jit/jit.h"
-#include "vm/jit/replace.h"
+#include "vm/jit/emit-common.hpp"
+#include "vm/jit/jit.hpp"
+#include "vm/jit/patcher-common.hpp"
+#include "vm/jit/replace.hpp"
+#include "vm/jit/trap.hpp"
/* emit_load *******************************************************************
if (src->flags & INMEMORY) {
COUNT_SPILLS;
- disp = src->vv.regoff * 8;
+ disp = src->vv.regoff;
- if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
- }
- else
+ switch (src->type) {
+#if SIZEOF_VOID_P == 8
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
+ M_LLD(tempreg, REG_SP, disp);
+ break;
+#else
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_ILD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_LNG:
M_LLD(tempreg, REG_SP, disp);
+ break;
+#endif
+ case TYPE_FLT:
+ M_FLD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_DBL:
+ M_DLD(tempreg, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_load: unknown type %d", src->type);
+ }
reg = tempreg;
}
}
+/* emit_load_low ***************************************************************
+
+ Emits a possible load of the low 32-bits of an operand.
+
+*******************************************************************************/
+
+#if SIZEOF_VOID_P == 4
+s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
+{
+ codegendata *cd;
+ s4 disp;
+ s4 reg;
+
+ assert(src->type == TYPE_LNG);
+
+ /* get required compiler data */
+
+ cd = jd->cd;
+
+ if (src->flags & INMEMORY) {
+ COUNT_SPILLS;
+
+ disp = src->vv.regoff;
+
+#if WORDS_BIGENDIAN == 1
+ M_ILD(tempreg, REG_SP, disp + 4);
+#else
+ M_ILD(tempreg, REG_SP, disp);
+#endif
+
+ reg = tempreg;
+ }
+ else
+ reg = GET_LOW_REG(src->vv.regoff);
+
+ return reg;
+}
+#endif /* SIZEOF_VOID_P == 4 */
+
+
+/* emit_load_high **************************************************************
+
+ Emits a possible load of the high 32-bits of an operand.
+
+*******************************************************************************/
+
+#if SIZEOF_VOID_P == 4
+s4 emit_load_high(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
+{
+ codegendata *cd;
+ s4 disp;
+ s4 reg;
+
+ assert(src->type == TYPE_LNG);
+
+ /* get required compiler data */
+
+ cd = jd->cd;
+
+ if (src->flags & INMEMORY) {
+ COUNT_SPILLS;
+
+ disp = src->vv.regoff;
+
+#if WORDS_BIGENDIAN == 1
+ M_ILD(tempreg, REG_SP, disp);
+#else
+ M_ILD(tempreg, REG_SP, disp + 4);
+#endif
+
+ reg = tempreg;
+ }
+ else
+ reg = GET_HIGH_REG(src->vv.regoff);
+
+ return reg;
+}
+#endif /* SIZEOF_VOID_P == 4 */
+
+
/* emit_store ******************************************************************
Emits a possible store to variable.
if (dst->flags & INMEMORY) {
COUNT_SPILLS;
- disp = dst->vv.regoff * 8;
+ disp = dst->vv.regoff;
- if (IS_FLT_DBL_TYPE(dst->type)) {
- if (IS_2_WORD_TYPE(dst->type))
- M_DST(d, REG_SP, disp);
- else
- M_FST(d, REG_SP, disp);
- }
- else
+ switch (dst->type) {
+#if SIZEOF_VOID_P == 8
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
M_LST(d, REG_SP, disp);
+ break;
+#else
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_IST(d, REG_SP, disp);
+ break;
+ case TYPE_LNG:
+ M_LST(d, REG_SP, disp);
+ break;
+#endif
+ case TYPE_FLT:
+ M_FST(d, REG_SP, disp);
+ break;
+ case TYPE_DBL:
+ M_DST(d, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_store: unknown type %d", dst->type);
+ }
}
}
*******************************************************************************/
-void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
+void emit_copy(jitdata *jd, instruction *iptr)
{
- codegendata *cd;
- s4 s1, d;
+ codegendata *cd;
+ varinfo *src;
+ varinfo *dst;
+ s4 s1, d;
/* get required compiler data */
cd = jd->cd;
+ /* get source and destination variables */
+
+ src = VAROP(iptr->s1);
+ dst = VAROP(iptr->dst);
+
if ((src->vv.regoff != dst->vv.regoff) ||
((src->flags ^ dst->flags) & INMEMORY)) {
+ if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
+ /* emit nothing, as the value won't be used anyway */
+ return;
+ }
+
/* If one of the variables resides in memory, we can eliminate
the register move from/to the temporary register with the
order of getting the destination register and the load. */
if (IS_INMEMORY(src->flags)) {
- d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
+#if SIZEOF_VOID_P == 4
+ if (IS_2_WORD_TYPE(src->type))
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
+ else
+#endif
+ d = codegen_reg_of_var(iptr->opc, dst, REG_IFTMP);
s1 = emit_load(jd, iptr, src, d);
}
else {
s1 = emit_load(jd, iptr, src, REG_IFTMP);
- d = codegen_reg_of_var(iptr->opc, dst, s1);
+#if SIZEOF_VOID_P == 4
+ if (IS_2_WORD_TYPE(src->type))
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
+ else
+#endif
+ d = codegen_reg_of_var(iptr->opc, dst, s1);
}
if (s1 != d) {
- if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DMOV(s1, d);
- else
- M_FMOV(s1, d);
- }
- else
+ switch (dst->type) {
+#if SIZEOF_VOID_P == 8
+ case TYPE_INT:
+ case TYPE_LNG:
+ case TYPE_ADR:
M_MOV(s1, d);
+ break;
+#else
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_MOV(s1, d);
+ break;
+ case TYPE_LNG:
+ M_LNGMOVE(s1, d);
+ break;
+#endif
+ case TYPE_FLT:
+ M_FMOV(s1, d);
+ break;
+ case TYPE_DBL:
+ M_DMOV(s1, d);
+ break;
+ default:
+ vm_abort("emit_copy: unknown type %d", dst->type);
+ }
}
emit_store(jd, iptr, dst, d);
{
s4 disp;
+#if SIZEOF_VOID_P == 8
if ((value >= -32768) && (value <= 32767))
M_LADD_IMM(REG_ZERO, value, d);
else if ((value >= 0) && (value <= 0xffff))
disp = dseg_add_s8(cd, value);
M_LLD(d, REG_PV, disp);
}
+#else
+ disp = dseg_add_s8(cd, value);
+ M_LLD(d, REG_PV, disp);
+#endif
}
-/* emit_arithmetic_check *******************************************************
+/* emit_branch *****************************************************************
- Emit an ArithmeticException check.
+ Emits the code for conditional and unconditional branchs.
+
+ NOTE: The reg argument may contain two packed registers.
*******************************************************************************/
-void emit_arithmetic_check(codegendata *cd, s4 reg)
+void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
{
-#if 0
- M_BEQZ(reg, 0);
- codegen_add_arithmeticexception_ref(cd);
- M_NOP;
-#else
- M_BNEZ(reg, 6);
- M_NOP;
+ // Calculate the displacements.
+ int32_t checkdisp = (disp - 4);
+ int32_t branchdisp = (disp - 4) >> 2;
- M_LUI(REG_ITMP3, 0);
- M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
- codegen_add_arithmeticexception_ref(cd);
- M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
- M_JMP(REG_ITMP3);
- M_NOP;
-#endif
-}
+ /* check which branch to generate */
+ if (condition == BRANCH_UNCONDITIONAL) {
+ // Check displacement for overflow.
+ if (opt_AlwaysEmitLongBranches || ((checkdisp < (int32_t) 0xffff8000) || (checkdisp > (int32_t) 0x00007fff))) {
+ /* if the long-branches flag isn't set yet, do it */
-/* emit_arrayindexoutofbounds_check ********************************************
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
- Emit an ArrayIndexOutOfBoundsException check.
+ // Calculate the offset relative to PV.
+ int32_t currentrpc = cd->mcodeptr - cd->mcodebase;
+ int32_t offset = currentrpc + disp;
-*******************************************************************************/
+ // Sanity check.
+ assert(offset % 4 == 0);
-void emit_arrayindexoutofbounds_check(codegendata *cd, s4 s1, s4 s2)
-{
- if (checkbounds) {
- M_ILD(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
- M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
-
-#if 0
- M_BEQZ(REG_ITMP3, 0);
- codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
- M_NOP;
-#else
- M_BNEZ(REG_ITMP3, 6);
- M_NOP;
-
- M_LUI(REG_ITMP3, 0);
- M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
- codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
- M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
- M_JMP(REG_ITMP3);
- M_NOP;
-#endif
+ // Do the long-branch.
+ M_LUI(REG_ITMP3, offset >> 16);
+ M_OR_IMM(REG_ITMP3, offset, REG_ITMP3);
+ M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
+ M_JMP(REG_ITMP3);
+ M_NOP;
+ M_NOP; // This nop is to have 6 instructions (see BRANCH_NOPS).
+ }
+ else {
+ M_BR(branchdisp);
+ M_NOP;
+ }
}
-}
-
+ else {
+ // Check displacement for overflow.
+ if (opt_AlwaysEmitLongBranches || ((checkdisp < (int32_t) 0xffff8000) || (checkdisp > (int32_t) 0x00007fff))) {
+ /* if the long-branches flag isn't set yet, do it */
-/* emit_arraystore_check *******************************************************
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
- Emit an ArrayStoreException check.
+ // Calculate the offset relative to PV before we generate
+ // new code.
+ int32_t currentrpc = cd->mcodeptr - cd->mcodebase;
+ int32_t offset = currentrpc + disp;
+
+ // Sanity check.
+ assert(offset % 4 == 0);
+
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
+ break;
+ case BRANCH_NE:
+ M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), 5);
+ break;
+ case BRANCH_LT:
+ M_BGEZ(reg, 5);
+ break;
+ case BRANCH_GE:
+ M_BLTZ(reg, 5);
+ break;
+ case BRANCH_GT:
+ M_BLEZ(reg, 5);
+ break;
+ case BRANCH_LE:
+ M_BGTZ(reg, 5);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
-*******************************************************************************/
+ // The actual branch code which is over-jumped. NOTE: We
+ // don't use a branch delay slot for the conditional
+ // branch.
-void emit_arraystore_check(codegendata *cd, s4 reg)
-{
-#if 0
- M_BEQZ(reg, 0);
- codegen_add_arraystoreexception_ref(cd);
- M_NOP;
-#else
- M_BNEZ(reg, 6);
- M_NOP;
+ // Do the long-branch.
+ M_LUI(REG_ITMP3, offset >> 16);
+ M_OR_IMM(REG_ITMP3, offset, REG_ITMP3);
+ M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
+ M_JMP(REG_ITMP3);
+ M_NOP;
+ }
+ else {
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BEQ(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BNE(GET_HIGH_REG(reg), GET_LOW_REG(reg), branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BLTZ(reg, branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BGEZ(reg, branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BGTZ(reg, branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BLEZ(reg, branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
- M_LUI(REG_ITMP3, 0);
- M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
- codegen_add_arraystoreexception_ref(cd);
- M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
- M_JMP(REG_ITMP3);
- M_NOP;
-#endif
+ /* branch delay */
+ M_NOP;
+ }
+ }
}
-/* emit_classcast_check ********************************************************
+/* emit_arithmetic_check *******************************************************
- Emit a ClassCastException check.
+ Emit an ArithmeticException check.
*******************************************************************************/
-void emit_classcast_check(codegendata *cd, s4 condition, s4 reg, s4 s1)
+void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
{
-#if 0
- M_BNEZ(reg, 0);
- codegen_add_classcastexception_ref(cd, s1);
- M_NOP;
-#else
- switch (condition) {
- case ICMD_IFEQ:
- M_BNEZ(reg, 6);
- break;
-
- case ICMD_IFNE:
- M_BEQZ(reg, 6);
- break;
-
- case ICMD_IFLE:
- M_BGTZ(reg, 6);
- break;
-
- default:
- vm_abort("emit_classcast_check: condition %d not found", condition);
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_BNEZ(reg, 2);
+ M_NOP;
+ M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_ArithmeticException);
}
-
- M_NOP;
-
- M_LUI(REG_ITMP3, 0);
- M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
- codegen_add_classcastexception_ref(cd, s1);
- M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
- M_JMP(REG_ITMP3);
- M_NOP;
-#endif
}
-/* emit_nullpointer_check ******************************************************
+/* emit_arrayindexoutofbounds_check ********************************************
- Emit a NullPointerException check.
+ Emit an ArrayIndexOutOfBoundsException check.
*******************************************************************************/
-void emit_nullpointer_check(codegendata *cd, s4 reg)
+void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
{
- if (checknull) {
-#if 0
- M_BEQZ(reg, 0);
- codegen_add_nullpointerexception_ref(cd);
- M_NOP;
-#else
- M_BNEZ(reg, 6);
- M_NOP;
-
- M_LUI(REG_ITMP3, 0);
- M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
- codegen_add_nullpointerexception_ref(cd);
- M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
- M_JMP(REG_ITMP3);
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
+ M_CMPULT(s2, REG_ITMP3, REG_ITMP3);
+ M_BNEZ(REG_ITMP3, 2);
M_NOP;
-#endif
+ M_ALD_INTERN(s2, REG_ZERO, TRAP_ArrayIndexOutOfBoundsException);
}
}
-/* emit_exception_check ********************************************************
+/* emit_arraystore_check *******************************************************
- Emit an Exception check.
+ Emit an ArrayStoreException check.
*******************************************************************************/
-void emit_exception_check(codegendata *cd)
+void emit_arraystore_check(codegendata *cd, instruction *iptr)
{
-#if 0
- M_BEQZ(REG_RESULT, 0);
- codegen_add_fillinstacktrace_ref(cd);
- M_NOP;
-#else
- M_BNEZ(REG_RESULT, 6);
- M_NOP;
-
- M_LUI(REG_ITMP3, 0);
- M_OR_IMM(REG_ITMP3, 0, REG_ITMP3);
- codegen_add_fillinstacktrace_ref(cd);
- M_AADD(REG_PV, REG_ITMP3, REG_ITMP3);
- M_JMP(REG_ITMP3);
- M_NOP;
-#endif
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_BNEZ(REG_RESULT, 2);
+ M_NOP;
+ M_ALD_INTERN(REG_RESULT, REG_ZERO, TRAP_ArrayStoreException);
+ }
}
-/* emit_exception_stubs ********************************************************
+/* emit_classcast_check ********************************************************
- Generates the code for the exception stubs.
+ Emit a ClassCastException check.
*******************************************************************************/
-void emit_exception_stubs(jitdata *jd)
+void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
{
- codegendata *cd;
- registerdata *rd;
- exceptionref *er;
- s4 branchmpc;
- s4 targetmpc;
- s4 targetdisp;
- s4 disp;
-
- /* get required compiler data */
-
- cd = jd->cd;
- rd = jd->rd;
-
- /* generate exception stubs */
-
- targetdisp = 0;
-
- for (er = cd->exceptionrefs; er != NULL; er = er->next) {
- /* back-patch the branch to this exception code */
-
- branchmpc = er->branchpos;
- targetmpc = cd->mcodeptr - cd->mcodebase;
-
- md_codegen_patch_branch(cd, branchmpc, targetmpc);
-
- MCODECHECK(100);
-
- /* Check if the exception is an
- ArrayIndexOutOfBoundsException. If so, move index register
- into REG_ITMP1. */
-
- if (er->reg != -1)
- M_MOV(er->reg, REG_ITMP1);
-
- /* calcuate exception address */
-
- M_LDA(REG_ITMP2_XPC, REG_PV, er->branchpos - 4);
-
- /* move function to call into REG_ITMP3 */
-
- disp = dseg_add_functionptr(cd, er->function);
- M_ALD(REG_ITMP3, REG_PV, disp);
-
- if (targetdisp == 0) {
- targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
-
- M_MOV(REG_PV, REG_A0);
- M_MOV(REG_SP, REG_A1);
-
- if (jd->isleafmethod)
- M_MOV(REG_RA, REG_A2);
- else
- M_ALD(REG_A2, REG_SP, (cd->stackframesize - 1) * 8);
-
- M_MOV(REG_ITMP2_XPC, REG_A3);
- M_MOV(REG_ITMP1, REG_A4);
-
- M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
- M_AST(REG_ITMP2_XPC, REG_SP, 0 * 8);
-
- if (jd->isleafmethod)
- M_AST(REG_RA, REG_SP, 1 * 8);
-
- M_JSR(REG_RA, REG_ITMP3);
- M_NOP;
- M_MOV(REG_RESULT, REG_ITMP1_XPTR);
-
- if (jd->isleafmethod)
- M_ALD(REG_RA, REG_SP, 1 * 8);
-
- M_ALD(REG_ITMP2_XPC, REG_SP, 0 * 8);
- M_AADD_IMM(REG_SP, 2 * 8, REG_SP);
-
- disp = dseg_add_functionptr(cd, asm_handle_exception);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_JMP(REG_ITMP3);
- M_NOP;
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ switch (condition) {
+ case ICMD_IFEQ:
+ M_BNEZ(reg, 2);
+ break;
+
+ case ICMD_IFNE:
+ M_BEQZ(reg, 2);
+ break;
+
+ case ICMD_IFLE:
+ M_BGTZ(reg, 2);
+ break;
+
+ default:
+ vm_abort("emit_classcast_check: unknown condition %d", condition);
}
- else {
- disp = (((u4 *) cd->mcodebase) + targetdisp) -
- (((u4 *) cd->mcodeptr) + 1);
- M_BR(disp);
- M_NOP;
- }
+ M_NOP;
+ M_ALD_INTERN(s1, REG_ZERO, TRAP_ClassCastException);
}
}
-/* emit_patcher_stubs **********************************************************
+/* emit_nullpointer_check ******************************************************
- Generates the code for the patcher stubs.
+ Emit a NullPointerException check.
*******************************************************************************/
-void emit_patcher_stubs(jitdata *jd)
+void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
{
- codegendata *cd;
- patchref *pr;
- u4 mcode[2];
- u1 *savedmcodeptr;
- u1 *tmpmcodeptr;
- s4 targetdisp;
- s4 disp;
-
- /* get required compiler data */
-
- cd = jd->cd;
-
- /* generate code patching stub call code */
-
- targetdisp = 0;
-
-/* for (pr = list_first_unsynced(cd->patchrefs); pr != NULL; */
-/* pr = list_next_unsynced(cd->patchrefs, pr)) { */
- for (pr = cd->patchrefs; pr != NULL; pr = pr->next) {
- /* check code segment size */
-
- MCODECHECK(100);
-
- /* Get machine code which is patched back in later. The
- call is 2 instruction words long. */
-
- tmpmcodeptr = (u1 *) (cd->mcodebase + pr->branchpos);
-
- /* We use 2 loads here as an unaligned 8-byte read on 64-bit
- MIPS causes a SIGSEGV and using the same code for both
- architectures is much better. */
-
- mcode[0] = ((u4 *) tmpmcodeptr)[0];
- mcode[1] = ((u4 *) tmpmcodeptr)[1];
-
- /* Patch in the call to call the following code (done at
- compile time). */
-
- savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
- cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
-
- disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 1);
-
- if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) {
- *exceptionptr =
- new_internalerror("Jump offset is out of range: %d > +/-%d",
- disp, 0x00007fff);
- return;
- }
-
- M_BR(disp);
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_BNEZ(reg, 2);
M_NOP;
-
- cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
-
- /* create stack frame */
-
- M_ASUB_IMM(REG_SP, 6 * 8, REG_SP);
-
- /* calculate return address and move it onto the stack */
-
- M_LDA(REG_ITMP3, REG_PV, pr->branchpos);
- M_AST(REG_ITMP3, REG_SP, 5 * 8);
-
- /* move pointer to java_objectheader onto stack */
-
-#if defined(ENABLE_THREADS)
- /* create a virtual java_objectheader */
-
- (void) dseg_add_unique_address(cd, NULL); /* flcword */
- (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
- disp = dseg_add_unique_address(cd, NULL); /* vftbl */
-
- M_LDA(REG_ITMP3, REG_PV, disp);
- M_AST(REG_ITMP3, REG_SP, 4 * 8);
-#else
- /* do nothing */
-#endif
-
- /* move machine code onto stack */
-
- disp = dseg_add_s4(cd, mcode[0]);
- M_ILD(REG_ITMP3, REG_PV, disp);
- M_IST(REG_ITMP3, REG_SP, 3 * 8);
-
- disp = dseg_add_s4(cd, mcode[1]);
- M_ILD(REG_ITMP3, REG_PV, disp);
- M_IST(REG_ITMP3, REG_SP, 3 * 8 + 4);
-
- /* move class/method/field reference onto stack */
-
- disp = dseg_add_address(cd, pr->ref);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_AST(REG_ITMP3, REG_SP, 2 * 8);
-
- /* move data segment displacement onto stack */
-
- disp = dseg_add_s4(cd, pr->disp);
- M_ILD(REG_ITMP3, REG_PV, disp);
- M_IST(REG_ITMP3, REG_SP, 1 * 8);
-
- /* move patcher function pointer onto stack */
-
- disp = dseg_add_address(cd, pr->patcher);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_AST(REG_ITMP3, REG_SP, 0 * 8);
-
- if (targetdisp == 0) {
- targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
-
- disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_JMP(REG_ITMP3);
- M_NOP;
- }
- else {
- disp = (((u4 *) cd->mcodebase) + targetdisp) -
- (((u4 *) cd->mcodeptr) + 1);
-
- M_BR(disp);
- M_NOP;
- }
+ M_ALD_INTERN(REG_ZERO, REG_ZERO, TRAP_NullPointerException);
}
}
-/* emit_replacement_stubs ******************************************************
+/* emit_exception_check ********************************************************
- Generates the code for the replacement stubs.
+ Emit an Exception check.
*******************************************************************************/
-void emit_replacement_stubs(jitdata *jd)
+void emit_exception_check(codegendata *cd, instruction *iptr)
{
- codegendata *cd;
- codeinfo *code;
- rplpoint *rplp;
- u1 *savedmcodeptr;
- s4 disp;
- s4 i;
-
- /* get required compiler data */
-
- cd = jd->cd;
- code = jd->code;
-
- rplp = code->rplpoints;
-
- for (i = 0; i < code->rplpointcount; ++i, ++rplp) {
- /* check code segment size */
-
- MCODECHECK(100);
-
- /* note start of stub code */
-
- rplp->outcode = (u1 *) (ptrint) (cd->mcodeptr - cd->mcodebase);
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_BNEZ(REG_RESULT, 2);
+ M_NOP;
+ M_ALD_INTERN(REG_RESULT, REG_ZERO, TRAP_CHECK_EXCEPTION);
+ }
+}
- /* make machine code for patching */
- savedmcodeptr = cd->mcodeptr;
- cd->mcodeptr = (u1 *) &(rplp->mcode);
+/* emit_trap_compiler **********************************************************
- disp = (ptrint) ((s4 *) rplp->outcode - (s4 *) rplp->pc) - 1;
+ Emit a trap instruction which calls the JIT compiler.
- if ((disp < (s4) 0xffff8000) || (disp > (s4) 0x00007fff)) {
- *exceptionptr =
- new_internalerror("Jump offset is out of range: %d > +/-%d",
- disp, 0x00007fff);
- return;
- }
+*******************************************************************************/
- M_BR(disp);
- M_NOP; /* delay slot */
+void emit_trap_compiler(codegendata *cd)
+{
+ M_ALD_INTERN(REG_METHODPTR, REG_ZERO, TRAP_COMPILER);
+}
- cd->mcodeptr = savedmcodeptr;
- /* create stack frame - 16-byte aligned */
+/* emit_trap *******************************************************************
- M_ASUB_IMM(REG_SP, 2 * 8, REG_SP);
+ Emit a trap instruction and return the original machine code.
- /* push address of `rplpoint` struct */
+*******************************************************************************/
- disp = dseg_add_address(cd, rplp);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_AST(REG_ITMP3, REG_SP, 0 * 8);
+uint32_t emit_trap(codegendata *cd)
+{
+ // Get machine code which is patched back in later. The trap is 1
+ // instruction word long.
+ uint32_t mcode = *((uint32_t*) cd->mcodeptr);
- /* jump to replacement function */
+ M_RESERVED;
- disp = dseg_add_functionptr(cd, asm_replacement_out);
- M_ALD(REG_ITMP3, REG_PV, disp);
- M_JMP(REG_ITMP3);
- M_NOP; /* delay slot */
- }
+ return mcode;
}
void emit_verbosecall_enter(jitdata *jd)
{
methodinfo *m;
+ codeinfo *code;
codegendata *cd;
registerdata *rd;
methoddesc *md;
s4 disp;
- s4 i, t;
+ s4 i, j, t;
/* get required compiler data */
- m = jd->m;
- cd = jd->cd;
- rd = jd->rd;
+ m = jd->m;
+ code = jd->code;
+ cd = jd->cd;
+ rd = jd->rd;
md = m->parseddesc;
M_NOP;
- M_LDA(REG_SP, REG_SP, -(2 + ARG_CNT + TMP_CNT) * 8);
- M_AST(REG_RA, REG_SP, 1 * 8);
+ M_LDA(REG_SP, REG_SP, -(PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8));
+ M_AST(REG_RA, REG_SP, PA_SIZE + 1 * 8);
- /* save argument registers */
+ /* save argument registers (we store the registers as address
+ types, so it's correct for MIPS32 too) */
for (i = 0; i < INT_ARG_CNT; i++)
- M_LST(rd->argintregs[i], REG_SP, (2 + i) * 8);
+ M_AST(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
for (i = 0; i < FLT_ARG_CNT; i++)
- M_DST(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
+ M_DST(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
/* save temporary registers for leaf methods */
- if (jd->isleafmethod) {
+ if (code_is_leafmethod(code)) {
for (i = 0; i < INT_TMP_CNT; i++)
- M_LST(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
+ M_AST(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
for (i = 0; i < FLT_TMP_CNT; i++)
- M_DST(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
+ M_DST(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
}
- /* load float arguments into integer registers */
+ /* Load float arguments into integer registers. MIPS32 has less
+ float argument registers than integer ones, we need to check
+ that. */
- for (i = 0; i < md->paramcount && i < INT_ARG_CNT; i++) {
+ for (i = 0; i < md->paramcount && i < INT_ARG_CNT && i < FLT_ARG_CNT; i++) {
t = md->paramtypes[i].type;
if (IS_FLT_DBL_TYPE(t)) {
if (IS_2_WORD_TYPE(t)) {
- M_DST(rd->argfltregs[i], REG_SP, 0 * 8);
- M_LLD(rd->argintregs[i], REG_SP, 0 * 8);
+ M_DST(abi_registers_float_argument[i], REG_SP, 0 * 8);
+ M_LLD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
}
else {
- M_FST(rd->argfltregs[i], REG_SP, 0 * 8);
- M_ILD(rd->argintregs[i], REG_SP, 0 * 8);
+ M_FST(abi_registers_float_argument[i], REG_SP, 0 * 8);
+ M_ILD(abi_registers_integer_argument[i], REG_SP, 0 * 8);
}
}
}
+#if SIZEOF_VOID_P == 4
+ for (i = 0, j = 0; i < md->paramcount && i < TRACE_ARGS_NUM; i++) {
+ t = md->paramtypes[i].type;
+
+ if (IS_INT_LNG_TYPE(t)) {
+ if (IS_2_WORD_TYPE(t)) {
+ M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
+ M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8 + 4);
+ }
+ else {
+# if WORDS_BIGENDIAN == 1
+ M_MOV(REG_ZERO, abi_registers_integer_argument[j]);
+ M_ILD(abi_registers_integer_argument[j + 1], REG_SP, PA_SIZE + (2 + i) * 8);
+# else
+ M_ILD(abi_registers_integer_argument[j], REG_SP, PA_SIZE + (2 + i) * 8);
+ M_MOV(REG_ZERO, abi_registers_integer_argument[j + 1]);
+# endif
+ }
+ j += 2;
+ }
+ }
+#endif
+
disp = dseg_add_address(cd, m);
M_ALD(REG_ITMP1, REG_PV, disp);
- M_AST(REG_ITMP1, REG_SP, 0 * 8);
- disp = dseg_add_functionptr(cd, builtin_trace_args);
+ M_AST(REG_ITMP1, REG_SP, PA_SIZE + 0 * 8);
+ disp = dseg_add_functionptr(cd, builtin_verbosecall_enter);
M_ALD(REG_ITMP3, REG_PV, disp);
M_JSR(REG_RA, REG_ITMP3);
M_NOP;
/* restore argument registers */
for (i = 0; i < INT_ARG_CNT; i++)
- M_LLD(rd->argintregs[i], REG_SP, (2 + i) * 8);
+ M_ALD(abi_registers_integer_argument[i], REG_SP, PA_SIZE + (2 + i) * 8);
for (i = 0; i < FLT_ARG_CNT; i++)
- M_DLD(rd->argfltregs[i], REG_SP, (2 + INT_ARG_CNT + i) * 8);
+ M_DLD(abi_registers_float_argument[i], REG_SP, PA_SIZE + (2 + INT_ARG_CNT + i) * 8);
/* restore temporary registers for leaf methods */
- if (jd->isleafmethod) {
+ if (code_is_leafmethod(code)) {
for (i = 0; i < INT_TMP_CNT; i++)
- M_LLD(rd->tmpintregs[i], REG_SP, (2 + ARG_CNT + i) * 8);
+ M_ALD(rd->tmpintregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + i) * 8);
for (i = 0; i < FLT_TMP_CNT; i++)
- M_DLD(rd->tmpfltregs[i], REG_SP, (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
+ M_DLD(rd->tmpfltregs[i], REG_SP, PA_SIZE + (2 + ARG_CNT + INT_TMP_CNT + i) * 8);
}
- M_ALD(REG_RA, REG_SP, 1 * 8);
- M_LDA(REG_SP, REG_SP, (2 + ARG_CNT + TMP_CNT) * 8);
+ M_ALD(REG_RA, REG_SP, PA_SIZE + 1 * 8);
+ M_LDA(REG_SP, REG_SP, PA_SIZE + (2 + ARG_CNT + TMP_CNT) * 8);
/* mark trace code */
Generates the code for the call trace.
+ void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
+
*******************************************************************************/
#if !defined(NDEBUG)
methodinfo *m;
codegendata *cd;
registerdata *rd;
+ methoddesc *md;
s4 disp;
/* get required compiler data */
cd = jd->cd;
rd = jd->rd;
+ md = m->parseddesc;
+
/* mark trace code */
M_NOP;
- M_LDA(REG_SP, REG_SP, -4 * 8); /* keep stack 16-byte aligned */
- M_LST(REG_RA, REG_SP, 0 * 8);
+#if SIZEOF_VOID_P == 8
+ M_ASUB_IMM(REG_SP, 4 * 8, REG_SP); /* keep stack 16-byte aligned */
+ M_AST(REG_RA, REG_SP, 0 * 8);
M_LST(REG_RESULT, REG_SP, 1 * 8);
M_DST(REG_FRESULT, REG_SP, 2 * 8);
+ M_MOV(REG_RESULT, REG_A0);
+ M_DMOV(REG_FRESULT, REG_FA1);
+ M_FMOV(REG_FRESULT, REG_FA2);
+
disp = dseg_add_address(cd, m);
- M_ALD(rd->argintregs[0], REG_PV, disp);
+ M_ALD(REG_A4, REG_PV, disp);
+#else
+ M_ASUB_IMM(REG_SP, (8*4 + 4 * 8), REG_SP);
+ M_AST(REG_RA, REG_SP, 8*4 + 0 * 8);
+
+ M_LST(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
+ M_DST(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
+
+ switch (md->returntype.type) {
+ case TYPE_LNG:
+ M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
+ break;
- M_MOV(REG_RESULT, rd->argintregs[1]);
- M_DMOV(REG_FRESULT, rd->argfltregs[2]);
- M_FMOV(REG_FRESULT, rd->argfltregs[3]);
+ default:
+# if WORDS_BIGENDIAN == 1
+ M_MOV(REG_ZERO, REG_A0);
+ M_MOV(REG_RESULT, REG_A1);
+# else
+ M_MOV(REG_RESULT, REG_A0);
+ M_MOV(REG_ZERO, REG_A1);
+# endif
+ }
+
+ M_LLD(REG_A2_A3_PACKED, REG_SP, 8*4 + 2 * 8);
+ M_FST(REG_FRESULT, REG_SP, 4*4 + 0 * 4);
+
+ disp = dseg_add_address(cd, m);
+ M_ALD(REG_ITMP1, REG_PV, disp);
+ M_AST(REG_ITMP1, REG_SP, 4*4 + 1 * 4);
+#endif
- disp = dseg_add_functionptr(cd, builtin_displaymethodstop);
+ disp = dseg_add_functionptr(cd, builtin_verbosecall_exit);
M_ALD(REG_ITMP3, REG_PV, disp);
M_JSR(REG_RA, REG_ITMP3);
M_NOP;
+#if SIZEOF_VOID_P == 8
M_DLD(REG_FRESULT, REG_SP, 2 * 8);
M_LLD(REG_RESULT, REG_SP, 1 * 8);
- M_LLD(REG_RA, REG_SP, 0 * 8);
- M_LDA(REG_SP, REG_SP, 4 * 8);
+ M_ALD(REG_RA, REG_SP, 0 * 8);
+ M_AADD_IMM(REG_SP, 4 * 8, REG_SP);
+#else
+ M_DLD(REG_FRESULT, REG_SP, 8*4 + 2 * 8);
+ M_LLD(REG_RESULT_PACKED, REG_SP, 8*4 + 1 * 8);
+
+ M_ALD(REG_RA, REG_SP, 8*4 + 0 * 8);
+ M_AADD_IMM(REG_SP, 8*4 + 4 * 8, REG_SP);
+#endif
/* mark trace code */
projects / cacao.git / blobdiff