* src/vm/jit/i386/codegen.c (codegen): Implemented inlining of synchronized
[cacao.git] / src / vm / jit / i386 / emitfuncs.c
index ab4dd28e2df700eafab922db2953bbf3be80ff19..9903ceef72bee778c09fd977c0649f57f5090dc2 100644 (file)
@@ -1,10 +1,9 @@
-/* jit/i386/emitfuncs.c - i386 code emitter functions
+/* vm/jit/i386/emitfuncs.c - i386 code emitter functions
 
-   Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
-   Institut f. Computersprachen, TU Wien
-   R. Grafl, A. Krall, C. Kruegel, C. Oates, R. Obermaisser, M. Probst,
-   S. Ring, E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich,
-   J. Wenninger
+   Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
+   C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
+   E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
+   J. Wenninger, Institut f. Computersprachen - TU Wien
 
    This file is part of CACAO.
 
 
    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
-   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
-   02111-1307, USA.
+   Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+   02110-1301, USA.
 
-   Contact: cacao@complang.tuwien.ac.at
+   Contact: cacao@cacaojvm.org
 
    Authors: Christian Thalinger
 
-   $Id: emitfuncs.c 1351 2004-07-22 22:39:05Z twisti $
+   $Id: emitfuncs.c 4357 2006-01-22 23:33:38Z twisti $
 
 */
 
 
-#include "jit/jit.h"
-#include "jit/i386/emitfuncs.h"
-#include "jit/i386/codegen.h"
-#include "jit/i386/types.h"
+#include "config.h"
+#include "vm/types.h"
+
+#include "vm/statistics.h"
+#include "vm/jit/jit.h"
+#include "vm/jit/i386/md-abi.h"
+#include "vm/jit/i386/emitfuncs.h"
+#include "vm/jit/i386/codegen.h"
 
 
 void i386_emit_ialu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr)
@@ -43,60 +46,60 @@ void i386_emit_ialu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr)
        if (iptr->dst->flags & INMEMORY) {
                if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
                        if (src->regoff == iptr->dst->regoff) {
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
-                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, REG_ITMP1);
+                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
 
                        } else if (src->prev->regoff == iptr->dst->regoff) {
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
-                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, REG_ITMP1);
+                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
 
                        } else {
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
-                               i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 8, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, REG_ITMP1);
+                               i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 4, REG_ITMP1);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
                        }
 
                } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
                        if (src->regoff == iptr->dst->regoff) {
-                               i386_alu_reg_membase(cd, alu_op, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
+                               i386_alu_reg_membase(cd, alu_op, src->prev->regoff, REG_SP, iptr->dst->regoff * 4);
 
                        } else {
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, REG_ITMP1);
                                i386_alu_reg_reg(cd, alu_op, src->prev->regoff, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
                        }
 
                } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
                        if (src->prev->regoff == iptr->dst->regoff) {
-                               i386_alu_reg_membase(cd, alu_op, src->regoff, REG_SP, iptr->dst->regoff * 8);
+                               i386_alu_reg_membase(cd, alu_op, src->regoff, REG_SP, iptr->dst->regoff * 4);
                                                
                        } else {
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, REG_ITMP1);
                                i386_alu_reg_reg(cd, alu_op, src->regoff, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
                        }
 
                } else {
-                       i386_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
-                       i386_alu_reg_membase(cd, alu_op, src->regoff, REG_SP, iptr->dst->regoff * 8);
+                       i386_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 4);
+                       i386_alu_reg_membase(cd, alu_op, src->regoff, REG_SP, iptr->dst->regoff * 4);
                }
 
        } else {
                if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
-                       i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
-                       i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 8, iptr->dst->regoff);
+                       i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, iptr->dst->regoff);
+                       i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 4, iptr->dst->regoff);
 
                } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
                        if (src->prev->regoff != iptr->dst->regoff)
                                i386_mov_reg_reg(cd, src->prev->regoff, iptr->dst->regoff);
 
-                       i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 8, iptr->dst->regoff);
+                       i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 4, iptr->dst->regoff);
 
                } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
                        if (src->regoff != iptr->dst->regoff)
                                i386_mov_reg_reg(cd, src->regoff, iptr->dst->regoff);
 
-                       i386_alu_membase_reg(cd, alu_op, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+                       i386_alu_membase_reg(cd, alu_op, REG_SP, src->prev->regoff * 4, iptr->dst->regoff);
 
                } else {
                        if (src->regoff == iptr->dst->regoff) {
@@ -118,28 +121,30 @@ void i386_emit_ialuconst(codegendata *cd, s4 alu_op, stackptr src, instruction *
        if (iptr->dst->flags & INMEMORY) {
                if (src->flags & INMEMORY) {
                        if (src->regoff == iptr->dst->regoff) {
-                               i386_alu_imm_membase(cd, alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+                               i386_alu_imm_membase(cd, alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 4);
 
                        } else {
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, REG_ITMP1);
                                i386_alu_imm_reg(cd, alu_op, iptr->val.i, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
                        }
 
                } else {
-                       i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8);
-                       i386_alu_imm_membase(cd, alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+                       i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 4);
+                       i386_alu_imm_membase(cd, alu_op, iptr->val.i, REG_SP, iptr->dst->regoff * 4);
                }
 
        } else {
                if (src->flags & INMEMORY) {
-                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
+                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, iptr->dst->regoff);
                        i386_alu_imm_reg(cd, alu_op, iptr->val.i, iptr->dst->regoff);
 
                } else {
                        if (src->regoff != iptr->dst->regoff)
                                i386_mov_reg_reg(cd, src->regoff, iptr->dst->regoff);
 
+                       /* `inc reg' is slower on p4's (regarding to ia32 optimization    */
+                       /* reference manual and benchmarks) and as fast on athlon's.      */
                        i386_alu_imm_reg(cd, alu_op, iptr->val.i, iptr->dst->regoff);
                }
        }
@@ -151,24 +156,24 @@ void i386_emit_lalu(codegendata *cd, s4 alu_op, stackptr src, instruction *iptr)
        if (iptr->dst->flags & INMEMORY) {
                if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
                        if (src->regoff == iptr->dst->regoff) {
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
-                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
-                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, REG_ITMP1);
+                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4 + 4, REG_ITMP1);
+                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 4 + 4);
 
                        } else if (src->prev->regoff == iptr->dst->regoff) {
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
-                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
-                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, REG_ITMP1);
+                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4 + 4, REG_ITMP1);
+                               i386_alu_reg_membase(cd, alu_op, REG_ITMP1, REG_SP, iptr->dst->regoff * 4 + 4);
 
                        } else {
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
-                               i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 8, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8 + 4, REG_ITMP1);
-                               i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, REG_ITMP1);
+                               i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 4, REG_ITMP1);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4 + 4, REG_ITMP1);
+                               i386_alu_membase_reg(cd, alu_op, REG_SP, src->regoff * 4 + 4, REG_ITMP1);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4 + 4);
                        }
                }
        }
@@ -180,16 +185,16 @@ void i386_emit_laluconst(codegendata *cd, s4 alu_op, stackptr src, instruction *
        if (iptr->dst->flags & INMEMORY) {
                if (src->flags & INMEMORY) {
                        if (src->regoff == iptr->dst->regoff) {
-                               i386_alu_imm_membase(cd, alu_op, iptr->val.l, REG_SP, iptr->dst->regoff * 8);
-                               i386_alu_imm_membase(cd, alu_op, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 8 + 4);
+                               i386_alu_imm_membase(cd, alu_op, iptr->val.l, REG_SP, iptr->dst->regoff * 4);
+                               i386_alu_imm_membase(cd, alu_op, iptr->val.l >> 32, REG_SP, iptr->dst->regoff * 4 + 4);
 
                        } else {
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, REG_ITMP1);
                                i386_alu_imm_reg(cd, alu_op, iptr->val.l, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8 + 4, REG_ITMP1);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4 + 4, REG_ITMP1);
                                i386_alu_imm_reg(cd, alu_op, iptr->val.l >> 32, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8 + 4);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4 + 4);
                        }
                }
        }
@@ -201,53 +206,53 @@ void i386_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction *i
        if (iptr->dst->flags & INMEMORY) {
                if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
                        if (src->prev->regoff == iptr->dst->regoff) {
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX);
-                               i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, ECX);
+                               i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 4);
 
                        } else {
-                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX);
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
+                               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, ECX);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, REG_ITMP1);
                                i386_shift_reg(cd, shift_op, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
                        }
 
                } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
-                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX);
-                       i386_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
-                       i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 8);
+                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, ECX);
+                       i386_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 4);
+                       i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 4);
 
                } else if (!(src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
                        if (src->prev->regoff == iptr->dst->regoff) {
                                if (src->regoff != ECX)
                                        i386_mov_reg_reg(cd, src->regoff, ECX);
 
-                               i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 8);
+                               i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 4);
 
                        } else {        
                                if (src->regoff != ECX)
                                        i386_mov_reg_reg(cd, src->regoff, ECX);
 
-                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, REG_ITMP1);
+                               i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, REG_ITMP1);
                                i386_shift_reg(cd, shift_op, REG_ITMP1);
-                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                               i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
                        }
 
                } else {
                        if (src->regoff != ECX)
                                i386_mov_reg_reg(cd, src->regoff, ECX);
 
-                       i386_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 8);
-                       i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 8);
+                       i386_mov_reg_membase(cd, src->prev->regoff, REG_SP, iptr->dst->regoff * 4);
+                       i386_shift_membase(cd, shift_op, REG_SP, iptr->dst->regoff * 4);
                }
 
        } else {
                if ((src->flags & INMEMORY) && (src->prev->flags & INMEMORY)) {
-                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX);
-                       i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, ECX);
+                       i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, iptr->dst->regoff);
                        i386_shift_reg(cd, shift_op, iptr->dst->regoff);
 
                } else if ((src->flags & INMEMORY) && !(src->prev->flags & INMEMORY)) {
-                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, ECX);
+                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, ECX);
 
                        if (src->prev->regoff != iptr->dst->regoff)
                                i386_mov_reg_reg(cd, src->prev->regoff, iptr->dst->regoff);
@@ -258,7 +263,7 @@ void i386_emit_ishift(codegendata *cd, s4 shift_op, stackptr src, instruction *i
                        if (src->regoff != ECX)
                                i386_mov_reg_reg(cd, src->regoff, ECX);
 
-                       i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 8, iptr->dst->regoff);
+                       i386_mov_membase_reg(cd, REG_SP, src->prev->regoff * 4, iptr->dst->regoff);
                        i386_shift_reg(cd, shift_op, iptr->dst->regoff);
 
                } else {
@@ -278,21 +283,21 @@ void i386_emit_ishiftconst(codegendata *cd, s4 shift_op, stackptr src, instructi
 {
        if ((src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
                if (src->regoff == iptr->dst->regoff) {
-                       i386_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+                       i386_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 4);
 
                } else {
-                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, REG_ITMP1);
+                       i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, REG_ITMP1);
                        i386_shift_imm_reg(cd, shift_op, iptr->val.i, REG_ITMP1);
-                       i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 8);
+                       i386_mov_reg_membase(cd, REG_ITMP1, REG_SP, iptr->dst->regoff * 4);
                }
 
        } else if ((src->flags & INMEMORY) && !(iptr->dst->flags & INMEMORY)) {
-               i386_mov_membase_reg(cd, REG_SP, src->regoff * 8, iptr->dst->regoff);
+               i386_mov_membase_reg(cd, REG_SP, src->regoff * 4, iptr->dst->regoff);
                i386_shift_imm_reg(cd, shift_op, iptr->val.i, iptr->dst->regoff);
                                
        } else if (!(src->flags & INMEMORY) && (iptr->dst->flags & INMEMORY)) {
-               i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 8);
-               i386_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+               i386_mov_reg_membase(cd, src->regoff, REG_SP, iptr->dst->regoff * 4);
+               i386_shift_imm_membase(cd, shift_op, iptr->val.i, REG_SP, iptr->dst->regoff * 4);
 
        } else {
                if (src->regoff != iptr->dst->regoff)
@@ -309,26 +314,26 @@ void i386_emit_ifcc_iconst(codegendata *cd, s4 if_op, stackptr src, instruction
                s4 offset = 0;
 
                if (src->flags & INMEMORY) {
-                       i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8);
+                       i386_alu_imm_membase(cd, ALU_CMP, 0, REG_SP, src->regoff * 4);
 
                } else {
                        i386_test_reg_reg(cd, src->regoff, src->regoff);
                }
 
                offset += 7;
-               CALCOFFSETBYTES(offset, REG_SP, iptr->dst->regoff * 8);
+               CALCOFFSETBYTES(offset, REG_SP, iptr->dst->regoff * 4);
        
                i386_jcc(cd, if_op, offset + (iptr[1].opc == ICMD_ELSE_ICONST) ? 5 + offset : 0);
-               i386_mov_imm_membase(cd, iptr->val.i, REG_SP, iptr->dst->regoff * 8);
+               i386_mov_imm_membase(cd, iptr->val.i, REG_SP, iptr->dst->regoff * 4);
 
                if (iptr[1].opc == ICMD_ELSE_ICONST) {
                        i386_jmp_imm(cd, offset);
-                       i386_mov_imm_membase(cd, iptr[1].val.i, REG_SP, iptr->dst->regoff * 8);
+                       i386_mov_imm_membase(cd, iptr[1].val.i, REG_SP, iptr->dst->regoff * 4);
                }
 
        } else {
                if (src->flags & INMEMORY) {
-                       i386_alu_imm_membase(cd, I386_CMP, 0, REG_SP, src->regoff * 8);
+                       i386_alu_imm_membase(cd, ALU_CMP, 0, REG_SP, src->regoff * 4);
 
                } else {
                        i386_test_reg_reg(cd, src->regoff, src->regoff);
@@ -351,6 +356,7 @@ void i386_emit_ifcc_iconst(codegendata *cd, s4 if_op, stackptr src, instruction
  */
 void i386_mov_reg_reg(codegendata *cd, s4 reg, s4 dreg)
 {
+       COUNT(count_mov_reg_reg);
        *(cd->mcodeptr++) = 0x89;
        i386_emit_reg((reg),(dreg));
 }
@@ -373,6 +379,7 @@ void i386_movb_imm_reg(codegendata *cd, s4 imm, s4 reg)
 
 void i386_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
 {
+       COUNT(count_mov_mem_reg);
        *(cd->mcodeptr++) = 0x8b;
        i386_emit_membase((basereg),(disp),(reg));
 }
@@ -384,21 +391,31 @@ void i386_mov_membase_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
  */
 void i386_mov_membase32_reg(codegendata *cd, s4 basereg, s4 disp, s4 reg)
 {
+       COUNT(count_mov_mem_reg);
        *(cd->mcodeptr++) = 0x8b;
-       i386_address_byte(2, (reg), (basereg));
-       i386_emit_imm32((disp));
+       i386_emit_membase32((basereg),(disp),(reg));
 }
 
 
 void i386_mov_reg_membase(codegendata *cd, s4 reg, s4 basereg, s4 disp)
 {
+       COUNT(count_mov_reg_mem);
        *(cd->mcodeptr++) = 0x89;
        i386_emit_membase((basereg),(disp),(reg));
 }
 
 
+void i386_mov_reg_membase32(codegendata *cd, s4 reg, s4 basereg, s4 disp)
+{
+       COUNT(count_mov_reg_mem);
+       *(cd->mcodeptr++) = 0x89;
+       i386_emit_membase32((basereg),(disp),(reg));
+}
+
+
 void i386_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
 {
+       COUNT(count_mov_mem_reg);
        *(cd->mcodeptr++) = 0x8b;
        i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
 }
@@ -406,20 +423,15 @@ void i386_mov_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4
 
 void i386_mov_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
 {
+       COUNT(count_mov_reg_mem);
        *(cd->mcodeptr++) = 0x89;
        i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
 }
 
 
-void i386_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
-{
-       *(cd->mcodeptr++) = 0x8b;
-       i386_emit_mem((dreg),(mem));
-}
-
-
 void i386_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
 {
+       COUNT(count_mov_reg_mem);
        *(cd->mcodeptr++) = 0x66;
        *(cd->mcodeptr++) = 0x89;
        i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
@@ -428,11 +440,36 @@ void i386_movw_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 ind
 
 void i386_movb_reg_memindex(codegendata *cd, s4 reg, s4 disp, s4 basereg, s4 indexreg, s4 scale)
 {
+       COUNT(count_mov_reg_mem);
        *(cd->mcodeptr++) = 0x88;
        i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
 }
 
 
+void i386_mov_reg_mem(codegendata *cd, s4 reg, s4 mem)
+{
+       COUNT(count_mov_reg_mem);
+       *(cd->mcodeptr++) = 0x89;
+       i386_emit_mem((reg),(mem));
+}
+
+
+void i386_mov_mem_reg(codegendata *cd, s4 mem, s4 dreg)
+{
+       COUNT(count_mov_mem_reg);
+       *(cd->mcodeptr++) = 0x8b;
+       i386_emit_mem((dreg),(mem));
+}
+
+
+void i386_mov_imm_mem(codegendata *cd, s4 imm, s4 mem)
+{
+       *(cd->mcodeptr++) = 0xc7;
+       i386_emit_mem(0, mem);
+       i386_emit_imm32(imm);
+}
+
+
 void i386_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
 {
        *(cd->mcodeptr++) = 0xc7;
@@ -441,8 +478,25 @@ void i386_mov_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
 }
 
 
+void i386_mov_imm_membase32(codegendata *cd, s4 imm, s4 basereg, s4 disp)
+{
+       *(cd->mcodeptr++) = 0xc7;
+       i386_emit_membase32((basereg),(disp),0);
+       i386_emit_imm32((imm));
+}
+
+
+void i386_movb_imm_membase(codegendata *cd, s4 imm, s4 basereg, s4 disp)
+{
+       *(cd->mcodeptr++) = 0xc6;
+       i386_emit_membase((basereg),(disp),0);
+       i386_emit_imm8((imm));
+}
+
+
 void i386_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
 {
+       COUNT(count_mov_mem_reg);
        *(cd->mcodeptr++) = 0x0f;
        *(cd->mcodeptr++) = 0xbe;
        i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
@@ -451,6 +505,7 @@ void i386_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg,
 
 void i386_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
 {
+       COUNT(count_mov_mem_reg);
        *(cd->mcodeptr++) = 0x0f;
        *(cd->mcodeptr++) = 0xbf;
        i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
@@ -459,6 +514,7 @@ void i386_movswl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg,
 
 void i386_movzwl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
 {
+       COUNT(count_mov_mem_reg);
        *(cd->mcodeptr++) = 0x0f;
        *(cd->mcodeptr++) = 0xb7;
        i386_emit_memindex((reg),(disp),(basereg),(indexreg),(scale));
@@ -528,6 +584,14 @@ void i386_alu_imm_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
 }
 
 
+void i386_alu_imm32_reg(codegendata *cd, s4 opc, s4 imm, s4 dreg)
+{
+       *(cd->mcodeptr++) = 0x81;
+       i386_emit_reg((opc),(dreg));
+       i386_emit_imm32((imm));
+}
+
+
 void i386_alu_imm_membase(codegendata *cd, s4 opc, s4 imm, s4 basereg, s4 disp)
 {
        if (i386_is_imm8(imm)) { 
@@ -902,6 +966,13 @@ void i386_flds_membase(codegendata *cd, s4 basereg, s4 disp)
 }
 
 
+void i386_flds_membase32(codegendata *cd, s4 basereg, s4 disp)
+{
+       *(cd->mcodeptr++) = 0xd9;
+       i386_emit_membase32((basereg),(disp),0);
+}
+
+
 void i386_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
 {
        *(cd->mcodeptr++) = 0xdd;
@@ -909,6 +980,13 @@ void i386_fldl_membase(codegendata *cd, s4 basereg, s4 disp)
 }
 
 
+void i386_fldl_membase32(codegendata *cd, s4 basereg, s4 disp)
+{
+       *(cd->mcodeptr++) = 0xdd;
+       i386_emit_membase32((basereg),(disp),0);
+}
+
+
 void i386_fldt_membase(codegendata *cd, s4 basereg, s4 disp)
 {
        *(cd->mcodeptr++) = 0xdb;
@@ -930,6 +1008,20 @@ void i386_fldl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 sc
 }
 
 
+void i386_flds_mem(codegendata *cd, s4 mem)
+{
+       *(cd->mcodeptr++) = 0xd9;
+       i386_emit_mem(0,(mem));
+}
+
+
+void i386_fldl_mem(codegendata *cd, s4 mem)
+{
+       *(cd->mcodeptr++) = 0xdd;
+       i386_emit_mem(0,(mem));
+}
+
+
 void i386_fildl_membase(codegendata *cd, s4 basereg, s4 disp)
 {
        *(cd->mcodeptr++) = 0xdb;
@@ -993,6 +1085,13 @@ void i386_fstps_membase(codegendata *cd, s4 basereg, s4 disp)
 }
 
 
+void i386_fstps_membase32(codegendata *cd, s4 basereg, s4 disp)
+{
+       *(cd->mcodeptr++) = 0xd9;
+       i386_emit_membase32((basereg),(disp),3);
+}
+
+
 void i386_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
 {
        *(cd->mcodeptr++) = 0xdd;
@@ -1000,6 +1099,13 @@ void i386_fstpl_membase(codegendata *cd, s4 basereg, s4 disp)
 }
 
 
+void i386_fstpl_membase32(codegendata *cd, s4 basereg, s4 disp)
+{
+       *(cd->mcodeptr++) = 0xdd;
+       i386_emit_membase32((basereg),(disp),3);
+}
+
+
 void i386_fstpt_membase(codegendata *cd, s4 basereg, s4 disp)
 {
        *(cd->mcodeptr++) = 0xdb;
@@ -1021,6 +1127,20 @@ void i386_fstpl_memindex(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 s
 }
 
 
+void i386_fstps_mem(codegendata *cd, s4 mem)
+{
+       *(cd->mcodeptr++) = 0xd9;
+       i386_emit_mem(3,(mem));
+}
+
+
+void i386_fstpl_mem(codegendata *cd, s4 mem)
+{
+       *(cd->mcodeptr++) = 0xdd;
+       i386_emit_mem(3,(mem));
+}
+
+
 void i386_fistl_membase(codegendata *cd, s4 basereg, s4 disp)
 {
        *(cd->mcodeptr++) = 0xdb;