-/* vm/jit/i386/emit.c - i386 code emitter functions
+/* src/vm/jit/i386/emit.c - i386 code emitter functions
- Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- Contact: cacao@cacaojvm.org
-
- Authors: Christian Thalinger
-
- $Id: emit.c 5173 2006-07-25 15:57:11Z twisti $
-
*/
#include "vm/types.h"
-#include "vm/statistics.h"
-#include "vm/jit/emit.h"
-#include "vm/jit/jit.h"
-#include "vm/jit/i386/md-abi.h"
-#include "vm/jit/i386/md-emit.h"
#include "vm/jit/i386/codegen.h"
+#include "vm/jit/i386/emit.h"
+#include "vm/jit/i386/md-abi.h"
+
+#include "mm/memory.h"
+#include "threads/lock-common.h"
-/* emit_load_s1 ****************************************************************
+#include "vm/exceptions.h"
+
+#include "vm/jit/abi.h"
+#include "vm/jit/asmpart.h"
+#include "vm/jit/dseg.h"
+#include "vm/jit/emit-common.h"
+#include "vm/jit/jit.h"
+#include "vm/jit/patcher-common.h"
+#include "vm/jit/replace.h"
+#include "vm/jit/trace.h"
+#include "vm/jit/trap.h"
- Emits a possible load of the first source operand.
+#include "vmcore/options.h"
+#include "vmcore/statistics.h"
+
+
+/* emit_load ******************************************************************
+
+ Emits a possible load of an operand.
*******************************************************************************/
-s4 emit_load_s1(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+inline s4 emit_load(jitdata *jd, instruction *iptr, varinfo *src, s4 tempreg)
{
codegendata *cd;
s4 disp;
cd = jd->cd;
- if (src->flags & INMEMORY) {
+ if (IS_INMEMORY(src->flags)) {
COUNT_SPILLS;
- disp = src->regoff * 4;
-
- if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
-
- } else {
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
+ disp = src->vv.regoff;
+
+ switch (src->type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_ILD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_LNG:
+ M_LLD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_FLT:
+ M_FLD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_DBL:
+ M_DLD(tempreg, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_load: unknown type %d", src->type);
}
reg = tempreg;
- } else
- reg = src->regoff;
+ }
+ else
+ reg = src->vv.regoff;
return reg;
}
-/* emit_load_s2 ****************************************************************
+/* emit_load_low ************************************************************
- Emits a possible load of the second source operand.
+ Emits a possible load of the low 32-bits of an operand.
*******************************************************************************/
-s4 emit_load_s2(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+inline s4 emit_load_low(jitdata *jd, instruction *iptr, varinfo *src,s4 tempreg)
{
codegendata *cd;
s4 disp;
s4 reg;
+ assert(src->type == TYPE_LNG);
+
/* get required compiler data */
cd = jd->cd;
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
- disp = src->regoff * 4;
+ if (IS_INMEMORY(src->flags)) {
+ COUNT_SPILLS;
- if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
+ disp = src->vv.regoff;
- } else {
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
- }
+ M_ILD(tempreg, REG_SP, disp);
reg = tempreg;
- } else
- reg = src->regoff;
+ }
+ else
+ reg = GET_LOW_REG(src->vv.regoff);
return reg;
}
-/* emit_load_s3 ****************************************************************
+/* emit_load_high ***********************************************************
- Emits a possible load of the third source operand.
+ Emits a possible load of the high 32-bits of an operand.
*******************************************************************************/
-s4 emit_load_s3(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+inline s4 emit_load_high(jitdata *jd, instruction *iptr,varinfo *src,s4 tempreg)
{
codegendata *cd;
s4 disp;
/* get required compiler data */
+ assert(src->type == TYPE_LNG);
+
cd = jd->cd;
- if (src->flags & INMEMORY) {
+ if (IS_INMEMORY(src->flags)) {
COUNT_SPILLS;
- disp = src->regoff * 4;
-
- if (IS_FLT_DBL_TYPE(src->type)) {
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
+ disp = src->vv.regoff;
- } else {
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
- }
+ M_ILD(tempreg, REG_SP, disp + 4);
reg = tempreg;
- } else
- reg = src->regoff;
+ }
+ else
+ reg = GET_HIGH_REG(src->vv.regoff);
return reg;
}
-/* emit_load_s1_low ************************************************************
+/* emit_store ******************************************************************
- Emits a possible load of the low 32-bits of the first long source
- operand.
+ Emits a possible store of the destination operand.
*******************************************************************************/
-s4 emit_load_s1_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+inline void emit_store(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
{
codegendata *cd;
s4 disp;
- s4 reg;
-
- assert(src->type == TYPE_LNG);
/* get required compiler data */
cd = jd->cd;
- if (src->flags & INMEMORY) {
+ if (IS_INMEMORY(dst->flags)) {
COUNT_SPILLS;
- disp = src->regoff * 4;
-
- M_ILD(tempreg, REG_SP, disp);
-
- reg = tempreg;
- } else
- reg = GET_LOW_REG(src->regoff);
-
- return reg;
+ disp = dst->vv.regoff;
+
+ switch (dst->type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_IST(d, REG_SP, disp);
+ break;
+ case TYPE_LNG:
+ M_LST(d, REG_SP, disp);
+ break;
+ case TYPE_FLT:
+ M_FST(d, REG_SP, disp);
+ break;
+ case TYPE_DBL:
+ M_DST(d, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_store: unknown type %d", dst->type);
+ }
+ }
}
-/* emit_load_s2_low ************************************************************
+/* emit_store_low **************************************************************
- Emits a possible load of the low 32-bits of the second long source
+ Emits a possible store of the low 32-bits of the destination
operand.
*******************************************************************************/
-s4 emit_load_s2_low(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+inline void emit_store_low(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
{
codegendata *cd;
- s4 disp;
- s4 reg;
- assert(src->type == TYPE_LNG);
+ assert(dst->type == TYPE_LNG);
/* get required compiler data */
cd = jd->cd;
- if (src->flags & INMEMORY) {
+ if (IS_INMEMORY(dst->flags)) {
COUNT_SPILLS;
-
- disp = src->regoff * 4;
-
- M_ILD(tempreg, REG_SP, disp);
-
- reg = tempreg;
- } else
- reg = GET_LOW_REG(src->regoff);
-
- return reg;
+ M_IST(GET_LOW_REG(d), REG_SP, dst->vv.regoff);
+ }
}
-/* emit_load_s1_high ***********************************************************
+/* emit_store_high *************************************************************
- Emits a possible load of the high 32-bits of the first long source
+ Emits a possible store of the high 32-bits of the destination
operand.
*******************************************************************************/
-s4 emit_load_s1_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+inline void emit_store_high(jitdata *jd, instruction *iptr, varinfo *dst, s4 d)
{
codegendata *cd;
- s4 disp;
- s4 reg;
- assert(src->type == TYPE_LNG);
+ assert(dst->type == TYPE_LNG);
/* get required compiler data */
cd = jd->cd;
- if (src->flags & INMEMORY) {
+ if (IS_INMEMORY(dst->flags)) {
COUNT_SPILLS;
+ M_IST(GET_HIGH_REG(d), REG_SP, dst->vv.regoff + 4);
+ }
+}
- disp = src->regoff * 4;
- M_ILD(tempreg, REG_SP, disp + 4);
+/* emit_copy *******************************************************************
- reg = tempreg;
- } else
- reg = GET_HIGH_REG(src->regoff);
+ Generates a register/memory to register/memory copy.
- return reg;
+*******************************************************************************/
+
+void emit_copy(jitdata *jd, instruction *iptr)
+{
+ codegendata *cd;
+ varinfo *src;
+ varinfo *dst;
+ s4 s1, d;
+
+ /* get required compiler data */
+
+ cd = jd->cd;
+
+ /* get source and destination variables */
+
+ src = VAROP(iptr->s1);
+ dst = VAROP(iptr->dst);
+
+ if ((src->vv.regoff != dst->vv.regoff) ||
+ ((src->flags ^ dst->flags) & INMEMORY)) {
+
+ if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
+ /* emit nothing, as the value won't be used anyway */
+ return;
+ }
+
+ /* If one of the variables resides in memory, we can eliminate
+ the register move from/to the temporary register with the
+ order of getting the destination register and the load. */
+
+ if (IS_INMEMORY(src->flags)) {
+ if (IS_LNG_TYPE(src->type))
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP12_PACKED);
+ else
+ d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
+
+ s1 = emit_load(jd, iptr, src, d);
+ }
+ else {
+ if (IS_LNG_TYPE(src->type))
+ s1 = emit_load(jd, iptr, src, REG_ITMP12_PACKED);
+ else
+ s1 = emit_load(jd, iptr, src, REG_ITMP1);
+
+ d = codegen_reg_of_var(iptr->opc, dst, s1);
+ }
+
+ if (s1 != d) {
+ switch (src->type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_MOV(s1, d);
+ break;
+ case TYPE_LNG:
+ M_LNGMOVE(s1, d);
+ break;
+ case TYPE_FLT:
+ case TYPE_DBL:
+/* M_FMOV(s1, d); */
+ break;
+ default:
+ vm_abort("emit_copy: unknown type %d", src->type);
+ }
+ }
+
+ emit_store(jd, iptr, dst, d);
+ }
}
-/* emit_load_s2_high ***********************************************************
+/* emit_branch *****************************************************************
- Emits a possible load of the high 32-bits of the second long source
- operand.
+ Emits the code for conditional and unconditional branchs.
*******************************************************************************/
-s4 emit_load_s2_high(jitdata *jd, instruction *iptr, stackptr src, s4 tempreg)
+void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 options)
{
- codegendata *cd;
- s4 disp;
- s4 reg;
+ s4 branchdisp;
- assert(src->type == TYPE_LNG);
+ /* ATTENTION: a displacement overflow cannot happen */
- /* get required compiler data */
+ /* check which branch to generate */
- cd = jd->cd;
+ if (condition == BRANCH_UNCONDITIONAL) {
- if (src->flags & INMEMORY) {
- COUNT_SPILLS;
+ /* calculate the different displacements */
- disp = src->regoff * 4;
+ branchdisp = disp - BRANCH_UNCONDITIONAL_SIZE;
- M_ILD(tempreg, REG_SP, disp + 4);
+ M_JMP_IMM(branchdisp);
+ }
+ else {
+ /* calculate the different displacements */
+
+ branchdisp = disp - BRANCH_CONDITIONAL_SIZE;
+
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BEQ(branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BNE(branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BLT(branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BGE(branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BGT(branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BLE(branchdisp);
+ break;
+ case BRANCH_ULT:
+ M_BB(branchdisp);
+ break;
+ case BRANCH_ULE:
+ M_BBE(branchdisp);
+ break;
+ case BRANCH_UGE:
+ M_BAE(branchdisp);
+ break;
+ case BRANCH_UGT:
+ M_BA(branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
+ }
+}
- reg = tempreg;
- } else
- reg = GET_HIGH_REG(src->regoff);
- return reg;
+/* emit_arithmetic_check *******************************************************
+
+ Emit an ArithmeticException check.
+
+*******************************************************************************/
+
+void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TEST(reg);
+ M_BNE(6);
+ M_ALD_MEM(reg, TRAP_ArithmeticException);
+ }
}
-/* emit_store ******************************************************************
+/* emit_arrayindexoutofbounds_check ********************************************
- Emits a possible store of the destination operand.
+ Emit a ArrayIndexOutOfBoundsException check.
*******************************************************************************/
-void emit_store(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
+void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
{
- codegendata *cd;
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_ILD(REG_ITMP3, s1, OFFSET(java_array_t, size));
+ M_CMP(REG_ITMP3, s2);
+ M_BB(6);
+ M_ALD_MEM(s2, TRAP_ArrayIndexOutOfBoundsException);
+ }
+}
- /* get required compiler data */
- cd = jd->cd;
+/* emit_arraystore_check *******************************************************
- if (dst->flags & INMEMORY) {
- COUNT_SPILLS;
+ Emit an ArrayStoreException check.
- if (IS_FLT_DBL_TYPE(dst->type)) {
- if (IS_2_WORD_TYPE(dst->type))
- M_DST(d, REG_SP, dst->regoff * 4);
- else
- M_FST(d, REG_SP, dst->regoff * 4);
+*******************************************************************************/
- } else {
- if (IS_2_WORD_TYPE(dst->type))
- M_LST(d, REG_SP, dst->regoff * 4);
- else
- M_IST(d, REG_SP, dst->regoff * 4);
+void emit_arraystore_check(codegendata *cd, instruction *iptr)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TEST(REG_RESULT);
+ M_BNE(6);
+ M_ALD_MEM(REG_RESULT, TRAP_ArrayStoreException);
+ }
+}
+
+
+/* emit_classcast_check ********************************************************
+
+ Emit a ClassCastException check.
+
+*******************************************************************************/
+
+void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ switch (condition) {
+ case BRANCH_LE:
+ M_BGT(6);
+ break;
+ case BRANCH_EQ:
+ M_BNE(6);
+ break;
+ case BRANCH_ULE:
+ M_BBE(6);
+ break;
+ default:
+ vm_abort("emit_classcast_check: unknown condition %d", condition);
}
+ M_ALD_MEM(s1, TRAP_ClassCastException);
}
}
-/* emit_store_low **************************************************************
+/* emit_nullpointer_check ******************************************************
- Emits a possible store of the low 32-bits of the destination
- operand.
+ Emit a NullPointerException check.
*******************************************************************************/
-void emit_store_low(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
+void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
{
- codegendata *cd;
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TEST(reg);
+ M_BNE(6);
+ M_ALD_MEM(reg, TRAP_NullPointerException);
+ }
+}
- assert(dst->type == TYPE_LNG);
- /* get required compiler data */
+/* emit_exception_check ********************************************************
- cd = jd->cd;
+ Emit an Exception check.
- if (dst->flags & INMEMORY) {
- COUNT_SPILLS;
- M_IST(GET_LOW_REG(d), REG_SP, dst->regoff * 4);
+*******************************************************************************/
+
+void emit_exception_check(codegendata *cd, instruction *iptr)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TEST(REG_RESULT);
+ M_BNE(6);
+ M_ALD_MEM(REG_RESULT, TRAP_CHECK_EXCEPTION);
}
}
-/* emit_store_high *************************************************************
+/* emit_trap_compiler **********************************************************
- Emits a possible store of the high 32-bits of the destination
- operand.
+ Emit a trap instruction which calls the JIT compiler.
+
+*******************************************************************************/
+
+void emit_trap_compiler(codegendata *cd)
+{
+ M_ALD_MEM(REG_METHODPTR, TRAP_COMPILER);
+}
+
+/* emit_trap_countdown *********************************************************
+
+ Emit a countdown trap.
+
+ counter....absolute address of the counter variable
*******************************************************************************/
-void emit_store_high(jitdata *jd, instruction *iptr, stackptr dst, s4 d)
+void emit_trap_countdown(codegendata *cd, s4 *counter)
{
+ M_ISUB_IMM_MEMABS(1, (s4) counter);
+ M_BNS(6);
+ M_ALD_MEM(REG_METHODPTR, TRAP_COUNTDOWN);
+}
+
+/* emit_trap *******************************************************************
+
+ Emit a trap instruction and return the original machine code.
+
+*******************************************************************************/
+
+uint32_t emit_trap(codegendata *cd)
+{
+ uint16_t mcode;
+
+ /* Get machine code which is patched back in later. The
+ trap is 2 bytes long. */
+
+ mcode = *((uint16_t *) cd->mcodeptr);
+
+#if 0
+ /* XXX this breaks GDB, so we disable it for now */
+ *(cd->mcodeptr++) = 0xcc;
+ M_INT3;
+#else
+ M_UD2;
+#endif
+
+ return (uint32_t) mcode;
+}
+
+
+/* emit_verbosecall_enter ******************************************************
+
+ Generates the code for the call trace.
+
+*******************************************************************************/
+
+#if !defined(NDEBUG)
+void emit_verbosecall_enter(jitdata *jd)
+{
+ methodinfo *m;
+ codeinfo *code;
codegendata *cd;
+ registerdata *rd;
+ methoddesc *md;
+ int32_t stackframesize;
+ int i;
+ int align_off; /* offset for alignment compensation */
- assert(dst->type == TYPE_LNG);
+ if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
+ return;
/* get required compiler data */
- cd = jd->cd;
+ m = jd->m;
+ code = jd->code;
+ cd = jd->cd;
+ rd = jd->rd;
- if (dst->flags & INMEMORY) {
- COUNT_SPILLS;
- M_IST(GET_HIGH_REG(d), REG_SP, dst->regoff * 4 + 4);
+ md = m->parseddesc;
+
+ /* mark trace code */
+
+ M_NOP;
+
+ /* keep stack 16-byte aligned */
+
+ stackframesize = 2 + TMP_CNT;
+ ALIGN_2(stackframesize);
+
+ M_ASUB_IMM(stackframesize * 8, REG_SP);
+
+ /* save temporary registers for leaf methods */
+
+ if (code_is_leafmethod(code)) {
+ for (i = 0; i < INT_TMP_CNT; i++)
+ M_IST(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
+ }
+
+ /* no argument registers to save */
+
+ align_off = cd->stackframesize ? 4 : 0;
+ M_AST_IMM(m, REG_SP, 0 * 4);
+ M_AST_IMM(0, REG_SP, 1 * 4);
+ M_AST(REG_SP, REG_SP, 2 * 4);
+ M_IADD_IMM_MEMBASE(stackframesize * 8 + cd->stackframesize * 8 + 4 + align_off, REG_SP, 2 * 4);
+ M_MOV_IMM(trace_java_call_enter, REG_ITMP1);
+ M_CALL(REG_ITMP1);
+
+ /* no argument registers to restore */
+
+ /* restore temporary registers for leaf methods */
+
+ if (code_is_leafmethod(code)) {
+ for (i = 0; i < INT_TMP_CNT; i++)
+ M_ILD(rd->tmpintregs[i], REG_SP, (2 + i) * 8);
}
+
+ M_AADD_IMM(stackframesize * 8, REG_SP);
+
+ /* mark trace code */
+
+ M_NOP;
}
+#endif /* !defined(NDEBUG) */
-/* emit_copy *******************************************************************
+/* emit_verbosecall_exit *******************************************************
- XXX
+ Generates the code for the call trace.
*******************************************************************************/
-void emit_copy(jitdata *jd, instruction *iptr, stackptr src, stackptr dst)
+#if !defined(NDEBUG)
+void emit_verbosecall_exit(jitdata *jd)
{
+ methodinfo *m;
codegendata *cd;
registerdata *rd;
- s4 s1, d;
+ methoddesc *md;
+
+ if (!JITDATA_HAS_FLAG_VERBOSECALL(jd))
+ return;
/* get required compiler data */
+ m = jd->m;
cd = jd->cd;
rd = jd->rd;
- if ((src->regoff != dst->regoff) ||
- ((src->flags ^ dst->flags) & INMEMORY)) {
- if (IS_LNG_TYPE(src->type))
- d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP12_PACKED);
- else
- d = codegen_reg_of_var(rd, iptr->opc, dst, REG_ITMP1);
+ md = m->parseddesc;
- s1 = emit_load_s1(jd, iptr, src, d);
+ /* mark trace code */
- if (s1 != d) {
- if (IS_FLT_DBL_TYPE(src->type)) {
-/* M_FMOV(s1, d); */
- } else {
- if (IS_2_WORD_TYPE(src->type))
- M_LNGMOVE(s1, d);
- else
- M_MOV(s1, d);
- }
- }
+ M_NOP;
- emit_store(jd, iptr, dst, d);
+ /* keep stack 16-byte aligned */
+
+ M_ASUB_IMM(4 + 4 + 8, REG_SP);
+
+ /* save return value */
+
+ switch (md->returntype.type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ M_IST(REG_RESULT, REG_SP, 2 * 4);
+ break;
+ case TYPE_LNG:
+ M_LST(REG_RESULT_PACKED, REG_SP, 2 * 4);
+ break;
+ case TYPE_FLT:
+ M_FSTNP(REG_NULL, REG_SP, 2 * 4);
+ break;
+ case TYPE_DBL:
+ M_DSTNP(REG_NULL, REG_SP, 2 * 4);
+ break;
+ }
+
+ M_AST_IMM(m, REG_SP, 0 * 4);
+ M_AST(REG_SP, REG_SP, 1 * 4);
+ M_IADD_IMM_MEMBASE(2 * 4, REG_SP, 1 * 4);
+ M_MOV_IMM(trace_java_call_exit, REG_ITMP1);
+ M_CALL(REG_ITMP1);
+
+ /* restore return value */
+
+ switch (md->returntype.type) {
+ case TYPE_ADR:
+ case TYPE_INT:
+ M_ILD(REG_RESULT, REG_SP, 2 * 4);
+ break;
+ case TYPE_LNG:
+ M_LLD(REG_RESULT_PACKED, REG_SP, 2 * 4);
+ break;
}
+
+ M_AADD_IMM(4 + 4 + 8, REG_SP);
+
+ /* mark trace code */
+
+ M_NOP;
}
+#endif /* !defined(NDEBUG) */
/* code generation functions **************************************************/
}
+void emit_movsbl_reg_reg(codegendata *cd, s4 a, s4 b)
+{
+ assert(a < 4); /* Can only operate on al, bl, cl, dl. */
+ *(cd->mcodeptr++) = 0x0f;
+ *(cd->mcodeptr++) = 0xbe;
+ emit_reg((b),(a));
+}
+
+
void emit_movsbl_memindex_reg(codegendata *cd, s4 disp, s4 basereg, s4 indexreg, s4 scale, s4 reg)
{
COUNT(count_mov_mem_reg);
}
+void emit_movzbl_reg_reg(codegendata *cd, s4 a, s4 b)
+{
+ assert(a < 4); /* Can only operate on al, bl, cl, dl. */
+ *(cd->mcodeptr++) = 0x0f;
+ *(cd->mcodeptr++) = 0xb6;
+ emit_reg((b),(a));
+}
+
+
void emit_movzwl_reg_reg(codegendata *cd, s4 a, s4 b)
{
*(cd->mcodeptr++) = 0x0f;
}
+void emit_alu_imm_memabs(codegendata *cd, s4 opc, s4 imm, s4 disp)
+{
+ if (IS_IMM8(imm)) {
+ *(cd->mcodeptr++) = 0x83;
+ emit_mem(opc, disp);
+ emit_imm8((imm));
+ } else {
+ *(cd->mcodeptr++) = 0x81;
+ emit_mem(opc, disp);
+ emit_imm32((imm));
+ }
+}
+
+
void emit_test_reg_reg(codegendata *cd, s4 reg, s4 dreg)
{
*(cd->mcodeptr++) = 0x85;
}
-void emit_cltd(codegendata *cd)
-{
- *(cd->mcodeptr++) = 0x99;
-}
-
-
void emit_imul_reg_reg(codegendata *cd, s4 reg, s4 dreg)
{
*(cd->mcodeptr++) = 0x0f;
}
-void emit_ret(codegendata *cd)
-{
- *(cd->mcodeptr++) = 0xc3;
-}
-
-
/*
* shift ops
}
-void emit_nop(codegendata *cd)
-{
- *(cd->mcodeptr++) = 0x90;
-}
-
-
void emit_lock(codegendata *cd)
{
*(cd->mcodeptr++) = 0xf0;
*(cd->mcodeptr++) = 0xf7;
}
+#if defined(ENABLE_ESCAPE_CHECK)
+void emit_escape_check(codegendata *cd, s4 reg) {
+ M_PUSH(reg);
+ M_MOV_IMM(asm_escape_check, REG_ITMP3);
+ M_CALL(REG_ITMP3);
+ M_IADD_IMM(4, REG_SP);
+}
+#endif
/*
* These are local overrides for various environment variables in Emacs.