/* src/vm/jit/i386/codegen.h - code generation macros and definitions for i386
- Copyright (C) 1996-2005, 2006, 2007 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: codegen.h 7571 2007-03-24 22:37:09Z twisti $
-
*/
#include "vm/jit/i386/emit.h"
-#include "vm/jit/jit.h"
+#include "vm/jit/jit.hpp"
#if defined(ENABLE_LSRA)
} while (0)
-/* M_INTMOVE:
- generates an integer-move from register a to b.
- if a and b are the same int-register, no code will be generated.
-*/
-
-#define M_INTMOVE(a,b) \
- do { \
- if ((a) != (b)) \
- M_MOV(a, b); \
- } while (0)
-
-#define M_LNGMOVE(a,b) \
- do { \
- if (GET_HIGH_REG(a) == GET_LOW_REG(b)) { \
- assert((GET_LOW_REG(a) != GET_HIGH_REG(b))); \
- M_INTMOVE(GET_HIGH_REG(a), GET_HIGH_REG(b)); \
- M_INTMOVE(GET_LOW_REG(a), GET_LOW_REG(b)); \
- } else { \
- M_INTMOVE(GET_LOW_REG(a), GET_LOW_REG(b)); \
- M_INTMOVE(GET_HIGH_REG(a), GET_HIGH_REG(b)); \
- } \
- } while (0)
-
-
-/* M_FLTMOVE:
- generates a floating-point-move from register a to b.
- if a and b are the same float-register, no code will be generated
-*/
-
-#define M_FLTMOVE(reg,dreg) \
+#define M_FMOV(reg,dreg) \
do { \
- if ((reg) != (dreg)) { \
- log_text("M_FLTMOVE"); \
- assert(0); \
- } \
+ log_text("M_FMOV"); \
+ assert(0); \
} while (0)
+#define M_DMOV(a,b) M_FMOV(a,b)
#define ICONST(d,c) \
do { \
/* patcher defines ************************************************************/
-#define PATCHER_CALL_SIZE 5 /* size in bytes of a patcher call */
+#define PATCHER_CALL_SIZE 2 /* size in bytes of a patcher call */
#define PATCHER_NOPS \
do { \
- M_NOP; \
- M_NOP; \
- M_NOP; \
- M_NOP; \
- M_NOP; \
+ M_NOP; \
+ M_NOP; \
} while (0)
/* macros to create code ******************************************************/
+#define M_BYTE1(a) \
+ do { \
+ *(cd->mcodeptr) = (a); \
+ cd->mcodeptr++; \
+ } while (0)
+
+
+#define M_BYTE2(a, b) \
+ do { \
+ M_BYTE1(a); \
+ M_BYTE1(b); \
+ } while (0)
+
+
#define M_ILD(a,b,disp) emit_mov_membase_reg(cd, (b), (disp), (a))
#define M_ILD32(a,b,disp) emit_mov_membase32_reg(cd, (b), (disp), (a))
#define M_ISUB_IMM_MEMABS(a,b) emit_alu_imm_memabs(cd, ALU_SUB, (a), (b))
+#define M_IINC(a) emit_inc_reg(cd, (a))
+
#define M_IADDC(a,b) emit_alu_reg_reg(cd, ALU_ADC, (a), (b))
#define M_ISUBB(a,b) emit_alu_reg_reg(cd, ALU_SBB, (a), (b))
#define M_MOV(a,b) emit_mov_reg_reg(cd, (a), (b))
#define M_MOV_IMM(a,b) emit_mov_imm_reg(cd, (u4) (a), (b))
+#define M_MOV_IMM2(a,b) emit_mov_imm2_reg(cd, (u4) (a), (b))
#define M_TEST(a) emit_test_reg_reg(cd, (a), (a))
#define M_TEST_IMM(a,b) emit_test_imm_reg(cd, (a), (b))
#define M_CMP(a,b) emit_alu_reg_reg(cd, ALU_CMP, (a), (b))
#define M_CMP_MEMBASE(a,b,c) emit_alu_membase_reg(cd, ALU_CMP, (a), (b), (c))
+#define M_CMP_MEMINDEX(a,b,c,d,e) emit_alu_memindex_reg(cd, ALU_CMP, (b), (a), (c), (d), (e))
#define M_CMP_IMM(a,b) emit_alu_imm_reg(cd, ALU_CMP, (a), (b))
#define M_CMP_IMM_MEMBASE(a,b,c) emit_alu_imm_membase(cd, ALU_CMP, (a), (b), (c))
#define M_CMP_IMM32(a,b) emit_alu_imm32_reg(cd, ALU_CMP, (a), (b))
-#define M_BSEXT(a,b) /* XXX does not work, because of nibbles */
+#define M_BSEXT(a,b) emit_movsbl_reg_reg(cd, (a), (b))
#define M_SSEXT(a,b) emit_movswl_reg_reg(cd, (a), (b))
+#define M_BZEXT(a,b) emit_movzbl_reg_reg(cd, (a), (b))
#define M_CZEXT(a,b) emit_movzwl_reg_reg(cd, (a), (b))
-#define M_CLTD emit_cltd(cd)
+#define M_CLTD M_BYTE1(0x99)
#define M_SLL(a) emit_shift_reg(cd, SHIFT_SHL, (a))
#define M_SRA(a) emit_shift_reg(cd, SHIFT_SAR, (a))
#define M_CALL(a) emit_call_reg(cd, (a))
#define M_CALL_IMM(a) emit_call_imm(cd, (a))
-#define M_RET emit_ret(cd)
+#define M_RET M_BYTE1(0xc3)
+
+#define M_ACMP(a,b) M_CMP(a,b)
+
+#define M_ICMP(a,b) M_CMP(a,b)
+#define M_ICMP_IMM(a,b) emit_alu_imm_reg(cd, ALU_CMP, (a), (b))
#define M_BEQ(a) emit_jcc(cd, CC_E, (a))
#define M_BNE(a) emit_jcc(cd, CC_NE, (a))
#define M_BNS(a) emit_jcc(cd, CC_NS, (a))
#define M_BS(a) emit_jcc(cd, CC_S, (a))
+#define M_SETE(a) emit_setcc_reg(cd, CC_E, (a))
+
#define M_JMP(a) emit_jmp_reg(cd, (a))
#define M_JMP_IMM(a) emit_jmp_imm(cd, (a))
-#define M_NOP emit_nop(cd)
+#define M_NOP M_BYTE1(0x90)
+#define M_UD2 M_BYTE2(0x0f, 0x0b)
#define M_FLD(a,b,disp) emit_flds_membase(cd, (b), (disp))