Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- $Id: emit.c 4398 2006-01-31 23:43:08Z twisti $
-
*/
#include "config.h"
#include <assert.h>
+#include <stdint.h>
#include "vm/types.h"
#include "mm/memory.h"
-#if defined(ENABLE_THREADS)
-# include "threads/native/lock.h"
-#endif
+#include "threads/lock-common.h"
#include "vm/builtin.h"
+#include "vm/exceptions.h"
#include "vm/global.h"
+#include "vm/jit/abi.h"
#include "vm/jit/asmpart.h"
#include "vm/jit/emit-common.h"
#include "vm/jit/jit.h"
+#include "vm/jit/patcher-common.h"
#include "vm/jit/replace.h"
#include "toolbox/logging.h" /* XXX for debugging only */
if (src->flags & INMEMORY) {
COUNT_SPILLS;
- disp = src->vv.regoff * 4;
+ disp = src->vv.regoff;
- if (IS_FLT_DBL_TYPE(src->type)) {
#if defined(ENABLE_SOFTFLOAT)
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
-#else
- if (IS_2_WORD_TYPE(src->type))
- M_DLD(tempreg, REG_SP, disp);
- else
- M_FLD(tempreg, REG_SP, disp);
-#endif
+ switch (src->type) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ case TYPE_ADR:
+ M_ILD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_LNG:
+ case TYPE_DBL:
+ M_LLD(tempreg, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_load: unknown type %d", src->type);
}
- else {
- if (IS_2_WORD_TYPE(src->type))
- M_LLD(tempreg, REG_SP, disp);
- else
- M_ILD(tempreg, REG_SP, disp);
+#else
+ switch (src->type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_ILD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_LNG:
+ M_LLD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_FLT:
+ M_FLD(tempreg, REG_SP, disp);
+ break;
+ case TYPE_DBL:
+ M_DLD(tempreg, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_load: unknown type %d", src->type);
}
+#endif
reg = tempreg;
}
if (src->flags & INMEMORY) {
COUNT_SPILLS;
- disp = src->vv.regoff * 4;
+ disp = src->vv.regoff;
#if defined(__ARMEL__)
M_ILD(tempreg, REG_SP, disp);
if (src->flags & INMEMORY) {
COUNT_SPILLS;
- disp = src->vv.regoff * 4;
+ disp = src->vv.regoff;
#if defined(__ARMEL__)
M_ILD(tempreg, REG_SP, disp + 4);
if (dst->flags & INMEMORY) {
COUNT_SPILLS;
- disp = dst->vv.regoff * 4;
+ disp = dst->vv.regoff;
- if (IS_FLT_DBL_TYPE(dst->type)) {
#if defined(ENABLE_SOFTFLOAT)
- if (IS_2_WORD_TYPE(dst->type))
- M_LST(d, REG_SP, disp);
- else
- M_IST(d, REG_SP, disp);
-#else
- if (IS_2_WORD_TYPE(dst->type))
- M_DST(d, REG_SP, disp);
- else
- M_FST(d, REG_SP, disp);
-#endif
- }
- else {
- if (IS_2_WORD_TYPE(dst->type))
- M_LST(d, REG_SP, disp);
- else
- M_IST(d, REG_SP, disp);
+ switch (dst->type) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ case TYPE_ADR:
+ M_IST(d, REG_SP, disp);
+ break;
+ case TYPE_LNG:
+ case TYPE_DBL:
+ M_LST(d, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_store: unknown type %d", dst->type);
}
- }
- else if (IS_LNG_TYPE(dst->type)) {
-#if defined(__ARMEL__)
- if (GET_HIGH_REG(dst->vv.regoff) == REG_SPLIT)
- M_IST_INTERN(GET_HIGH_REG(d), REG_SP, 0 * 4);
#else
- if (GET_LOW_REG(dst->vv.regoff) == REG_SPLIT)
- M_IST_INTERN(GET_LOW_REG(d), REG_SP, 0 * 4);
+ switch (dst->type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ M_IST(d, REG_SP, disp);
+ break;
+ case TYPE_LNG:
+ M_LST(d, REG_SP, disp);
+ break;
+ case TYPE_FLT:
+ M_FST(d, REG_SP, disp);
+ break;
+ case TYPE_DBL:
+ M_DST(d, REG_SP, disp);
+ break;
+ default:
+ vm_abort("emit_store: unknown type %d", dst->type);
+ }
#endif
}
}
/* emit_copy *******************************************************************
- XXX
+ Generates a register/memory to register/memory copy.
*******************************************************************************/
-void emit_copy(jitdata *jd, instruction *iptr, varinfo *src, varinfo *dst)
+void emit_copy(jitdata *jd, instruction *iptr)
{
- codegendata *cd;
- registerdata *rd;
- s4 s1, d;
+ codegendata *cd;
+ varinfo *src;
+ varinfo *dst;
+ s4 s1, d;
/* get required compiler data */
cd = jd->cd;
- rd = jd->rd;
+
+ /* get source and destination variables */
+
+ src = VAROP(iptr->s1);
+ dst = VAROP(iptr->dst);
/* XXX dummy call, removed me!!! */
d = codegen_reg_of_var(iptr->opc, dst, REG_ITMP1);
if ((src->vv.regoff != dst->vv.regoff) ||
((src->flags ^ dst->flags) & INMEMORY)) {
+ if ((src->type == TYPE_RET) || (dst->type == TYPE_RET)) {
+ /* emit nothing, as the value won't be used anyway */
+ return;
+ }
+
/* If one of the variables resides in memory, we can eliminate
the register move from/to the temporary register with the
order of getting the destination register and the load. */
}
if (s1 != d) {
- if (IS_FLT_DBL_TYPE(src->type)) {
#if defined(ENABLE_SOFTFLOAT)
- if (IS_2_WORD_TYPE(src->type))
- M_LNGMOVE(s1, d);
- else
- /* XXX grrrr, wrong direction! */
- M_MOV(d, s1);
-#else
- if (IS_2_WORD_TYPE(src->type))
- M_DMOV(s1, d);
- else
- M_FMOV(s1, d);
-#endif
+ switch (src->type) {
+ case TYPE_INT:
+ case TYPE_FLT:
+ case TYPE_ADR:
+ /* XXX grrrr, wrong direction! */
+ M_MOV(d, s1);
+ break;
+ case TYPE_LNG:
+ case TYPE_DBL:
+ /* XXX grrrr, wrong direction! */
+ M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
+ M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
+ break;
+ default:
+ vm_abort("emit_copy: unknown type %d", src->type);
}
- else {
- if (IS_2_WORD_TYPE(src->type))
- M_LNGMOVE(s1, d);
- else
- /* XXX grrrr, wrong direction! */
- M_MOV(d, s1);
+#else
+ switch (src->type) {
+ case TYPE_INT:
+ case TYPE_ADR:
+ /* XXX grrrr, wrong direction! */
+ M_MOV(d, s1);
+ break;
+ case TYPE_LNG:
+ /* XXX grrrr, wrong direction! */
+ M_MOV(GET_LOW_REG(d), GET_LOW_REG(s1));
+ M_MOV(GET_HIGH_REG(d), GET_HIGH_REG(s1));
+ break;
+ case TYPE_FLT:
+ M_FMOV(s1, d);
+ break;
+ case TYPE_DBL:
+ M_DMOV(s1, d);
+ break;
+ default:
+ vm_abort("emit_copy: unknown type %d", src->type);
}
+#endif
}
emit_store(jd, iptr, dst, d);
}
-/* emit_nullpointer_check ******************************************************
-
- Emit a NullPointerException check.
-
-*******************************************************************************/
-
-void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
-{
- if (INSTRUCTION_MUST_CHECK(iptr)) {
- M_TST(reg, reg);
- M_BEQ(0);
- codegen_add_nullpointerexception_ref(cd);
- }
-}
-
-
-/* emit_arrayindexoutofbounds_check ********************************************
+/* emit_branch *****************************************************************
- Emit a ArrayIndexOutOfBoundsException check.
+ Emits the code for conditional and unconditional branchs.
*******************************************************************************/
-void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
+void emit_branch(codegendata *cd, s4 disp, s4 condition, s4 reg, u4 opt)
{
- if (INSTRUCTION_MUST_CHECK(iptr)) {
- M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_arrayheader, size));
- M_CMP(s2, REG_ITMP3);
- M_BHS(0);
- codegen_add_arrayindexoutofboundsexception_ref(cd, s2);
- }
-}
+ s4 checkdisp;
+ s4 branchdisp;
+ /* calculate the different displacements */
-/* emit_exception_stubs ********************************************************
+ checkdisp = (disp - 8);
+ branchdisp = (disp - 8) >> 2;
- Generates the code for the exception stubs.
+ /* check which branch to generate */
-*******************************************************************************/
+ if (condition == BRANCH_UNCONDITIONAL) {
+ /* check displacement for overflow */
-void emit_exception_stubs(jitdata *jd)
-{
- codegendata *cd;
- registerdata *rd;
- exceptionref *er;
- s4 branchmpc;
- s4 targetmpc;
- s4 targetdisp;
- s4 disp;
-
- /* get required compiler data */
-
- cd = jd->cd;
- rd = jd->rd;
-
- /* generate exception stubs */
-
- targetdisp = 0;
-
- for (er = cd->exceptionrefs; er != NULL; er = er->next) {
- /* back-patch the branch to this exception code */
-
- branchmpc = er->branchpos;
- targetmpc = cd->mcodeptr - cd->mcodebase;
-
- md_codegen_patch_branch(cd, branchmpc, targetmpc);
+ if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
+ /* if the long-branches flag isn't set yet, do it */
- MCODECHECK(100);
-
- /* Check if the exception is an
- ArrayIndexOutOfBoundsException. If so, move index register
- into REG_ITMP1. */
-
- if (er->reg != -1)
- M_MOV(REG_ITMP1, er->reg);
-
- /* calcuate exception address */
-
- assert((er->branchpos - 4) % 4 == 0);
- M_ADD_IMM_EXT_MUL4(REG_ITMP2_XPC, REG_PV, (er->branchpos - 4) / 4);
-
- /* move function to call into REG_ITMP3 */
-
- disp = dseg_add_functionptr(cd, er->function);
- M_DSEG_LOAD(REG_ITMP3, disp);
-
- if (targetdisp == 0) {
- targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
-
- M_MOV(rd->argintregs[0], REG_PV);
- M_MOV(rd->argintregs[1], REG_SP);
-
- if (jd->isleafmethod)
- M_MOV(rd->argintregs[2], REG_LR);
- else
- M_LDR(rd->argintregs[2], REG_SP,
- cd->stackframesize * 4 - SIZEOF_VOID_P);
-
- M_MOV(rd->argintregs[3], REG_ITMP2_XPC);
-
- /* save registers */
- /* TODO: we only need to save LR in leaf methods */
-
- M_STMFD(BITMASK_ARGS | 1<<REG_PV | 1<<REG_LR, REG_SP);
-
- /* move a3 to stack */
-
- M_STR_UPDATE(REG_ITMP1, REG_SP, -4);
-
- /* do the exception call */
-
- M_MOV(REG_LR, REG_PC);
- M_MOV(REG_PC, REG_ITMP3);
-
- M_ADD_IMM(REG_SP, REG_SP, 4);
-
- /* result of stacktrace is our XPTR */
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
- M_MOV(REG_ITMP1_XPTR, REG_RESULT);
+ vm_abort("emit_branch: emit unconditional long-branch code");
+ }
+ else {
+ M_B(branchdisp);
+ }
+ }
+ else {
+ /* and displacement for overflow */
- /* restore registers */
+ if ((checkdisp < (s4) 0xff000000) || (checkdisp > (s4) 0x00ffffff)) {
+ /* if the long-branches flag isn't set yet, do it */
- M_LDMFD(BITMASK_ARGS | 1<<REG_PV | 1<<REG_LR, REG_SP);
+ if (!CODEGENDATA_HAS_FLAG_LONGBRANCHES(cd)) {
+ cd->flags |= (CODEGENDATA_FLAG_ERROR |
+ CODEGENDATA_FLAG_LONGBRANCHES);
+ }
- disp = dseg_add_functionptr(cd, asm_handle_exception);
- M_DSEG_LOAD(REG_ITMP3, disp);
- M_MOV(REG_PC, REG_ITMP3);
+ vm_abort("emit_branch: emit conditional long-branch code");
}
else {
- disp = (((u4 *) cd->mcodebase) + targetdisp) -
- (((u4 *) cd->mcodeptr) + 2);
-
- M_B(disp);
+ switch (condition) {
+ case BRANCH_EQ:
+ M_BEQ(branchdisp);
+ break;
+ case BRANCH_NE:
+ M_BNE(branchdisp);
+ break;
+ case BRANCH_LT:
+ M_BLT(branchdisp);
+ break;
+ case BRANCH_GE:
+ M_BGE(branchdisp);
+ break;
+ case BRANCH_GT:
+ M_BGT(branchdisp);
+ break;
+ case BRANCH_LE:
+ M_BLE(branchdisp);
+ break;
+ case BRANCH_UGT:
+ M_BHI(branchdisp);
+ break;
+ default:
+ vm_abort("emit_branch: unknown condition %d", condition);
+ }
}
}
}
-/* emit_patcher_stubs **********************************************************
+/* emit_arithmetic_check *******************************************************
- Generates the code for the patcher stubs.
+ Emit an ArithmeticException check.
*******************************************************************************/
-void emit_patcher_stubs(jitdata *jd)
+void emit_arithmetic_check(codegendata *cd, instruction *iptr, s4 reg)
{
- codegendata *cd;
- patchref *pref;
- u4 mcode;
- u1 *savedmcodeptr;
- u1 *tmpmcodeptr;
- s4 targetdisp;
- s4 disp;
-
- /* get required compiler data */
-
- cd = jd->cd;
-
- /* generate patcher stub call code */
-
- targetdisp = 0;
-
- for (pref = cd->patchrefs; pref != NULL; pref = pref->next) {
- /* check code segment size */
-
- MCODECHECK(100);
-
- /* Get machine code which is patched back in later. The
- call is 1 instruction word long. */
-
- tmpmcodeptr = (u1 *) (cd->mcodebase + pref->branchpos);
-
- mcode = *((u4 *) tmpmcodeptr);
-
- /* Patch in the call to call the following code (done at
- compile time). */
-
- savedmcodeptr = cd->mcodeptr; /* save current mcodeptr */
- cd->mcodeptr = tmpmcodeptr; /* set mcodeptr to patch position */
-
- disp = ((u4 *) savedmcodeptr) - (((u4 *) tmpmcodeptr) + 2);
- M_B(disp);
-
- cd->mcodeptr = savedmcodeptr; /* restore the current mcodeptr */
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ CHECK_INT_REG(reg);
+ M_TEQ_IMM(reg, 0);
+ M_TRAPEQ(0, EXCEPTION_HARDWARE_ARITHMETIC);
+ }
+}
- /* create stack frame (align stack to 8-byte) */
- M_SUB_IMM(REG_SP, REG_SP, 8 * 4);
+/* emit_nullpointer_check ******************************************************
- /* save itmp3 onto stack */
+ Emit a NullPointerException check.
- M_STR_INTERN(REG_ITMP3, REG_SP, 6 * 4);
+*******************************************************************************/
- /* calculate return address and move it onto stack */
- /* ATTENTION: we can not use BL to branch to patcher stub, */
- /* ATTENTION: because we need to preserve LR for leaf methods */
+void emit_nullpointer_check(codegendata *cd, instruction *iptr, s4 reg)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TST(reg, reg);
+ M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
+ }
+}
- disp = (s4) (((u4 *) cd->mcodeptr) - (((u4 *) tmpmcodeptr) + 1) + 2);
+void emit_nullpointer_check_force(codegendata *cd, instruction *iptr, s4 reg)
+{
+ M_TST(reg, reg);
+ M_TRAPEQ(0, EXCEPTION_HARDWARE_NULLPOINTER);
+}
- M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PC, disp);
- M_STR_INTERN(REG_ITMP3, REG_SP, 4 * 4);
- /* move pointer to java_objectheader onto stack */
+/* emit_arrayindexoutofbounds_check ********************************************
-#if defined(ENABLE_THREADS)
- /* order reversed because of data segment layout */
+ Emit a ArrayIndexOutOfBoundsException check.
- (void) dseg_add_unique_address(cd, NULL); /* flcword */
- (void) dseg_add_unique_address(cd, lock_get_initial_lock_word());
- disp = dseg_add_unique_address(cd, NULL); /* vftbl */
+*******************************************************************************/
- M_SUB_IMM_EXT_MUL4(REG_ITMP3, REG_PV, -disp / 4);
- M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
-#else
- M_EOR(REG_ITMP3, REG_ITMP3, REG_ITMP3);
- M_STR_INTERN(REG_ITMP3, REG_SP, 3 * 4);
-#endif
+void emit_arrayindexoutofbounds_check(codegendata *cd, instruction *iptr, s4 s1, s4 s2)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_ILD_INTERN(REG_ITMP3, s1, OFFSET(java_array_t, size));
+ M_CMP(s2, REG_ITMP3);
+ M_TRAPHS(s2, EXCEPTION_HARDWARE_ARRAYINDEXOUTOFBOUNDS);
+ }
+}
- /* move machine code onto stack */
- disp = dseg_add_unique_s4(cd, mcode);
- M_DSEG_LOAD(REG_ITMP3, disp);
- M_STR_INTERN(REG_ITMP3, REG_SP, 2 * 4);
+/* emit_classcast_check ********************************************************
- /* move class/method/field reference onto stack */
+ Emit a ClassCastException check.
- disp = dseg_add_unique_address(cd, pref->ref);
- M_DSEG_LOAD(REG_ITMP3, disp);
- M_STR_INTERN(REG_ITMP3, REG_SP, 1 * 4);
+*******************************************************************************/
- /* move data segment displacement onto stack */
+void emit_classcast_check(codegendata *cd, instruction *iptr, s4 condition, s4 reg, s4 s1)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ switch (condition) {
+ case BRANCH_EQ:
+ M_TRAPEQ(s1, EXCEPTION_HARDWARE_CLASSCAST);
+ break;
- disp = dseg_add_unique_s4(cd, pref->disp);
- M_DSEG_LOAD(REG_ITMP3, disp);
- M_STR_INTERN(REG_ITMP3, REG_SP, 5 * 4);
+ case BRANCH_LE:
+ M_TRAPLE(s1, EXCEPTION_HARDWARE_CLASSCAST);
+ break;
- /* move patcher function pointer onto stack */
+ case BRANCH_UGT:
+ M_TRAPHI(s1, EXCEPTION_HARDWARE_CLASSCAST);
+ break;
- disp = dseg_add_functionptr(cd, pref->patcher);
- M_DSEG_LOAD(REG_ITMP3, disp);
- M_STR_INTERN(REG_ITMP3, REG_SP, 0 * 4);
+ default:
+ vm_abort("emit_classcast_check: unknown condition %d", condition);
+ }
+ }
+}
- /* finally call the patcher via asm_patcher_wrapper */
- /* ATTENTION: don't use REG_PV here, because some patchers need it */
+/* emit_exception_check ********************************************************
- if (targetdisp == 0) {
- targetdisp = ((u4 *) cd->mcodeptr) - ((u4 *) cd->mcodebase);
+ Emit an Exception check.
- disp = dseg_add_functionptr(cd, asm_patcher_wrapper);
- /*M_DSEG_BRANCH_NOLINK(REG_PC, REG_PV, a);*/
- /* TODO: this is only a hack */
- M_DSEG_LOAD(REG_ITMP3, disp);
- M_MOV(REG_PC, REG_ITMP3);
- }
- else {
- disp = (((u4 *) cd->mcodebase) + targetdisp) -
- (((u4 *) cd->mcodeptr) + 2);
+*******************************************************************************/
- M_B(disp);
- }
+void emit_exception_check(codegendata *cd, instruction *iptr)
+{
+ if (INSTRUCTION_MUST_CHECK(iptr)) {
+ M_TST(REG_RESULT, REG_RESULT);
+ M_TRAPEQ(0, EXCEPTION_HARDWARE_EXCEPTION);
}
}
-/* emit_replacement_stubs ******************************************************
+/* emit_trap *******************************************************************
- Generates the code for the replacement stubs.
+ Emit a trap instruction and return the original machine code.
*******************************************************************************/
-#if defined(ENABLE_REPLACEMENT)
-void emit_replacement_stubs(jitdata *jd)
+uint32_t emit_trap(codegendata *cd)
{
- codegendata *cd;
- codeinfo *code;
- rplpoint *rplp;
- u1 *savedmcodeptr;
- s4 disp;
- s4 i;
+ uint32_t mcode;
- /* get required compiler data */
+ /* Get machine code which is patched back in later. The
+ trap is 1 instruction word long. */
+
+ mcode = *((u4 *) cd->mcodeptr);
+
+ M_TRAP(0, EXCEPTION_HARDWARE_PATCHER);
- cd = jd->cd;
- code = jd->code;
+ return mcode;
}
-#endif /* defined(ENABLE_REPLACEMENT) */
/* emit_verbosecall_enter ******************************************************
M_NOP;
- /* save argument registers to stack (including LR and PV) */
+ /* Save argument registers to stack (including LR and PV). Keep
+ stack 8-byte aligned. */
+
M_STMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
- M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4); /* space for a3, a4 and m */
+ M_SUB_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* space for a3, a4 and m */
- stackframesize += 6 + 2 + 2 + 1;
+ stackframesize += (6 + 2 + 2 + 1 + 1) * 4;
/* prepare args for tracer */
M_MOV_IMM(REG_ITMP1, 0);
s1 = PACK_REGS(s1, REG_ITMP1);
}
- else {
- SPLIT_OPEN(t, s1, REG_ITMP1);
- SPLIT_LOAD(t, s1, stackframesize);
- }
}
else {
- s1 = md->params[i].regoff + stackframesize;
+ s1 = REG_ITMP12_PACKED;
+ s2 = md->params[i].regoff + stackframesize;
if (IS_2_WORD_TYPE(t))
- M_LLD(REG_ITMP12_PACKED, REG_SP, s1 * 4);
- else
- M_ILD(REG_ITMP1, REG_SP, s1 * 4);
+ M_LLD(s1, REG_SP, s2);
+ else {
+ M_ILD(GET_LOW_REG(s1), REG_SP, s2);
+ M_MOV_IMM(GET_HIGH_REG(s1), 0);
+ }
}
/* place argument for tracer */
if (i < 2) {
#if defined(__ARMEL__)
- s2 = PACK_REGS(rd->argintregs[i * 2], rd->argintregs[i * 2 + 1]);
+ s2 = PACK_REGS(abi_registers_integer_argument[i * 2],
+ abi_registers_integer_argument[i * 2 + 1]);
#else /* defined(__ARMEB__) */
- s2 = PACK_REGS(rd->argintregs[i * 2 + 1], rd->argintregs[i * 2]);
+ s2 = PACK_REGS(abi_registers_integer_argument[i * 2 + 1],
+ abi_registers_integer_argument[i * 2]);
#endif
M_LNGMOVE(s1, s2);
}
/* call tracer here (we use a long branch) */
- M_LONGBRANCH(builtin_trace_args);
+ M_LONGBRANCH(builtin_verbosecall_enter);
- /* restore argument registers from stack */
+ /* Restore argument registers from stack. Keep stack 8-byte
+ aligned. */
- M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1) * 4); /* free argument stack */
+ M_ADD_IMM(REG_SP, REG_SP, (2 + 2 + 1 + 1) * 4); /* free argument stack */
M_LDMFD(BITMASK_ARGS | (1<<REG_LR) | (1<<REG_PV), REG_SP);
/* mark trace code */
Generates the code for the call trace.
+ void builtin_verbosecall_exit(s8 l, double d, float f, methodinfo *m);
+
*******************************************************************************/
#if !defined(NDEBUG)
M_NOP;
+ /* Keep stack 8-byte aligned. */
+
M_STMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
- M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for d[high reg] and f */
+ M_SUB_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* space for f and m */
switch (md->returntype.type) {
case TYPE_ADR:
case TYPE_INT:
- M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A1_A2_PACKED));
- M_MOV_IMM(GET_HIGH_REG(REG_A1_A2_PACKED), 0);
+ M_INTMOVE(REG_RESULT, GET_LOW_REG(REG_A0_A1_PACKED));
+ M_MOV_IMM(GET_HIGH_REG(REG_A0_A1_PACKED), 0);
break;
case TYPE_LNG:
- M_LNGMOVE(REG_RESULT_PACKED, REG_A1_A2_PACKED);
+ M_LNGMOVE(REG_RESULT_PACKED, REG_A0_A1_PACKED);
break;
case TYPE_FLT:
- M_IST(REG_RESULT, REG_SP, 1 * 4);
+ M_IST(REG_RESULT, REG_SP, 0 * 4);
break;
case TYPE_DBL:
- M_INTMOVE(REG_RESULT, REG_A3);
- M_IST(REG_RESULT2, REG_SP, 0 * 4);
+ M_LNGMOVE(REG_RESULT_PACKED, REG_A2_A3_PACKED);
break;
}
disp = dseg_add_address(cd, m);
- M_DSEG_LOAD(REG_A0, disp);
- M_LONGBRANCH(builtin_displaymethodstop);
+ M_DSEG_LOAD(REG_ITMP1, disp);
+ M_AST(REG_ITMP1, REG_SP, 1 * 4);
+ M_LONGBRANCH(builtin_verbosecall_exit);
+
+ /* Keep stack 8-byte aligned. */
M_ADD_IMM(REG_SP, REG_SP, (1 + 1) * 4); /* free argument stack */
M_LDMFD(BITMASK_RESULT | (1<<REG_LR) | (1<<REG_PV), REG_SP);
projects / cacao.git / blobdiff