/* src/vm/jit/alpha/md.c - machine dependent Alpha functions
- Copyright (C) 1996-2005 R. Grafl, A. Krall, C. Kruegel, C. Oates,
- R. Obermaisser, M. Platter, M. Probst, S. Ring, E. Steiner,
- C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich, J. Wenninger,
- Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
+ Copyright (C) 2009 Theobroma Systems Ltd.
This file is part of CACAO.
You should have received a copy of the GNU General Public License
along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
- 02111-1307, USA.
+ Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
+ 02110-1301, USA.
- Contact: cacao@complang.tuwien.ac.at
+*/
- Authors: Andreas Krall
- Reinhard Grafl
- Changes: Joseph Wenninger
- Christian Thalinger
+#include "config.h"
- $Id: md.c 2987 2005-07-11 19:01:39Z twisti $
+#include <stdint.h>
+#include <ucontext.h>
-*/
+#if defined(__LINUX__)
+# include <asm/fpu.h>
+extern unsigned long ieee_get_fp_control();
+extern void ieee_set_fp_control(unsigned long fp_control);
+#endif
-#include <assert.h>
-#include <ucontext.h>
+#include "vm/jit/alpha/codegen.h"
+#include "vm/jit/alpha/md.h"
-#include "config.h"
+#include "vm/jit/asmpart.h"
+#include "vm/jit/jit.hpp"
+#include "vm/jit/trap.hpp"
-#include "vm/jit/alpha/asmoffsets.h"
-#include "vm/jit/alpha/md-abi.h"
-#include "vm/jit/alpha/types.h"
-#include "vm/exceptions.h"
-#include "vm/stringlocal.h"
-#include "vm/jit/asmpart.h"
+/* global variables ***********************************************************/
+
+bool has_ext_instr_set = false; /* has instruction set extensions */
/* md_init *********************************************************************
void md_init(void)
{
-#if 0
- /* XXX TWISTI: do we really need this? fptest's seem to work fine */
-
#if defined(__LINUX__)
-/* Linux on Digital Alpha needs an initialisation of the ieee floating point
- control for IEEE compliant arithmetic (option -mieee of GCC). Under
- Digital Unix this is done automatically.
-*/
+ unsigned long int fpcw;
+#endif
-#include <asm/fpu.h>
+ /* check for extended instruction set */
-extern unsigned long ieee_get_fp_control();
-extern void ieee_set_fp_control(unsigned long fp_control);
+ has_ext_instr_set = !asm_md_init();
+
+#if defined(__LINUX__)
+ /* Linux on Digital Alpha needs an initialisation of the ieee
+ floating point control for IEEE compliant arithmetic (option
+ -mieee of GCC). Under Digital Unix this is done
+ automatically. */
/* initialize floating point control */
- ieee_set_fp_control(ieee_get_fp_control()
- & ~IEEE_TRAP_ENABLE_INV
- & ~IEEE_TRAP_ENABLE_DZE
-/* & ~IEEE_TRAP_ENABLE_UNF we dont want underflow */
- & ~IEEE_TRAP_ENABLE_OVF);
-#endif
-#endif
+ fpcw = ieee_get_fp_control();
- /* nothing to do */
+ fpcw = fpcw
+ & ~IEEE_TRAP_ENABLE_INV
+ & ~IEEE_TRAP_ENABLE_DZE
+ /* We dont want underflow. */
+/* & ~IEEE_TRAP_ENABLE_UNF */
+ & ~IEEE_TRAP_ENABLE_OVF;
+
+/* fpcw = fpcw */
+/* | IEEE_TRAP_ENABLE_INV */
+/* | IEEE_TRAP_ENABLE_DZE */
+/* | IEEE_TRAP_ENABLE_OVF */
+/* | IEEE_TRAP_ENABLE_UNF */
+/* | IEEE_TRAP_ENABLE_INE */
+/* | IEEE_TRAP_ENABLE_DNO; */
+
+ ieee_set_fp_control(fpcw);
+#endif
}
-/* signal_handler_sigsegv ******************************************************
+/* md_jit_method_patch_address *************************************************
+
+ Gets the patch address of the currently compiled method. The offset
+ is extracted from the load instruction(s) before the jump and added
+ to the right base address (PV or REG_METHODPTR).
+
+ INVOKESTATIC/SPECIAL:
+
+ a77bffb8 ldq pv,-72(pv)
+ 6b5b4000 jsr (pv)
- NullPointerException signal handler for hardware null pointer check.
+ INVOKEVIRTUAL:
+
+ a7900000 ldq at,0(a0)
+ a77c0000 ldq pv,0(at)
+ 6b5b4000 jsr (pv)
+
+ INVOKEINTERFACE:
+
+ a7900000 ldq at,0(a0)
+ a79cff98 ldq at,-104(at)
+ a77c0018 ldq pv,24(at)
+ 6b5b4000 jsr (pv)
*******************************************************************************/
-void signal_handler_sigsegv(int sig, siginfo_t *siginfo, void *_p)
+void *md_jit_method_patch_address(void *pv, void *ra, void *mptr)
{
- ucontext_t *_uc;
- mcontext_t *_mc;
- u4 instr;
- ptrint addr;
- u1 *pv;
- u1 *sp;
- functionptr ra;
- functionptr xpc;
-
- _uc = (ucontext_t *) _p;
- _mc = &_uc->uc_mcontext;
-
- instr = *((s4 *) (_mc->sc_pc));
- addr = _mc->sc_regs[(instr >> 16) & 0x1f];
-
- if (addr == 0) {
- pv = (u1 *) _mc->sc_regs[REG_PV];
- sp = (u1 *) _mc->sc_regs[REG_SP];
- ra = (u1 *) _mc->sc_regs[REG_RA]; /* this is correct for leafs */
- xpc = (functionptr) _mc->sc_pc;
-
- _mc->sc_regs[REG_ITMP1_XPTR] =
- (ptrint) stacktrace_new_nullpointerexception(pv, sp, ra, xpc);
-
- _mc->sc_regs[REG_ITMP2_XPC] = (ptrint) xpc;
- _mc->sc_pc = (ptrint) asm_handle_exception;
-
- } else {
- addr += (long) ((instr << 16) >> 16);
-
- throw_cacao_exception_exit(string_java_lang_InternalError,
- "Segmentation fault: 0x%016lx at 0x%016lx\n",
- addr, _mc->sc_pc);
- }
-}
+ uint32_t *pc;
+ uint32_t mcode;
+ int opcode;
+ int base;
+ int32_t disp;
+ void *pa; /* patch address */
+ /* Go back to the load instruction (2 instructions). */
-#if defined(USE_THREADS) && defined(NATIVE_THREADS)
-void thread_restartcriticalsection(ucontext_t *uc)
-{
- void *critical;
+ pc = ((uint32_t *) ra) - 2;
- critical = thread_checkcritical((void *) uc->uc_mcontext.sc_pc);
+ /* Get first instruction word. */
- if (critical)
- uc->uc_mcontext.sc_pc = (ptrint) critical;
-}
-#endif
+ mcode = pc[0];
+ /* Get opcode, base register and displacement. */
-/* md_stacktrace_get_returnaddress *********************************************
+ opcode = M_MEM_GET_Opcode(mcode);
+ base = M_MEM_GET_Rb(mcode);
+ disp = M_MEM_GET_Memory_disp(mcode);
- Returns the return address of the current stackframe, specified by
- the passed stack pointer and the stack frame size.
+ /* Check for short or long load (2 instructions). */
-*******************************************************************************/
+ switch (opcode) {
+ case 0x29: /* LDQ: TODO use define */
+ switch (base) {
+ case REG_PV:
+ /* Calculate the data segment address. */
-functionptr md_stacktrace_get_returnaddress(u1 *sp, u4 framesize)
-{
- functionptr ra;
+ pa = ((uint8_t *) pv) + disp;
+ break;
- /* on Alpha the return address is located on the top of the stackframe */
+ case REG_METHODPTR:
+ /* Return NULL if no mptr was specified (used for
+ replacement). */
- ra = (functionptr) *((u1 **) (sp + framesize - SIZEOF_VOID_P));
+ if (mptr == NULL)
+ return NULL;
- return ra;
-}
+ /* Calculate the address in the vftbl. */
+ pa = ((uint8_t *) mptr) + disp;
+ break;
-/* codegen_findmethod **********************************************************
+ default:
+ vm_abort_disassemble(pc, 2, "md_jit_method_patch_address: unknown instruction %x", mcode);
+ return NULL;
+ }
+ break;
- Machine code:
+ case 0x09: /* LDAH: TODO use define */
+ /* XXX write a regression for this */
- 6b5b4000 jsr (pv)
- 237affe8 lda pv,-24(ra)
+ vm_abort("md_jit_method_patch_address: IMPLEMENT ME!");
-*******************************************************************************/
+ pa = NULL;
+ break;
-functionptr codegen_findmethod(functionptr pc)
-{
- u1 *ra;
- u1 *pv;
- u4 mcode;
- s2 offset;
+ default:
+ vm_abort_disassemble(pc, 2, "md_jit_method_patch_address: unknown instruction %x", mcode);
+ return NULL;
+ }
- ra = (u1 *) pc;
- pv = ra;
+ return pa;
+}
- /* get offset of first instruction (lda) */
- mcode = *((u4 *) ra);
+/**
+ * Decode the trap instruction at the given PC.
+ *
+ * @param trp information about trap to be filled
+ * @param sig signal number
+ * @param xpc exception PC
+ * @param es execution state of the machine
+ * @return true if trap was decoded successfully, false otherwise.
+ */
+bool md_trap_decode(trapinfo_t* trp, int sig, void* xpc, executionstate_t* es)
+{
+ // Get the exception-throwing instruction.
+ uint32_t mcode = *((uint32_t*) xpc);
+
+ switch (sig) {
+ case TRAP_SIGILL:
+ // Check for valid trap instruction.
+ // TODO Check the whole instruction.
+ if (M_OP3_GET_Opcode(mcode) == 0x4) {
+ trp->type = TRAP_PATCHER;
+ trp->value = 0;
+ return true;
+ }
+ return false;
+
+ case TRAP_SIGSEGV:
+ {
+ // Retrieve base address of instruction.
+ int32_t s1 = M_MEM_GET_Rb(mcode);
+ uintptr_t addr = es->intregs[s1];
+
+ // Check for special-load.
+ if (s1 == REG_ZERO) {
+ int32_t d = M_MEM_GET_Ra(mcode);
+ int32_t disp = M_MEM_GET_Memory_disp(mcode);
+
+ // We use the exception type as load displacement.
+ trp->type = disp;
+ trp->value = es->intregs[d];
+ return true;
+ }
+
+ // Check for implicit NullPointerException.
+ if (addr == 0) {
+ trp->type = TRAP_NullPointerException;
+ trp->value = 0;
+ return true;
+ }
+
+ return false;
+ }
- if ((mcode >> 16) != 0x237a) {
- log_text("No `lda pv,x(ra)' instruction found on return address!");
- assert(0);
+ default:
+ return false;
}
+}
+
- offset = (s2) (mcode & 0x0000ffff);
- pv += offset;
+/* md_patch_replacement_point **************************************************
- /* check for second instruction (ldah) */
+ Patch the given replacement point.
- mcode = *((u4 *) (ra + 1 * 4));
+*******************************************************************************/
- if ((mcode >> 16) == 0x177b) {
- offset = (s2) (mcode << 16);
- pv += offset;
+#if defined(ENABLE_REPLACEMENT)
+void md_patch_replacement_point(u1 *pc, u1 *savedmcode, bool revert)
+{
+ u4 mcode;
+
+ if (revert) {
+ /* restore the patched-over instruction */
+ *(u4*)(pc) = *(u4*)(savedmcode);
}
+ else {
+ /* save the current machine code */
+ *(u4*)(savedmcode) = *(u4*)(pc);
+
+ /* build the machine code for the patch */
+ mcode = (0xa41f0000 | (TRAP_PATCHER));
- return (functionptr) pv;
+ /* write the new machine code */
+ *(u4*)(pc) = mcode;
+ }
+
+ /* flush instruction cache */
+ md_icacheflush(pc,4);
}
+#endif /* defined(ENABLE_REPLACEMENT) */
/*
* c-basic-offset: 4
* tab-width: 4
* End:
+ * vim:noexpandtab:sw=4:ts=4:
*/
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