/* src/vm/jit/alpha/md.c - machine dependent Alpha functions
- Copyright (C) 1996-2005, 2006 R. Grafl, A. Krall, C. Kruegel,
- C. Oates, R. Obermaisser, M. Platter, M. Probst, S. Ring,
- E. Steiner, C. Thalinger, D. Thuernbeck, P. Tomsich, C. Ullrich,
- J. Wenninger, Institut f. Computersprachen - TU Wien
+ Copyright (C) 1996-2005, 2006, 2007, 2008
+ CACAOVM - Verein zur Foerderung der freien virtuellen Maschine CACAO
This file is part of CACAO.
Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
02110-1301, USA.
- Contact: cacao@cacaojvm.org
-
- Authors: Andreas Krall
- Reinhard Grafl
-
- Changes: Joseph Wenninger
- Christian Thalinger
-
- $Id: md.c 4498 2006-02-12 23:43:09Z twisti $
-
*/
#include "config.h"
-#include <assert.h>
+#include <stdint.h>
#include <ucontext.h>
#if defined(__LINUX__)
extern void ieee_set_fp_control(unsigned long fp_control);
#endif
-#include "vm/types.h"
-
-#include "vm/jit/alpha/md-abi.h"
+#include "vm/jit/alpha/codegen.h"
+#include "vm/jit/alpha/md.h"
-#include "vm/exceptions.h"
-#include "vm/stringlocal.h"
#include "vm/jit/asmpart.h"
-#include "vm/jit/stacktrace.h"
+#include "vm/jit/jit.hpp"
+#include "vm/jit/trap.h"
/* global variables ***********************************************************/
void md_init(void)
{
+#if defined(__LINUX__)
+ unsigned long int fpcw;
+#endif
+
/* check for extended instruction set */
has_ext_instr_set = !asm_md_init();
/* initialize floating point control */
- ieee_set_fp_control(ieee_get_fp_control()
- & ~IEEE_TRAP_ENABLE_INV
- & ~IEEE_TRAP_ENABLE_DZE
-/* & ~IEEE_TRAP_ENABLE_UNF we dont want underflow */
- & ~IEEE_TRAP_ENABLE_OVF);
-#endif
-}
-
+ fpcw = ieee_get_fp_control();
-/* md_stacktrace_get_returnaddress *********************************************
+ fpcw = fpcw
+ & ~IEEE_TRAP_ENABLE_INV
+ & ~IEEE_TRAP_ENABLE_DZE
+ /* We dont want underflow. */
+/* & ~IEEE_TRAP_ENABLE_UNF */
+ & ~IEEE_TRAP_ENABLE_OVF;
- Returns the return address of the current stackframe, specified by
- the passed stack pointer and the stack frame size.
+/* fpcw = fpcw */
+/* | IEEE_TRAP_ENABLE_INV */
+/* | IEEE_TRAP_ENABLE_DZE */
+/* | IEEE_TRAP_ENABLE_OVF */
+/* | IEEE_TRAP_ENABLE_UNF */
+/* | IEEE_TRAP_ENABLE_INE */
+/* | IEEE_TRAP_ENABLE_DNO; */
-*******************************************************************************/
-
-u1 *md_stacktrace_get_returnaddress(u1 *sp, u4 framesize)
-{
- u1 *ra;
-
- /* on Alpha the return address is located on the top of the stackframe */
-
- ra = *((u1 **) (sp + framesize - SIZEOF_VOID_P));
-
- return ra;
+ ieee_set_fp_control(fpcw);
+#endif
}
-/* md_assembler_get_patch_address **********************************************
+/* md_jit_method_patch_address *************************************************
Gets the patch address of the currently compiled method. The offset
is extracted from the load instruction(s) before the jump and added
to the right base address (PV or REG_METHODPTR).
- Machine code:
+ INVOKESTATIC/SPECIAL:
a77bffb8 ldq pv,-72(pv)
6b5b4000 jsr (pv)
- or
+ INVOKEVIRTUAL:
+ a7900000 ldq at,0(a0)
a77c0000 ldq pv,0(at)
6b5b4000 jsr (pv)
-*******************************************************************************/
-
-u1 *md_assembler_get_patch_address(u1 *ra, stackframeinfo *sfi, u1 *mptr)
-{
- u4 mcode;
- s4 offset;
- u1 *pa; /* patch address */
-
- /* go back to the actual load instruction (2 instructions on Alpha) */
+ INVOKEINTERFACE:
- ra = ra - 2 * 4;
-
- /* get first instruction word on current PC */
+ a7900000 ldq at,0(a0)
+ a79cff98 ldq at,-104(at)
+ a77c0018 ldq pv,24(at)
+ 6b5b4000 jsr (pv)
- mcode = *((u4 *) ra);
+*******************************************************************************/
- /* check if we have 2 instructions (lui) */
+void *md_jit_method_patch_address(void *pv, void *ra, void *mptr)
+{
+ uint32_t *pc;
+ uint32_t mcode;
+ int opcode;
+ int base;
+ int32_t disp;
+ void *pa; /* patch address */
- if ((mcode >> 16) == 0x3c19) {
- /* XXX write a regression for this */
- assert(0);
+ /* Go back to the load instruction (2 instructions). */
- /* get displacement of first instruction (lui) */
+ pc = ((uint32_t *) ra) - 2;
- offset = (s4) (mcode << 16);
+ /* Get first instruction word. */
- /* get displacement of second instruction (daddiu) */
+ mcode = pc[0];
- mcode = *((u4 *) (ra + 1 * 4));
+ /* Get opcode, base register and displacement. */
- assert((mcode >> 16) == 0x6739);
+ opcode = M_MEM_GET_Opcode(mcode);
+ base = M_MEM_GET_Rb(mcode);
+ disp = M_MEM_GET_Memory_disp(mcode);
- offset += (s2) (mcode & 0x0000ffff);
+ /* Check for short or long load (2 instructions). */
- } else {
- /* get first instruction (ldq) */
+ switch (opcode) {
+ case 0x29: /* LDQ: TODO use define */
+ switch (base) {
+ case REG_PV:
+ /* Calculate the data segment address. */
- mcode = *((u4 *) ra);
+ pa = ((uint8_t *) pv) + disp;
+ break;
- /* get the offset from the instruction */
+ case REG_METHODPTR:
+ /* Return NULL if no mptr was specified (used for
+ replacement). */
- offset = (s2) (mcode & 0x0000ffff);
+ if (mptr == NULL)
+ return NULL;
- /* check for call with REG_METHODPTR: ldq pv,0(at) */
+ /* Calculate the address in the vftbl. */
- if ((mcode >> 16) == 0xa77c) {
- /* in this case we use the passed method pointer */
+ pa = ((uint8_t *) mptr) + disp;
+ break;
- pa = mptr + offset;
+ default:
+ vm_abort_disassemble(pc, 2, "md_jit_method_patch_address: unknown instruction %x", mcode);
+ return NULL;
+ }
+ break;
- } else {
- /* in the normal case we check for a `ldq pv,-72(pv)' instruction */
+ case 0x09: /* LDAH: TODO use define */
+ /* XXX write a regression for this */
- assert((mcode >> 16) == 0xa77b);
+ vm_abort("md_jit_method_patch_address: IMPLEMENT ME!");
- /* and get the final data segment address */
+ pa = NULL;
+ break;
- pa = sfi->pv + offset;
- }
+ default:
+ vm_abort_disassemble(pc, 2, "md_jit_method_patch_address: unknown instruction %x", mcode);
+ return NULL;
}
return pa;
}
-/* md_codegen_findmethod *******************************************************
+/* md_patch_replacement_point **************************************************
- Machine code:
-
- 6b5b4000 jsr (pv)
- 277afffe ldah pv,-2(ra)
- 237ba61c lda pv,-23012(pv)
+ Patch the given replacement point.
*******************************************************************************/
-u1 *md_codegen_findmethod(u1 *ra)
+#if defined(ENABLE_REPLACEMENT)
+void md_patch_replacement_point(u1 *pc, u1 *savedmcode, bool revert)
{
- u1 *pv;
- u4 mcode;
- s4 offset;
-
- pv = ra;
+ u4 mcode;
- /* get first instruction word after jump */
-
- mcode = *((u4 *) ra);
-
- /* check if we have 2 instructions (ldah, lda) */
-
- if ((mcode >> 16) == 0x277a) {
- /* get displacement of first instruction (ldah) */
-
- offset = (s4) (mcode << 16);
- pv += offset;
-
- /* get displacement of second instruction (lda) */
-
- mcode = *((u4 *) (ra + 1 * 4));
-
- assert((mcode >> 16) == 0x237b);
-
- offset = (s2) (mcode & 0x0000ffff);
- pv += offset;
-
- } else {
- /* get displacement of first instruction (lda) */
+ if (revert) {
+ /* restore the patched-over instruction */
+ *(u4*)(pc) = *(u4*)(savedmcode);
+ }
+ else {
+ /* save the current machine code */
+ *(u4*)(savedmcode) = *(u4*)(pc);
- assert((mcode >> 16) == 0x237a);
+ /* build the machine code for the patch */
+ mcode = (0xa41f0000 | (TRAP_PATCHER));
- offset = (s2) (mcode & 0x0000ffff);
- pv += offset;
+ /* write the new machine code */
+ *(u4*)(pc) = mcode;
}
-
- return pv;
+
+ /* flush instruction cache */
+ md_icacheflush(pc,4);
}
+#endif /* defined(ENABLE_REPLACEMENT) */
/*
* c-basic-offset: 4
* tab-width: 4
* End:
+ * vim:noexpandtab:sw=4:ts=4:
*/
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