#include "config.h"
#include <assert.h>
+#include <stdint.h>
#include <ucontext.h>
#if defined(__LINUX__)
extern void ieee_set_fp_control(unsigned long fp_control);
#endif
-#include "vm/types.h"
-
-#include "vm/jit/alpha/md-abi.h"
+#include "vm/jit/alpha/codegen.h"
+#include "vm/jit/alpha/md.h"
#include "vm/exceptions.h"
-#include "vm/stringlocal.h"
#include "vm/jit/asmpart.h"
-#include "vm/jit/stacktrace.h"
-
-#if !defined(NDEBUG) && defined(ENABLE_DISASSEMBLER)
-#include "vmcore/options.h" /* XXX debug */
-#include "vm/jit/disass.h" /* XXX debug */
-#endif
+#include "vm/jit/jit.h"
/* global variables ***********************************************************/
void md_init(void)
{
+#if defined(__LINUX__)
+ unsigned long int fpcw;
+#endif
+
/* check for extended instruction set */
has_ext_instr_set = !asm_md_init();
/* initialize floating point control */
- ieee_set_fp_control(ieee_get_fp_control()
- & ~IEEE_TRAP_ENABLE_INV
- & ~IEEE_TRAP_ENABLE_DZE
-/* & ~IEEE_TRAP_ENABLE_UNF we dont want underflow */
- & ~IEEE_TRAP_ENABLE_OVF);
-#endif
-}
-
-
-/* md_stacktrace_get_returnaddress *********************************************
+ fpcw = ieee_get_fp_control();
- Returns the return address of the current stackframe, specified by
- the passed stack pointer and the stack frame size.
+ fpcw = fpcw
+ & ~IEEE_TRAP_ENABLE_INV
+ & ~IEEE_TRAP_ENABLE_DZE
+ /* We dont want underflow. */
+/* & ~IEEE_TRAP_ENABLE_UNF */
+ & ~IEEE_TRAP_ENABLE_OVF;
-*******************************************************************************/
-
-u1 *md_stacktrace_get_returnaddress(u1 *sp, u4 framesize)
-{
- u1 *ra;
-
- /* on Alpha the return address is located on the top of the stackframe */
-
- ra = *((u1 **) (sp + framesize - SIZEOF_VOID_P));
+/* fpcw = fpcw */
+/* | IEEE_TRAP_ENABLE_INV */
+/* | IEEE_TRAP_ENABLE_DZE */
+/* | IEEE_TRAP_ENABLE_OVF */
+/* | IEEE_TRAP_ENABLE_UNF */
+/* | IEEE_TRAP_ENABLE_INE */
+/* | IEEE_TRAP_ENABLE_DNO; */
- return ra;
+ ieee_set_fp_control(fpcw);
+#endif
}
-/* md_get_method_patch_address *************************************************
+/* md_jit_method_patch_address *************************************************
Gets the patch address of the currently compiled method. The offset
is extracted from the load instruction(s) before the jump and added
*******************************************************************************/
-u1 *md_get_method_patch_address(u1 *ra, stackframeinfo *sfi, u1 *mptr)
+void *md_jit_method_patch_address(void *pv, void *ra, void *mptr)
{
- u4 mcode;
- s4 offset;
- u1 *pa; /* patch address */
-
- /* go back to the actual load instruction (2 instructions on Alpha) */
-
- ra = ra - 2 * 4;
-
- /* get first instruction word on current PC */
-
- mcode = *((u4 *) ra);
+ uint32_t *pc;
+ uint32_t mcode;
+ int opcode;
+ int base;
+ int32_t disp;
+ void *pa; /* patch address */
- /* check if we have 2 instructions (lui) */
+ /* Go back to the load instruction (2 instructions). */
- if ((mcode >> 16) == 0x3c19) {
- /* XXX write a regression for this */
- assert(0);
-
- /* get displacement of first instruction (lui) */
-
- offset = (s4) (mcode << 16);
-
- /* get displacement of second instruction (daddiu) */
-
- mcode = *((u4 *) (ra + 1 * 4));
+ pc = ((uint32_t *) ra) - 2;
- assert((mcode >> 16) == 0x6739);
+ /* Get first instruction word. */
- offset += (s2) (mcode & 0x0000ffff);
+ mcode = pc[0];
- } else {
- /* get first instruction (ldq) */
+ /* Get opcode, base register and displacement. */
- mcode = *((u4 *) ra);
+ opcode = M_MEM_GET_Opcode(mcode);
+ base = M_MEM_GET_Rb(mcode);
+ disp = M_MEM_GET_Memory_disp(mcode);
- /* get the offset from the instruction */
+ /* Check for short or long load (2 instructions). */
- offset = (s2) (mcode & 0x0000ffff);
+ switch (opcode) {
+ case 0x29: /* LDQ: TODO use define */
+ switch (base) {
+ case REG_PV:
+ /* Calculate the data segment address. */
- /* check for call with REG_METHODPTR: ldq pv,0(at) */
+ pa = ((uint8_t *) pv) + disp;
+ break;
- if ((mcode >> 16) == 0xa77c) {
- /* in this case we use the passed method pointer */
-
- /* return NULL if no mptr was specified (used for replacement) */
+ case REG_METHODPTR:
+ /* Return NULL if no mptr was specified (used for
+ replacement). */
if (mptr == NULL)
return NULL;
- pa = mptr + offset;
-
- } else {
- /* in the normal case we check for a `ldq pv,-72(pv)' instruction */
-
- assert((mcode >> 16) == 0xa77b);
+ /* Calculate the address in the vftbl. */
- /* and get the final data segment address */
+ pa = ((uint8_t *) mptr) + disp;
+ break;
- pa = sfi->pv + offset;
+ default:
+ vm_abort_disassemble(pc, 2, "md_jit_method_patch_address: unknown instruction %x", mcode);
+ return NULL;
}
- }
-
- return pa;
-}
-
-
-/* md_codegen_get_pv_from_pc ***************************************************
-
- Machine code:
+ break;
- 6b5b4000 jsr (pv)
- 277afffe ldah pv,-2(ra)
- 237ba61c lda pv,-23012(pv)
-
-*******************************************************************************/
-
-u1 *md_codegen_get_pv_from_pc(u1 *ra)
-{
- u1 *pv;
- u4 mcode;
- s4 offset;
-
- pv = ra;
-
- /* get first instruction word after jump */
-
- mcode = *((u4 *) ra);
-
- /* check if we have 2 instructions (ldah, lda) */
-
- if ((mcode >> 16) == 0x277a) {
- /* get displacement of first instruction (ldah) */
-
- offset = (s4) (mcode << 16);
- pv += offset;
-
- /* get displacement of second instruction (lda) */
-
- mcode = *((u4 *) (ra + 1 * 4));
-
- assert((mcode >> 16) == 0x237b);
+ case 0x09: /* LDAH: TODO use define */
+ /* XXX write a regression for this */
- offset = (s2) (mcode & 0x0000ffff);
- pv += offset;
- }
- else {
- /* get displacement of first instruction (lda) */
+ vm_abort("md_jit_method_patch_address: IMPLEMENT ME!");
- assert((mcode >> 16) == 0x237a);
+ pa = NULL;
+ break;
- offset = (s2) (mcode & 0x0000ffff);
- pv += offset;
+ default:
+ vm_abort_disassemble(pc, 2, "md_jit_method_patch_address: unknown instruction %x", mcode);
+ return NULL;
}
- return pv;
-}
-
-
-/* md_cacheflush ***************************************************************
-
- Calls the system's function to flush the instruction and data
- cache.
-
-*******************************************************************************/
-
-void md_cacheflush(u1 *addr, s4 nbytes)
-{
- asm_cacheflush(addr, nbytes);
-}
-
-
-/* md_icacheflush **************************************************************
-
- Calls the system's function to flush the instruction cache.
-
-*******************************************************************************/
-
-void md_icacheflush(u1 *addr, s4 nbytes)
-{
- asm_cacheflush(addr, nbytes);
-}
-
-
-/* md_dcacheflush **************************************************************
-
- Calls the system's function to flush the data cache.
-
-*******************************************************************************/
-
-void md_dcacheflush(u1 *addr, s4 nbytes)
-{
- /* do nothing */
+ return pa;
}
*(u4*)(pc) = mcode;
}
-#if !defined(NDEBUG) && defined(ENABLE_DISASSEMBLER) && 0
- {
- u1* u1ptr = pc;
- DISASSINSTR(u1ptr);
- fflush(stdout);
- }
-#endif
-
/* flush instruction cache */
md_icacheflush(pc,4);
}
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