#include "threads/atomic.hpp"
+namespace Atomic_md {
/**
* An atomic compare and swap for 32-bit integer values.
*
* @return value of the memory location before the store
*/
-inline uint32_t Atomic::compare_and_swap(volatile uint32_t *p, uint32_t oldval, uint32_t newval)
+inline uint32_t compare_and_swap(volatile uint32_t *p, uint32_t oldval, uint32_t newval)
{
uint32_t temp;
uint32_t result;
*
* @return value of the memory location before the store
*/
-inline uint64_t Atomic::compare_and_swap(volatile uint64_t *p, uint64_t oldval, uint64_t newval)
+inline uint64_t compare_and_swap(volatile uint64_t *p, uint64_t oldval, uint64_t newval)
{
uint64_t temp;
uint64_t result;
}
-/**
- * An atomic compare and swap for pointer values.
- *
- * @param p Pointer to memory address.
- * @param oldval Old value to be expected.
- * @param newval New value to be stored.
- *
- * @return value of the memory location before the store
- */
-inline void* Atomic::compare_and_swap(volatile void** p, void* oldval, void* newval)
-{
- return (void*) compare_and_swap((volatile uint64_t*) p, (uint64_t) oldval, (uint64_t) newval);
-}
-
-
/**
* A memory barrier.
*/
-inline void Atomic::memory_barrier(void)
+inline void memory_barrier(void)
{
__asm__ __volatile__ ("mb" : : : "memory");
}
/**
* A write memory barrier.
*/
-inline void Atomic::write_memory_barrier(void)
+inline void write_memory_barrier(void)
{
__asm__ __volatile__ ("wmb" : : : "memory");
}
/**
* An instruction barrier.
*/
-inline void Atomic::instruction_barrier(void)
+inline void instruction_barrier(void)
{
__asm__ __volatile__ ("mb" : : : "memory");
}
+}
+
#endif // _MD_ATOMIC_HPP