// Copyright (C) 2008 Kevin O'Connor <kevin@koconnor.net>
// Copyright (C) 2002 MandrakeSoft S.A.
//
-// This file may be distributed under the terms of the GNU GPLv3 license.
+// This file may be distributed under the terms of the GNU LGPLv3 license.
#include "util.h" // irq_restore
#include "biosvar.h" // BIOS_CONFIG_TABLE
#include "ioport.h" // inb
-#include "cmos.h" // inb_cmos
-
-#define E820_RAM 1
-#define E820_RESERVED 2
-#define E820_ACPI 3
-#define E820_NVS 4
-#define E820_UNUSABLE 5
+#include "memmap.h" // E820_RAM
+#include "pic.h" // eoi_pic2
+#include "bregs.h" // struct bregs
// Use PS2 System Control port A to set A20 enable
static inline u8
// get current setting first
u8 newval, oldval = inb(PORT_A20);
if (cond)
- newval = oldval | 0x02;
+ newval = oldval | A20_ENABLE_BIT;
else
- newval = oldval & ~0x02;
+ newval = oldval & ~A20_ENABLE_BIT;
outb(newval, PORT_A20);
- return (newval & 0x02) != 0;
+ return (oldval & A20_ENABLE_BIT) != 0;
}
static void
static void
handle_152402(struct bregs *regs)
{
- regs->al = !!(inb(PORT_A20) & 0x20);
+ regs->al = (inb(PORT_A20) & A20_ENABLE_BIT) != 0;
set_code_success(regs);
}
set_code_success(regs);
}
-// Wait for CX:DX microseconds. currently using the
-// refresh request port 0x61 bit4, toggling every 15usec
-static void
-handle_1586(struct bregs *regs)
-{
- irq_enable();
- usleep((regs->cx << 16) | regs->dx);
- irq_disable();
-}
-
static void
handle_1587(struct bregs *regs)
{
"lgdtw %%es:0x8(%%si)\n"
"lidtw %%cs:pmode_IDT_info\n"
- // set PE bit in CR0
+ // Enable protected mode
"movl %%cr0, %%eax\n"
- "orb $0x01, %%al\n"
+ "orl $" __stringify(CR0_PE) ", %%eax\n"
"movl %%eax, %%cr0\n"
// far jump to flush CPU queue after transition to protected mode
"xorw %%di, %%di\n"
"rep movsw\n"
- // reset PG bit in CR0 ???
+ // Disable protected mode
"movl %%cr0, %%eax\n"
- "andb $0xfe, %%al\n"
+ "andl $~" __stringify(CR0_PE) ", %%eax\n"
"movl %%eax, %%cr0\n"
// far jump to flush CPU queue after transition to real mode
- "ljmpw $0xf000, $2f\n"
+ "ljmpw $" __stringify(SEG_BIOS) ", $2f\n"
"2:\n"
// restore IDT to normal real-mode defaults
- "lidt %%cs:rmode_IDT_info\n"
+ "lidtw %%cs:rmode_IDT_info\n"
// Restore %ds (from %ss)
"movw %%ss, %%ax\n"
static void
handle_1588(struct bregs *regs)
{
- u32 rs = GET_EBDA(ram_size);
+ u32 rs = GET_GLOBAL(RamSize);
// According to Ralf Brown's interrupt the limit should be 15M,
// but real machines mostly return max. 63M.
static void
handle_154f(struct bregs *regs)
{
- // set_fail(regs); -- don't report this failure.
- set_cf(regs, 1);
+ set_fail_silent(regs);
}
static void
static void
handle_15c1(struct bregs *regs)
{
- regs->es = GET_BDA(ebda_seg);
+ regs->es = get_ebda_seg();
set_success(regs);
}
// regs.u.r16.ax = 0;
// regs.u.r16.bx = 0;
- u32 rs = GET_EBDA(ram_size);
+ u32 rs = GET_GLOBAL(RamSize);
// Get the amount of extended memory (above 1M)
if (rs > 16*1024*1024) {
set_success(regs);
}
-static void
-set_e820_range(struct bregs *regs, u32 start, u32 end, u16 type, int last)
-{
- u32 size = end - start;
- SET_FARVAR(regs->es, *(u64*)(regs->di+0), start);
- SET_FARVAR(regs->es, *(u64*)(regs->di+8), size);
- SET_FARVAR(regs->es, *(u16*)(regs->di+16), type);
- SET_FARVAR(regs->es, *(u16*)(regs->di+18), 0x0);
-
- if (last)
- regs->ebx = 0;
- else
- regs->ebx++;
- regs->eax = 0x534D4150;
- regs->ecx = 0x14;
- set_success(regs);
-}
+// Info on e820 map location and size.
+struct e820entry *e820_list VAR16_32;
+int e820_count VAR16_32;
+// Amount of continuous ram under 4Gig
+u32 RamSize VAR16_32;
+// Amount of continuous ram >4Gig
+u64 RamSizeOver4G;
-// XXX - should create e820 memory map in post and just copy it here.
static void
handle_15e820(struct bregs *regs)
{
- if (regs->edx != 0x534D4150) {
+ int count = GET_GLOBAL(e820_count);
+ if (regs->edx != 0x534D4150 || regs->bx >= count) {
set_code_fail(regs, RET_EUNSUPPORTED);
return;
}
- u32 extended_memory_size = GET_EBDA(ram_size);
- // greater than EFF00000???
- if (extended_memory_size > 0xf0000000)
- // everything after this is reserved memory until we get to 0x100000000
- extended_memory_size = 0xf0000000;
-
- switch (regs->bx) {
- case 0:
- set_e820_range(regs, 0x0000000L, 0x0009fc00L, E820_RAM, 0);
- break;
- case 1:
- set_e820_range(regs, 0x0009fc00L, 0x000a0000L, E820_RESERVED, 0);
- break;
- case 2:
- set_e820_range(regs, 0x000e8000L, 0x00100000L, E820_RESERVED, 0);
- break;
- case 3:
- set_e820_range(regs, 0x00100000L
- , extended_memory_size - CONFIG_ACPI_DATA_SIZE
- , E820_RAM, 0);
- break;
- case 4:
- set_e820_range(regs,
- extended_memory_size - CONFIG_ACPI_DATA_SIZE,
- extended_memory_size, E820_ACPI, 0);
- break;
- case 5:
- /* 256KB BIOS area at the end of 4 GB */
- set_e820_range(regs, 0xfffc0000L, 0x00000000L, E820_RESERVED, 1);
- break;
- default: /* AX=E820, DX=534D4150, BX unrecognized */
- set_code_fail(regs, RET_EUNSUPPORTED);
- }
+ struct e820entry *l = GET_GLOBAL(e820_list);
+ memcpy_far(MAKE_FARPTR(regs->es, regs->di), &l[regs->bx], sizeof(l[0]));
+ if (regs->bx == count-1)
+ regs->ebx = 0;
+ else
+ regs->ebx++;
+ regs->eax = 0x534D4150;
+ regs->ecx = sizeof(l[0]);
+ set_success(regs);
}
static void
void VISIBLE16
handle_15(struct bregs *regs)
{
- //debug_enter(regs);
+ debug_enter(regs, DEBUG_HDL_15);
switch (regs->ah) {
case 0x24: handle_1524(regs); break;
case 0x4f: handle_154f(regs); break;
case 0x52: handle_1552(regs); break;
case 0x53: handle_1553(regs); break;
+ case 0x5f: handle_155f(regs); break;
case 0x83: handle_1583(regs); break;
case 0x86: handle_1586(regs); break;
case 0x87: handle_1587(regs); break;
void VISIBLE16
handle_12(struct bregs *regs)
{
- debug_enter(regs);
+ debug_enter(regs, DEBUG_HDL_12);
regs->ax = GET_BDA(mem_size_kb);
}
void VISIBLE16
handle_11(struct bregs *regs)
{
- debug_enter(regs);
+ debug_enter(regs, DEBUG_HDL_11);
regs->ax = GET_BDA(equipment_list_flags);
}
void VISIBLE16
handle_05(struct bregs *regs)
{
- debug_enter(regs);
+ debug_enter(regs, DEBUG_HDL_05);
}
// INT 10h Video Support Service Entry Point
void VISIBLE16
handle_10(struct bregs *regs)
{
- debug_enter(regs);
+ debug_enter(regs, DEBUG_HDL_10);
// dont do anything, since the VGA BIOS handles int10h requests
}
void VISIBLE16
handle_nmi()
{
- debug_isr();
+ debug_isr(DEBUG_ISR_nmi);
BX_PANIC("NMI Handler called\n");
}
+void
+mathcp_setup()
+{
+ dprintf(3, "math cp init\n");
+ // 80x87 coprocessor installed
+ SETBITS_BDA(equipment_list_flags, 0x02);
+ enable_hwirq(13, entry_75);
+}
+
// INT 75 - IRQ13 - MATH COPROCESSOR EXCEPTION
void VISIBLE16
handle_75()
{
- debug_isr();
+ debug_isr(DEBUG_ISR_75);
// clear irq13
outb(0, PORT_MATH_CLEAR);
// clear interrupt
- eoi_both_pics();
+ eoi_pic2();
// legacy nmi call
- struct bregs br;
- memset(&br, 0, sizeof(br));
- call16_int(0x02, &br);
+ u32 eax=0, flags;
+ call16_simpint(0x02, &eax, &flags);
}
projects / seabios.git / blobdiff